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Reduce multiply to 2 cycles

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We want all non load/store ops to take 2 cycles to make
tracking write back easier.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
This commit is contained in:
Anton Blanchard 2019-09-10 16:22:58 +10:00 committed by Anton Blanchard
parent 9fe8d211eb
commit 68533c4cfb
1 changed files with 1 additions and 1 deletions
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2
multiply.vhdl
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@ -10,7 +10,7 @@ use work.crhelpers.all;
entity multiply is
generic (
PIPELINE_DEPTH : natural := 6
PIPELINE_DEPTH : natural := 2
);
port (
clk : in std_logic;