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Merge pull request #25 from antonblanchard/register_file_printing

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Clean up register read debug output
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Anton Blanchard 2019-09-09 11:42:41 +10:00 committed by GitHub
commit a1ab1d3e56
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3 changed files with 18 additions and 5 deletions
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3
common.vhdl
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@ -67,8 +67,11 @@ package common is
constant Decode2ToMultiplyInit : Decode2ToMultiplyType := (valid => '0', insn_type => OP_ILLEGAL, rc => '0', others => (others => '0'));
type Decode2ToRegisterFileType is record
read1_enable : std_ulogic;
read1_reg : std_ulogic_vector(4 downto 0);
read2_enable : std_ulogic;
read2_reg : std_ulogic_vector(4 downto 0);
read3_enable : std_ulogic;
read3_reg : std_ulogic_vector(4 downto 0);
end record;

4
decode2.vhdl
View File

@ -208,6 +208,10 @@ begin
decoded_reg_b := decode_input_reg_b (d.decode.input_reg_b, d.insn, r_in.read2_data);
decoded_reg_c := decode_input_reg_c (d.decode.input_reg_c, d.insn, r_in.read3_data);
r_out.read1_enable <= decoded_reg_a.reg_valid;
r_out.read2_enable <= decoded_reg_b.reg_valid;
r_out.read3_enable <= decoded_reg_c.reg_valid;
case d.decode.unit is
when ALU =>
e_out.valid <= d.valid;

16
register_file.vhdl
View File

@ -28,12 +28,12 @@ begin
if rising_edge(clk) then
if w_in.write_enable = '1' then
assert not(is_x(w_in.write_data)) and not(is_x(w_in.write_reg)) severity failure;
report "Writing " & to_hstring(w_in.write_data) & " to " & to_hstring(w_in.write_reg);
report "Writing GPR " & to_hstring(w_in.write_reg) & " " & to_hstring(w_in.write_data);
registers(to_integer(unsigned(w_in.write_reg))) <= w_in.write_data;
end if;
if w_in.write_enable2 = '1' then
assert not(is_x(w_in.write_data2)) and not(is_x(w_in.write_reg2)) severity failure;
report "Writing " & to_hstring(w_in.write_data2) & " to " & to_hstring(w_in.write_reg2);
report "Writing GPR " & to_hstring(w_in.write_reg2) & " " & to_hstring(w_in.write_data2);
registers(to_integer(unsigned(w_in.write_reg2))) <= w_in.write_data2;
end if;
end if;
@ -42,9 +42,15 @@ begin
-- asynchronous reads
register_read_0: process(all)
begin
report "read " & to_hstring(d_in.read1_reg) & " " & to_hstring(registers(to_integer(unsigned(d_in.read1_reg))));
report "read " & to_hstring(d_in.read2_reg) & " " & to_hstring(registers(to_integer(unsigned(d_in.read2_reg))));
report "read " & to_hstring(d_in.read3_reg) & " " & to_hstring(registers(to_integer(unsigned(d_in.read3_reg))));
if d_in.read1_enable = '1' then
report "Reading GPR " & to_hstring(d_in.read1_reg) & " " & to_hstring(registers(to_integer(unsigned(d_in.read1_reg))));
end if;
if d_in.read2_enable = '1' then
report "Reading GPR " & to_hstring(d_in.read2_reg) & " " & to_hstring(registers(to_integer(unsigned(d_in.read2_reg))));
end if;
if d_in.read3_enable = '1' then
report "Reading GPR " & to_hstring(d_in.read3_reg) & " " & to_hstring(registers(to_integer(unsigned(d_in.read3_reg))));
end if;
d_out.read1_data <= registers(to_integer(unsigned(d_in.read1_reg)));
d_out.read2_data <= registers(to_integer(unsigned(d_in.read2_reg)));
d_out.read3_data <= registers(to_integer(unsigned(d_in.read3_reg)));