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fpga: Arty A7's don't need multiple filesets

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the XDC is identical between variants, so is the fileset

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt 2019-09-30 12:56:09 +10:00
parent 80a0e7fcf3
commit ab5c6ab9ac
2 changed files with 4 additions and 9 deletions
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0
fpga/arty_a7-35.xdc → fpga/arty_a7.xdc
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13
microwatt.core
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@ -68,14 +68,9 @@ filesets:
- fpga/nexys-video.xdc : {file_type : xdc}
- fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
arty_a7-35:
arty_a7:
files:
- fpga/arty_a7-35.xdc : {file_type : xdc}
- fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
arty_a7-100:
files:
- fpga/arty_a7-35.xdc : {file_type : xdc}
- fpga/arty_a7.xdc : {file_type : xdc}
- fpga/clk_gen_plle2.vhd : {file_type : vhdlSource-2008}
cmod_a7-35:
@ -102,7 +97,7 @@ targets:
arty_a7-35:
default_tool: vivado
filesets: [core, arty_a7-35, soc, fpga, debug_xilinx]
filesets: [core, arty_a7, soc, fpga, debug_xilinx]
parameters : [memory_size, ram_init_file]
tools:
vivado: {part : xc7a35ticsg324-1L}
@ -110,7 +105,7 @@ targets:
arty_a7-100:
default_tool: vivado
filesets: [core, arty_a7-100, soc, fpga, debug_xilinx]
filesets: [core, arty_a7, soc, fpga, debug_xilinx]
parameters : [memory_size, ram_init_file]
tools:
vivado: {part : xc7a100ticsg324-1L}