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xics: Add support for reduced priority field size

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This makes the ICS support less than the 8 architected bits
and sets the soc to use 3 bits by default.

All the supported bits set translates to "masked" (and will read
back at 0xff), any small value is used as-is.

Linux doesn't use priorities above 5, so this is a way to save
silicon. The number of supported priority bits is exposed to the
OS via the config register.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
This commit is contained in:
Benjamin Herrenschmidt
2020-06-22 23:38:34 +10:00
parent 5c2fc47e2c
commit bb54af59de
4 changed files with 71 additions and 31 deletions
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24
tests/xics/xics.c
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@@ -168,8 +168,8 @@ int xics_test_0(void)
assert(v0 = 0xff);
assert(v1 = 0xff);
ics_write_xive(0xaa, 0);
ics_write_xive(0x55, 1);
ics_write_xive(0xa, 0);
ics_write_xive(0x5, 1);
v0 = ics_read_xive(0);
v1 = ics_read_xive(1);
#ifdef DEBUG
@@ -181,11 +181,15 @@ int xics_test_0(void)
print_number(v1);
puts("\n");
#endif
assert(v0 = 0xaa);
assert(v1 = 0x55);
assert(v0 = 0xa);
assert(v1 = 0x5);
ics_write_xive(0xff, 0);
ics_write_xive(0xff, 1);
v0 = ics_read_xive(0);
v1 = ics_read_xive(1);
assert(v0 = 0xff);
assert(v1 = 0xff);
return 0;
}
@@ -198,28 +202,28 @@ int xics_test_1(void)
icp_write8(XICS_XIRR, 0x00); // mask all interrupts
// trigger two interrupts
potato_uart_irq_en(); // cause 0x500 interrupt
ics_write_xive(0x80, 0);
icp_write8(XICS_MFRR, 0x05); // cause 0x500 interrupt
potato_uart_irq_en(); // cause serial interrupt
ics_write_xive(0x6, 0); // set source to prio 6
icp_write8(XICS_MFRR, 0x04); // cause ipi interrupt at prio 5
// still masked, so shouldn't happen yet
delay();
assert(isrs_run == 0);
// unmask IPI only
icp_write8(XICS_XIRR, 0x40);
icp_write8(XICS_XIRR, 0x6);
delay();
assert(isrs_run == ISR_IPI);
// unmask UART
icp_write8(XICS_XIRR, 0xc0);
icp_write8(XICS_XIRR, 0x7);
delay();
assert(isrs_run == (ISR_IPI | ISR_UART));
// cleanup
icp_write8(XICS_XIRR, 0x00); // mask all interrupts
potato_uart_irq_dis();
ics_write_xive(0, 0);
ics_write_xive(0, 0xff);
isrs_run = 0;
return 0;