mirror of
https://github.com/antonblanchard/microwatt.git
synced 2026-01-11 23:43:15 +00:00
Remove option for "short" 16x16 bit multiplier
Now that we have a 33 bit x 33 bit signed multiplier in execute1, there is really no need for the 16 bit multiplier. The coremark results are just as good without it as with it. This removes the option for the sake of simplicity. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
Paul Mackerras
parent
e02d8060ed
commit
d1e8e62fee
@ -13,7 +13,6 @@ entity core is
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EX1_BYPASS : boolean := true;
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HAS_FPU : boolean := true;
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HAS_BTC : boolean := true;
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HAS_SHORT_MULT : boolean := false;
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ALT_RESET_ADDRESS : std_ulogic_vector(63 downto 0) := (others => '0');
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LOG_LENGTH : natural := 512;
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ICACHE_NUM_LINES : natural := 64;
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@ -366,7 +365,6 @@ begin
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SIM => SIM,
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EX1_BYPASS => EX1_BYPASS,
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HAS_FPU => HAS_FPU,
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HAS_SHORT_MULT => HAS_SHORT_MULT,
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LOG_LENGTH => LOG_LENGTH
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)
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port map (
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@ -15,7 +15,6 @@ entity execute1 is
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SIM : boolean := false;
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EX1_BYPASS : boolean := true;
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HAS_FPU : boolean := true;
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HAS_SHORT_MULT : boolean := false;
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-- Non-zero to enable log data collection
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LOG_LENGTH : natural := 0
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);
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@ -448,17 +447,6 @@ begin
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p_out => pmu_to_x
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);
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short_mult_0: if HAS_SHORT_MULT generate
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begin
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short_mult: entity work.short_multiply
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port map (
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clk => clk,
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a_in => a_in(15 downto 0),
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b_in => b_in(15 downto 0),
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m_out => mshort_p
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);
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end generate;
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dbg_ctrl_out <= ctrl;
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log_rd_addr <= ex2.log_addr_spr;
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@ -1288,13 +1276,6 @@ begin
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v.se.mult_32s := '1';
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v.res2_sel := "00";
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slow_op := '1';
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elsif HAS_SHORT_MULT and e_in.reg_valid3 = '0' and
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fits_in_n_bits(a_in, 16) and fits_in_n_bits(b_in, 16) then
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-- Operands fit into 16 bits, so use short multiplier
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if e_in.oe = '1' then
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-- Note 16x16 multiply can't overflow, even for mullwo
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set_ov(v.e, '0', '0');
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end if;
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else
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-- Use standard multiplier
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v.start_mul := '1';
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@ -16,7 +16,6 @@ entity toplevel is
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CLK_FREQUENCY : positive := 100000000;
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HAS_FPU : boolean := true;
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HAS_BTC : boolean := true;
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HAS_SHORT_MULT : boolean := false;
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USE_LITEDRAM : boolean := false;
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NO_BRAM : boolean := false;
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DISABLE_FLATTEN_CORE : boolean := false;
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@ -199,7 +198,6 @@ begin
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CLK_FREQ => CLK_FREQUENCY,
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HAS_FPU => HAS_FPU,
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HAS_BTC => HAS_BTC,
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HAS_SHORT_MULT => HAS_SHORT_MULT,
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HAS_DRAM => USE_LITEDRAM,
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DRAM_SIZE => 256 * 1024 * 1024,
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DRAM_INIT_SIZE => PAYLOAD_SIZE,
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@ -13,7 +13,6 @@ entity toplevel is
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CLK_FREQUENCY : positive := 100000000;
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HAS_FPU : boolean := true;
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HAS_BTC : boolean := false;
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HAS_SHORT_MULT: boolean := false;
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ICACHE_NUM_LINES : natural := 64;
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LOG_LENGTH : natural := 512;
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DISABLE_FLATTEN_CORE : boolean := false;
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@ -75,7 +74,6 @@ begin
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CLK_FREQ => CLK_FREQUENCY,
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HAS_FPU => HAS_FPU,
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HAS_BTC => HAS_BTC,
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HAS_SHORT_MULT => HAS_SHORT_MULT,
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ICACHE_NUM_LINES => ICACHE_NUM_LINES,
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LOG_LENGTH => LOG_LENGTH,
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DISABLE_FLATTEN_CORE => DISABLE_FLATTEN_CORE,
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@ -16,7 +16,6 @@ entity toplevel is
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CLK_FREQUENCY : positive := 100000000;
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HAS_FPU : boolean := true;
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HAS_BTC : boolean := true;
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HAS_SHORT_MULT: boolean := false;
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USE_LITEDRAM : boolean := false;
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NO_BRAM : boolean := false;
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DISABLE_FLATTEN_CORE : boolean := false;
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@ -175,7 +174,6 @@ begin
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CLK_FREQ => CLK_FREQUENCY,
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HAS_FPU => HAS_FPU,
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HAS_BTC => HAS_BTC,
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HAS_SHORT_MULT=> HAS_SHORT_MULT,
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HAS_DRAM => USE_LITEDRAM,
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DRAM_SIZE => 512 * 1024 * 1024,
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DRAM_INIT_SIZE => PAYLOAD_SIZE,
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@ -188,7 +188,6 @@ begin
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HAS_UART1 => HAS_UART1,
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HAS_SD_CARD => USE_LITESDCARD,
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ICACHE_NUM_LINES => ICACHE_NUM_LINES,
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HAS_SHORT_MULT => true,
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NGPIO => NGPIO
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)
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port map (
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@ -16,7 +16,6 @@ entity toplevel is
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CLK_FREQUENCY : positive := 100000000;
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HAS_FPU : boolean := true;
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HAS_BTC : boolean := true;
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HAS_SHORT_MULT : boolean := false;
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USE_LITEDRAM : boolean := false;
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NO_BRAM : boolean := false;
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DISABLE_FLATTEN_CORE : boolean := false;
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@ -175,7 +174,6 @@ begin
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CLK_FREQ => CLK_FREQUENCY,
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HAS_FPU => HAS_FPU,
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HAS_BTC => HAS_BTC,
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HAS_SHORT_MULT => HAS_SHORT_MULT,
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HAS_DRAM => USE_LITEDRAM,
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DRAM_SIZE => 256 * 1024 * 1024,
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DRAM_INIT_SIZE => PAYLOAD_SIZE,
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@ -146,7 +146,6 @@ targets:
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- uart_is_16550
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- has_fpu
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- has_btc
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- has_short_mult
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tools:
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vivado: {part : xc7a100tcsg324-1}
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toplevel : toplevel
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@ -252,7 +251,6 @@ targets:
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- uart_is_16550
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- has_fpu
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- has_btc
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- has_short_mult
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generate: [litedram_nexys_video, liteeth_nexys_video, litesdcard_nexys_video]
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tools:
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vivado: {part : xc7a200tsbg484-1}
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@ -273,7 +271,6 @@ targets:
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- has_uart1
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- has_fpu=false
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- has_btc=false
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- has_short_mult
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- use_litesdcard
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tools:
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vivado: {part : xc7a35ticsg324-1L}
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@ -296,7 +293,6 @@ targets:
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- has_uart1
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- has_fpu=false
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- has_btc=false
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- has_short_mult
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generate: [litedram_arty, liteeth_arty, litesdcard_arty]
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tools:
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vivado: {part : xc7a35ticsg324-1L}
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@ -317,7 +313,6 @@ targets:
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- has_uart1
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- has_fpu
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- has_btc
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- has_short_mult
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- use_litesdcard
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tools:
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vivado: {part : xc7a100ticsg324-1L}
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@ -340,7 +335,6 @@ targets:
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- has_uart1
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- has_fpu
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- has_btc
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- has_short_mult
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generate: [litedram_arty, liteeth_arty, litesdcard_arty]
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tools:
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vivado: {part : xc7a100ticsg324-1L}
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@ -362,7 +356,6 @@ targets:
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- uart_is_16550
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- has_fpu
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- has_btc
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- has_short_mult
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generate: [litesdcard_wukong-v2]
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tools:
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vivado: {part : xc7a100tfgg676-1}
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@ -384,7 +377,6 @@ targets:
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- uart_is_16550
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- has_fpu
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- has_btc
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- has_short_mult
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generate: [litedram_wukong-v2, liteeth_wukong-v2, litesdcard_wukong-v2]
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tools:
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vivado: {part : xc7a100tfgg676-1}
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@ -500,12 +492,6 @@ parameters:
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paramtype : generic
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default : true
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has_short_mult:
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datatype : bool
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description : Include a 16 bit x 16 bit single-cycle multiplier in the core
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paramtype : generic
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default : false
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disable_flatten_core:
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datatype : bool
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description : Prevent Vivado from flattening the main core components
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2
soc.vhdl
2
soc.vhdl
@ -59,7 +59,6 @@ entity soc is
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SIM : boolean;
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HAS_FPU : boolean := true;
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HAS_BTC : boolean := true;
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HAS_SHORT_MULT : boolean := false;
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DISABLE_FLATTEN_CORE : boolean := false;
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ALT_RESET_ADDRESS : std_logic_vector(63 downto 0) := (23 downto 0 => '0', others => '1');
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HAS_DRAM : boolean := false;
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@ -335,7 +334,6 @@ begin
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SIM => SIM,
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HAS_FPU => HAS_FPU,
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HAS_BTC => HAS_BTC,
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HAS_SHORT_MULT => HAS_SHORT_MULT,
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DISABLE_FLATTEN => DISABLE_FLATTEN_CORE,
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ALT_RESET_ADDRESS => ALT_RESET_ADDRESS,
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LOG_LENGTH => LOG_LENGTH,
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