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Implement facility unavailable and hypervisor facility unavailable interrupts

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This adds the FSCR and HFSCR registers and implements the associated
behaviours of taking a facility unavailable or hypervisor facility
unavailable interrupt if certain actions are attempted while the
relevant [H]FSCR bit is zero.

At present, two FSCR enable bits and three HFSCR enable bits are
implemented.  FSCR has bits for prefixed instructions and accesses to
the TAR register, and HFSCR has those plus a bit that enables access
to floating-point registers and instructions.

FSCR and HFSCR can be accessed through the debug interface using
register addresses 0x2e and 0x2f.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
This commit is contained in:
Paul Mackerras
2023-08-21 21:43:35 +10:00
parent 12a3d76217
commit e3f4ccedec
6 changed files with 165 additions and 20 deletions
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scripts/mw_debug/mw_debug.c
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@@ -550,6 +550,7 @@ static const char *fast_spr_names[] =
"lr", "ctr", "srr0", "srr1", "hsrr0", "hsrr1",
"sprg0", "sprg1", "sprg2", "sprg3",
"hsprg0", "hsprg1", "xer", "tar",
"fscr", "hfscr",
};
static const char *ldst_spr_names[] = {