From f252dba43d5bd5835c5bda941ca2f130f5e030ef Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 8 Dec 2025 14:15:24 +1100 Subject: [PATCH] FPU: Only apply zero subtraction result sign rule when result is exactly zero The rule in the ISA about the sign of the result of a subtraction when the magnitude of the result is zero only applies when the operands are equal in magnitude but opposite in sign, i.e. when the result is exactly zero. Add a check using FPSCR[FI] to exclude the cases where the exact result is non-zero but gets truncated to zero by rounding. Signed-off-by: Paul Mackerras --- fpu.vhdl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpu.vhdl b/fpu.vhdl index cca49ff..515ac8e 100644 --- a/fpu.vhdl +++ b/fpu.vhdl @@ -3189,7 +3189,7 @@ begin v.writing_fpr := '1'; v.update_fprf := '1'; end if; - if r.is_subtract = '1' and v.result_class = ZERO then + if r.is_subtract = '1' and v.result_class = ZERO and v.fpscr(FPSCR_FI) = '0' then rsign := r.round_mode(0) and r.round_mode(1); end if; if r.negate = '1' and v.result_class /= NAN then