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antonblanchard.microwatt/litedram/gen-src
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Anton Blanchard 3275304a7f litedram: Remove variables.mak 
Instead of creating variables.mak, just pass the variables in on
the make command line.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2021-08-09 10:52:17 +10:00
..
sdram_init
litedram: Remove variables.mak
2021-08-09 10:52:17 +10:00
acorn-cle-215.yml
acorn: Add support for the Acorn CLE 215+
2020-08-07 15:42:07 +10:00
arty.yml
litedram: Remove old "VexRiscV" based initializations
2020-06-05 11:23:04 +10:00
dram-init-mem.vhdl
litedram: Update generator to work with latest LiteX
2020-07-08 17:32:21 +10:00
generate.py
litedram: Remove variables.mak
2021-08-09 10:52:17 +10:00
genesys2.yml
fpga: Add support for Genesys2
2020-08-07 15:42:28 +10:00
nexys-video.yml
litedram: Remove old "VexRiscV" based initializations
2020-06-05 11:23:04 +10:00
no-init-mem.vhdl
litedram: Split the init memory from the main wrapper
2020-05-25 11:33:09 +10:00
sim.yml
litedram: Remove old "VexRiscV" based initializations
2020-06-05 11:23:04 +10:00