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4fc321cd41d429b04aa314a760d518315f04e64b
antonblanchard.microwatt/asic
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Anton Blanchard 4fc321cd41 Move register stage back after the RAM 
The 512x64 DFFRAM has quite big hold violations that we can hopefully
work around by removing the register stage before the RAM.

Signed-off-by: Anton Blanchard <anton@linux.ibm.com>
2022-08-22 14:43:21 +10:00
..
behavioural
Add arrays for ASIC flow
2022-08-22 14:43:21 +10:00
cache_ram.vhdl
Add arrays for ASIC flow
2022-08-22 14:43:21 +10:00
main_bram.vhdl
Move register stage back after the RAM
2022-08-22 14:43:21 +10:00
microwatt_asic-verilator.cpp
Add ASIC target
2022-08-22 14:43:21 +10:00
multiply.vhdl
Add arrays for ASIC flow
2022-08-22 14:43:21 +10:00
register_file.vhdl
Add arrays for ASIC flow
2022-08-22 14:43:21 +10:00
top-asic.vhdl
Add simplebus
2022-08-22 14:43:21 +10:00