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https://github.com/antonblanchard/microwatt.git
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This checks that the instructions seem to update memory as expected, and also that they generate alignment interrupts when necessary. We don't check whether the memory update is atomic as we don't have SMP yet. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
211 lines
3.9 KiB
C
211 lines
3.9 KiB
C
#include <stddef.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include "console.h"
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extern unsigned long callit(unsigned long arg1, unsigned long arg2,
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unsigned long (*fn)(unsigned long, unsigned long));
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#define DSISR 18
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#define DAR 19
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#define SRR0 26
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#define SRR1 27
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#define PID 48
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#define SPRG0 272
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#define SPRG1 273
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#define PRTBL 720
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static inline unsigned long mfspr(int sprnum)
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{
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long val;
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__asm__ volatile("mfspr %0,%1" : "=r" (val) : "i" (sprnum));
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return val;
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}
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static inline void mtspr(int sprnum, unsigned long val)
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{
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__asm__ volatile("mtspr %0,%1" : : "i" (sprnum), "r" (val));
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}
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static inline void store_pte(unsigned long *p, unsigned long pte)
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{
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__asm__ volatile("stdbrx %1,0,%0" : : "r" (p), "r" (pte) : "memory");
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}
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void print_string(const char *str)
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{
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for (; *str; ++str)
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putchar(*str);
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}
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void print_hex(unsigned long val, int ndigits)
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{
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int i, x;
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for (i = (ndigits - 1) * 4; i >= 0; i -= 4) {
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x = (val >> i) & 0xf;
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if (x >= 10)
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putchar(x + 'a' - 10);
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else
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putchar(x + '0');
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}
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}
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// i < 100
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void print_test_number(int i)
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{
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print_string("test ");
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putchar(48 + i/10);
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putchar(48 + i%10);
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putchar(':');
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}
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#define DO_LARX(instr, addr, val) __asm__ volatile(instr " %0,0,%1" : "=r" (val) : "r" (addr))
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#define DO_STCX(instr, addr, val, cc) __asm__ volatile(instr " %2,0,%1; mfcr %0" : "=r" (cc) \
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: "r" (addr), "r" (val) : "cr0", "memory");
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int resv_test_1(void)
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{
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unsigned long x, val, cc = 0;
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int count;
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x = 1234;
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for (count = 0; count < 1000; ++count) {
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DO_LARX("ldarx", &x, val);
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DO_STCX("stdcx.", &x, 5678, cc);
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if (cc & 0x20000000)
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break;
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}
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/* ldarx/stdcx. should succeed eventually */
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if (count == 1000)
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return 1;
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if (x != 5678)
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return 2;
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for (count = 0; count < 1000; ++count) {
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DO_LARX("lwarx", &x, val);
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DO_STCX("stwcx.", &x, 9876, cc);
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if (cc & 0x20000000)
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break;
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}
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/* lwarx/stwcx. should succeed eventually */
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if (count == 1000)
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return 3;
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if (x != 9876)
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return 4;
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for (count = 0; count < 1000; ++count) {
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DO_LARX("lharx", &x, val);
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DO_STCX("sthcx.", &x, 3210, cc);
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if (cc & 0x20000000)
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break;
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}
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/* lharx/sthcx. should succeed eventually */
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if (count == 1000)
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return 5;
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if (x != 3210)
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return 6;
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return 0;
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}
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unsigned long do_larx(unsigned long size, unsigned long addr)
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{
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unsigned long val;
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switch (size) {
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case 1:
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DO_LARX("lbarx", addr, val);
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break;
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case 2:
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DO_LARX("lharx", addr, val);
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break;
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case 4:
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DO_LARX("lwarx", addr, val);
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break;
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case 8:
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DO_LARX("ldarx", addr, val);
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break;
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}
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return 0;
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}
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unsigned long do_stcx(unsigned long size, unsigned long addr)
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{
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unsigned long val = 0, cc;
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switch (size) {
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case 1:
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DO_STCX("stbcx.", addr, val, cc);
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break;
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case 2:
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DO_STCX("sthcx.", addr, val, cc);
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break;
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case 4:
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DO_STCX("stwcx.", addr, val, cc);
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break;
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case 8:
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DO_STCX("stdcx.", addr, val, cc);
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break;
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}
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return 0;
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}
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int resv_test_2(void)
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{
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unsigned long x[3];
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unsigned long offset, j, size, ret;
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x[0] = 1234;
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x[1] = x[2] = 0;
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for (j = 0; j <= 3; ++j) {
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size = 1 << j;
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for (offset = 0; offset < 16; ++offset) {
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ret = callit(size, (unsigned long)&x[0] + offset, do_larx);
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if (0 && ret == 0 && (offset & (size - 1)) != 0)
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return j + 1;
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if (ret == 0x600) {
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if ((offset & (size - 1)) == 0)
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return j + 0x10;
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} else if (ret)
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return ret;
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ret = callit(size, (unsigned long)&x[0] + offset, do_stcx);
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if (ret == 0 && (offset & (size - 1)) != 0)
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return j + 0x20;
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if (ret == 0x600) {
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if ((offset & (size - 1)) == 0)
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return j + 0x30;
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} else if (ret)
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return ret;
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}
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}
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return 0;
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}
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int fail = 0;
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void do_test(int num, int (*test)(void))
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{
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int ret;
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print_test_number(num);
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ret = test();
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if (ret == 0) {
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print_string("PASS\r\n");
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} else {
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fail = 1;
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print_string("FAIL ");
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print_hex(ret, 4);
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print_string("\r\n");
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}
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}
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int main(void)
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{
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console_init();
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do_test(1, resv_test_1);
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do_test(2, resv_test_2);
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return fail;
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}
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