mirror of
https://github.com/antonblanchard/microwatt.git
synced 2026-01-11 23:43:15 +00:00
9880fc7435
This puts the logic that selects which bits of the multiplier result get written into the destination GPR into execute1, moved out from multiply. The multiplier is now expected to do an unsigned multiplication of 64-bit operands, optionally negate the result, detect 32-bit or 64-bit signed overflow of the result, and return a full 128-bit result. Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
265 lines
7.5 KiB
VHDL
265 lines
7.5 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library work;
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use work.decode_types.all;
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use work.common.all;
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use work.glibc_random.all;
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use work.ppc_fx_insns.all;
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entity multiply_tb is
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end multiply_tb;
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architecture behave of multiply_tb is
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signal clk : std_ulogic;
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constant clk_period : time := 10 ns;
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constant pipeline_depth : integer := 4;
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signal m1 : Execute1ToMultiplyType := Execute1ToMultiplyInit;
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signal m2 : MultiplyToExecute1Type;
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function absval(x: std_ulogic_vector) return std_ulogic_vector is
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begin
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if x(x'left) = '1' then
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return std_ulogic_vector(- signed(x));
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else
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return x;
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end if;
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end;
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begin
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multiply_0: entity work.multiply
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generic map (PIPELINE_DEPTH => pipeline_depth)
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port map (clk => clk, m_in => m1, m_out => m2);
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clk_process: process
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begin
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clk <= '0';
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wait for clk_period/2;
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clk <= '1';
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wait for clk_period/2;
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end process;
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stim_process: process
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variable ra, rb, rt, behave_rt: std_ulogic_vector(63 downto 0);
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variable si: std_ulogic_vector(15 downto 0);
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begin
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wait for clk_period;
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m1.valid <= '1';
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m1.data1 <= x"0000000000001000";
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m1.data2 <= x"0000000000001111";
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wait for clk_period;
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assert m2.valid = '0';
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m1.valid <= '0';
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wait for clk_period;
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assert m2.valid = '0';
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wait for clk_period;
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assert m2.valid = '0';
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wait for clk_period;
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assert m2.valid = '1';
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assert m2.result = x"00000000000000000000000001111000";
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wait for clk_period;
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assert m2.valid = '0';
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m1.valid <= '1';
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wait for clk_period;
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assert m2.valid = '0';
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert m2.result = x"00000000000000000000000001111000";
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-- test mulld
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mulld_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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rb := pseudorand(rb'length);
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behave_rt := ppc_mulld(ra, rb);
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m1.data1 <= absval(ra);
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m1.data2 <= absval(rb);
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m1.neg_result <= ra(63) xor rb(63);
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(63 downto 0))
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report "bad mulld expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.result(63 downto 0));
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end loop;
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-- test mulhdu
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mulhdu_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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rb := pseudorand(rb'length);
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behave_rt := ppc_mulhdu(ra, rb);
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m1.data1 <= ra;
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m1.data2 <= rb;
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m1.neg_result <= '0';
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(127 downto 64))
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report "bad mulhdu expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.result(127 downto 64));
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end loop;
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-- test mulhd
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mulhd_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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rb := pseudorand(rb'length);
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behave_rt := ppc_mulhd(ra, rb);
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m1.data1 <= absval(ra);
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m1.data2 <= absval(rb);
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m1.neg_result <= ra(63) xor rb(63);
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(127 downto 64))
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report "bad mulhd expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.result(127 downto 64));
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end loop;
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-- test mullw
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mullw_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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rb := pseudorand(rb'length);
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behave_rt := ppc_mullw(ra, rb);
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m1.data1 <= (others => '0');
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m1.data1(31 downto 0) <= absval(ra(31 downto 0));
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m1.data2 <= (others => '0');
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m1.data2(31 downto 0) <= absval(rb(31 downto 0));
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m1.neg_result <= ra(31) xor rb(31);
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(63 downto 0))
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report "bad mullw expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.result(63 downto 0));
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end loop;
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-- test mulhw
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mulhw_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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rb := pseudorand(rb'length);
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behave_rt := ppc_mulhw(ra, rb);
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m1.data1 <= (others => '0');
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m1.data1(31 downto 0) <= absval(ra(31 downto 0));
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m1.data2 <= (others => '0');
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m1.data2(31 downto 0) <= absval(rb(31 downto 0));
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m1.neg_result <= ra(31) xor rb(31);
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(63 downto 32) & m2.result(63 downto 32))
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report "bad mulhw expected " & to_hstring(behave_rt) & " got " &
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to_hstring(m2.result(63 downto 32) & m2.result(63 downto 32));
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end loop;
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-- test mulhwu
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mulhwu_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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rb := pseudorand(rb'length);
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behave_rt := ppc_mulhwu(ra, rb);
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m1.data1 <= (others => '0');
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m1.data1(31 downto 0) <= ra(31 downto 0);
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m1.data2 <= (others => '0');
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m1.data2(31 downto 0) <= rb(31 downto 0);
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m1.neg_result <= '0';
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(63 downto 32) & m2.result(63 downto 32))
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report "bad mulhwu expected " & to_hstring(behave_rt) & " got " &
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to_hstring(m2.result(63 downto 32) & m2.result(63 downto 32));
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end loop;
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-- test mulli
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mulli_loop : for i in 0 to 1000 loop
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ra := pseudorand(ra'length);
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si := pseudorand(si'length);
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behave_rt := ppc_mulli(ra, si);
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m1.data1 <= absval(ra);
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m1.data2 <= (others => '0');
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m1.data2(15 downto 0) <= absval(si);
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m1.neg_result <= ra(63) xor si(15);
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m1.valid <= '1';
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wait for clk_period;
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m1.valid <= '0';
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wait for clk_period * (pipeline_depth-1);
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assert m2.valid = '1';
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assert to_hstring(behave_rt) = to_hstring(m2.result(63 downto 0))
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report "bad mulli expected " & to_hstring(behave_rt) & " got " & to_hstring(m2.result(63 downto 0));
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end loop;
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std.env.finish;
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wait;
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end process;
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end behave;
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