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https://github.com/antonblanchard/microwatt.git
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f2166d326c
When an arithmetic instruction generates an invalid operation exception or a divide by zero exception, and that exception is enabled in the FPSCR, the writing of the result to the destination register should be suppressed, leaving whatever value was last written in the destination. Add a check that this occurs correctly, for the cases of square root of a negative number (invalid operation exception) and division by zero (zero divide exception). Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
28 lines
378 B
Plaintext
28 lines
378 B
Plaintext
test 01:PASS
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test 02:PASS
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test 03:PASS
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test 04:PASS
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test 05:PASS
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test 06:PASS
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test 07:PASS
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test 08:PASS
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test 09:PASS
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test 10:PASS
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test 11:PASS
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test 12:PASS
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test 13:PASS
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test 14:PASS
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test 15:PASS
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test 16:PASS
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test 17:PASS
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test 18:PASS
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test 19:PASS
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test 20:PASS
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test 21:PASS
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test 22:PASS
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test 23:PASS
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test 24:PASS
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test 25:PASS
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test 26:PASS
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test 27:PASS
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