Paul Mackerras ff0744b795 execute1: Make CFAR able to be written using mtspr and read using DMI debug ...

mtspr to CFAR is currently a no-op, which is not what should happen.
Make it set the contents of CFAR.

Also provide access to CFAR via the DMI debug interface as register 0x31.

Fixes: c2da82764f ("core: Implement CFAR register", 2020-06-15)
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>

2024-12-20 20:32:11 +11:00

..

fmt_log

scripts/fmt_log: Update for recent changes

2023-09-16 20:44:53 +10:00

mw_debug

execute1: Make CFAR able to be written using mtspr and read using DMI debug

2024-12-20 20:32:11 +11:00

bin2hex.py

bin2hex: Make sure to generate little endian files

2020-06-02 19:56:08 +10:00

dependencies.py

uart: Rename sim_uart.vhdl to sim_pp_uart.vhdl

2020-06-24 09:53:46 +10:00

gen_icache_tb.py

icache_tb: Improve test and include test file

2019-10-18 16:41:05 +11:00

make_version_fusesoc.py

syscon: Implement a register for storing git hash info

2022-08-29 14:58:35 +10:00

make_version.sh

syscon: Implement a register for storing git hash info

2022-08-29 14:58:35 +10:00

run_test_console.sh

test: Add test for metavalues

2022-07-28 15:39:31 +10:00

run_test.sh

scripts/run_test: Use grep -E instead of egrep

2024-01-19 12:33:53 +11:00

test_micropython_long.py

Update micropython

2020-01-19 21:36:38 +11:00

test_micropython_verilator_long.py

makefile: Add some verilator micropython tests

2021-08-14 19:36:29 +10:00

test_micropython_verilator.py

makefile: Add some verilator micropython tests

2021-08-14 19:36:29 +10:00

test_micropython.py

Update micropython

2020-01-19 21:36:38 +11:00

vhdltags

Add VHDL TAGS

2020-04-23 15:00:37 +10:00