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Some Musashi mapping and RTG fixes/debug

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This commit is contained in:
beeanyew 2021-01-06 13:13:05 +01:00
parent 89261d0005
commit 2e76e75128
5 changed files with 87 additions and 74 deletions
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9
emulator.c
View File

@ -25,6 +25,15 @@
#include "platforms/amiga/rtg/rtg.h"
#include "gpio/gpio.h"
unsigned char read_ranges;
unsigned int read_addr[8];
unsigned int read_upper[8];
unsigned char *read_data[8];
unsigned char write_ranges;
unsigned int write_addr[8];
unsigned int write_upper[8];
unsigned char *write_data[8];
int kb_hook_enabled = 0;
int mouse_hook_enabled = 0;
int cpu_emulation_running = 1;

15
m68kcpu.c
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@ -45,15 +45,6 @@ extern unsigned char m68ki_cycles[][0x10000];
extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
extern void m68ki_build_opcode_table(void);
static unsigned char read_ranges;
static unsigned int read_addr[8];
static unsigned int read_upper[8];
static unsigned char *read_data[8];
static unsigned char write_ranges;
static unsigned int write_addr[8];
static unsigned int write_upper[8];
static unsigned char *write_data[8];
#include "m68kops.h"
#include "m68kcpu.h"
@ -948,6 +939,10 @@ void m68k_set_cpu_type(unsigned int cpu_type)
}
}
uint m68k_get_address_mask() {
return m68ki_cpu.address_mask;
}
/* Execute some instructions until we use up num_cycles clock cycles */
/* ASG: removed per-instruction interrupt checks */
int m68k_execute(int num_cycles)
@ -993,9 +988,11 @@ int m68k_execute(int num_cycles)
REG_PPC = REG_PC;
/* Record previous D/A register state (in case of bus error) */
#ifdef M68K_BUSERR_THING
for (i = 15; i >= 0; i--){
REG_DA_SAVE[i] = REG_DA[i];
}
#endif
/* Read an instruction and call its handler */
REG_IR = m68ki_read_imm_16();

16
m68kcpu.h
View File

@ -1126,14 +1126,14 @@ static inline uint m68ki_read_imm_32(void)
* code if they are enabled in m68kconf.h.
*/
static unsigned char read_ranges;
static unsigned int read_addr[8];
static unsigned int read_upper[8];
static unsigned char *read_data[8];
static unsigned char write_ranges;
static unsigned int write_addr[8];
static unsigned int write_upper[8];
static unsigned char *write_data[8];
extern unsigned char read_ranges;
extern unsigned int read_addr[8];
extern unsigned int read_upper[8];
extern unsigned char *read_data[8];
extern unsigned char write_ranges;
extern unsigned int write_addr[8];
extern unsigned int write_upper[8];
extern unsigned char *write_data[8];
static inline uint m68ki_read_8_fc(uint address, uint fc)
{

79
platforms/amiga/rtg/rtg.c
View File

@ -8,7 +8,8 @@
#include "../../../config_file/config_file.h"
static uint8_t rtg_u8[4];
static uint16_t rtg_x[3], rtg_y[3];
static uint16_t rtg_x[8], rtg_y[8];
static uint16_t rtg_user[8];
static uint16_t rtg_format;
static uint32_t rtg_address[2];
static uint32_t rtg_rgb[2];
@ -91,9 +92,14 @@ struct timespec diff(struct timespec start, struct timespec end)
return temp;
}
#define CHKREG(a, b) case a: b = value; break;
void rtg_write(uint32_t address, uint32_t value, uint8_t mode) {
//printf("%s write to RTG: %.8X (%.8X)\n", op_type_names[mode], address, value);
if (address >= PIGFX_REG_SIZE) {
/*if ((address - PIGFX_REG_SIZE) < framebuffer_addr) {// || (address - PIGFX_REG_SIZE) > framebuffer_addr + ((rtg_display_width << rtg_display_format) * rtg_display_height)) {
printf("Write to RTG memory outside frame buffer %.8X (%.8X).\n", (address - PIGFX_REG_SIZE), framebuffer_addr);
}*/
if (rtg_mem) {
switch (mode) {
case OP_TYPE_BYTE:
@ -114,43 +120,27 @@ void rtg_write(uint32_t address, uint32_t value, uint8_t mode) {
switch (mode) {
case OP_TYPE_BYTE:
switch (address) {
case RTG_U81:
rtg_u8[0] = value;
break;
case RTG_U82:
rtg_u8[1] = value;
break;
case RTG_U83:
rtg_u8[2] = value;
break;
case RTG_U84:
rtg_u8[3] = value;
break;
CHKREG(RTG_U81, rtg_u8[0]);
CHKREG(RTG_U82, rtg_u8[1]);
CHKREG(RTG_U83, rtg_u8[2]);
CHKREG(RTG_U84, rtg_u8[3]);
}
break;
case OP_TYPE_WORD:
switch (address) {
case RTG_X1:
rtg_x[0] = value;
break;
case RTG_X2:
rtg_x[1] = value;
break;
case RTG_X3:
rtg_x[2] = value;
break;
case RTG_Y1:
rtg_y[0] = value;
break;
case RTG_Y2:
rtg_y[1] = value;
break;
case RTG_Y3:
rtg_y[2] = value;
break;
case RTG_FORMAT:
rtg_format = value;
break;
CHKREG(RTG_X1, rtg_x[0]);
CHKREG(RTG_X2, rtg_x[1]);
CHKREG(RTG_X3, rtg_x[2]);
CHKREG(RTG_X4, rtg_x[3]);
CHKREG(RTG_X5, rtg_x[4]);
CHKREG(RTG_Y1, rtg_y[0]);
CHKREG(RTG_Y2, rtg_y[1]);
CHKREG(RTG_Y3, rtg_y[2]);
CHKREG(RTG_Y4, rtg_y[3]);
CHKREG(RTG_Y5, rtg_y[4]);
CHKREG(RTG_U1, rtg_user[0]);
CHKREG(RTG_U2, rtg_user[1]);
CHKREG(RTG_FORMAT, rtg_format);
case RTG_COMMAND:
handle_rtg_command(value);
break;
@ -225,8 +215,8 @@ static void handle_rtg_command(uint32_t cmd) {
break;
case RTGCMD_ENABLE:
case RTGCMD_SETSWITCH:
printf("RTG SetSwitch %s\n", ((rtg_x[0]) & 0x01) ? "enabled" : "disabled");
printf("LAL: %.4X\n", rtg_x[0]);
//printf("RTG SetSwitch %s\n", ((rtg_x[0]) & 0x01) ? "enabled" : "disabled");
//printf("LAL: %.4X\n", rtg_x[0]);
if (display_enabled != ((rtg_x[0]) & 0x01)) {
display_enabled = ((rtg_x[0]) & 0x01);
if (display_enabled) {
@ -239,13 +229,16 @@ static void handle_rtg_command(uint32_t cmd) {
case RTGCMD_FILLRECT:
rtg_fillrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_rgb[0], rtg_x[2], rtg_format, 0xFF);
break;
case RTGCMD_BLITRECT:
rtg_blitrect(rtg_x[0], rtg_y[0], rtg_x[1], rtg_y[1], rtg_x[2], rtg_y[2], rtg_x[3], rtg_format, 0xFF);
}
}
void rtg_fillrect(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint32_t color, uint16_t pitch, uint16_t format, uint8_t mask) {
if (mask || pitch) {}
uint8_t *dptr = &rtg_mem[framebuffer_addr + (x << format) + (y * rtg_pitch)];
if (mask) {}
uint8_t *dptr = &rtg_mem[framebuffer_addr + (x << format) + (y * pitch)];
//printf("FillRect: %d,%d to %d,%d C%.8X, p:%d dp: %d m:%.2X\n", x, y, x+w, y+h, color, pitch, rtg_pitch, mask);
//printf("%.8X - %.8X (%p)\n", framebuffer_addr, framebuffer_addr_adj, dptr);
switch(format) {
case RTGFMT_8BIT: {
//printf("Incoming 8-bit color: %.8X\n", color);
@ -275,7 +268,13 @@ void rtg_fillrect(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint32_t color
}
}
for (int ys = 1; ys < h; ys++) {
dptr += rtg_pitch;
memcpy(dptr, (void *)(size_t)(dptr - rtg_pitch), (w << format));
dptr += pitch;
memcpy(dptr, (void *)(size_t)(dptr - pitch), (w << format));
}
}
void rtg_blitrect(uint16_t x, uint16_t y, uint16_t dx, uint16_t dy, uint16_t w, uint16_t h, uint16_t pitch, uint16_t format, uint8_t mask) {
if (mask) {}
uint8_t *sptr = &rtg_mem[framebuffer_addr + (x << format) + (y * pitch)];
uint8_t *dptr = &rtg_mem[framebuffer_addr + (dx << format) + (dy * pitch)];
}

42
platforms/amiga/rtg/rtg.h
View File

@ -6,22 +6,28 @@
#define CARD_OFFSET 0
enum pi_regs {
RTG_COMMAND = CARD_OFFSET + 0x00,
RTG_X1 = CARD_OFFSET + 0x02,
RTG_X2 = CARD_OFFSET + 0x04,
RTG_X3 = CARD_OFFSET + 0x06,
RTG_Y1 = CARD_OFFSET + 0x08,
RTG_Y2 = CARD_OFFSET + 0x0A,
RTG_Y3 = CARD_OFFSET + 0x0C,
RTG_FORMAT = CARD_OFFSET + 0x0E,
RTG_RGB1 = CARD_OFFSET + 0x10,
RTG_RGB2 = CARD_OFFSET + 0x14,
RTG_ADDR1 = CARD_OFFSET + 0x18,
RTG_ADDR2 = CARD_OFFSET + 0x1C,
RTG_U81 = CARD_OFFSET + 0x20,
RTG_U82 = CARD_OFFSET + 0x21,
RTG_U83 = CARD_OFFSET + 0x22,
RTG_U84 = CARD_OFFSET + 0x23,
RTG_COMMAND = 0x00,
RTG_X1 = 0x02,
RTG_X2 = 0x04,
RTG_X3 = 0x06,
RTG_Y1 = 0x08,
RTG_Y2 = 0x0A,
RTG_Y3 = 0x0C,
RTG_FORMAT = 0x0E,
RTG_RGB1 = 0x10,
RTG_RGB2 = 0x14,
RTG_ADDR1 = 0x18,
RTG_ADDR2 = 0x1C,
RTG_U81 = 0x20,
RTG_U82 = 0x21,
RTG_U83 = 0x22,
RTG_U84 = 0x23,
RTG_X4 = 0x24,
RTG_X5 = 0x26,
RTG_Y4 = 0x28,
RTG_Y5 = 0x2A,
RTG_U1 = 0x2C,
RTG_U2 = 0x2E,
};
enum rtg_cmds {
@ -32,6 +38,7 @@ enum rtg_cmds {
RTGCMD_SETDISPLAY,
RTGCMD_SETSWITCH,
RTGCMD_FILLRECT,
RTGCMD_BLITRECT,
};
enum rtg_formats {
@ -48,4 +55,5 @@ void rtg_set_clut_entry(uint8_t index, uint32_t xrgb);
void rtg_init_display();
void rtg_shutdown_display();
void rtg_fillrect(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint32_t color, uint16_t pitch, uint16_t format, uint8_t mask);
void rtg_fillrect(uint16_t x, uint16_t y, uint16_t w, uint16_t h, uint32_t color, uint16_t pitch, uint16_t format, uint8_t mask);
void rtg_blitrect(uint16_t x, uint16_t y, uint16_t dx, uint16_t dy, uint16_t w, uint16_t h, uint16_t pitch, uint16_t format, uint8_t mask);