Added support for C1/C3 clock calculation

This commit is contained in:
Marcus Agehall 2021-10-14 16:41:35 +02:00
parent 2c2b91e1bd
commit 36afc41b13
7 changed files with 27672 additions and 27663 deletions

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

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@ -110,10 +110,14 @@ set_location_assignment PIN_73 -to M68K_UDS_n
set_location_assignment PIN_74 -to M68K_LDS_n
set_location_assignment PIN_75 -to M68K_RW
set_location_assignment PIN_76 -to M68K_DTACK_n
set_location_assignment PIN_51 -to CLK_SEL
set_location_assignment PIN_99 -to M68K_C1
set_location_assignment PIN_100 -to M68K_C3
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to M68K_IPL_n[0]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to M68K_IPL_n[1]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to M68K_IPL_n[2]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to M68K_IPL_n[0]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to M68K_IPL_n[1]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to M68K_IPL_n[2]
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to CLK_SEL
set_global_assignment -name AUTO_RESTART_CONFIGURATION OFF
set_global_assignment -name ENABLE_OCT_DONE OFF

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@ -41,7 +41,8 @@ set_time_format -unit ns -decimal_places 3
create_clock -name {PI_CLK} -period 5.000 [get_ports {PI_CLK}]
create_clock -name {M68K_CLK} -period 141.000 [get_ports {M68K_CLK}]
create_clock -name {M68K_C1} -period 282.000 [get_ports {M68K_C1}]
create_clock -name {M68K_C3} -period 282.000 [get_ports {M68K_C3}]
#**************************************************************
# Create Generated Clock

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@ -46,13 +46,17 @@ module pistorm(
input M68K_BR_n,
output reg M68K_BG_n,
input M68K_BGACK_n
input M68K_BGACK_n,
input M68K_C1,
input M68K_C3,
input CLK_SEL
);
wire c200m = PI_CLK;
reg [2:0] c7m_sync;
// wire c7m = M68K_CLK;
wire c7m = c7m_sync[2];
wire c1c3_clk = !(M68K_C1 ^ M68K_C3);
localparam REG_DATA = 2'd0;
localparam REG_ADDR_LO = 2'd1;
@ -122,7 +126,7 @@ module pistorm(
reg a0;
always @(posedge c200m) begin
c7m_sync <= {c7m_sync[1:0], M68K_CLK};
c7m_sync <= {c7m_sync[1:0], (CLK_SEL?M68K_CLK:c1c3_clk)};
end
wire c7m_rising = !c7m_sync[2] && c7m_sync[1];