From eea4bcfafa87adec3d37f45b578434d350652412 Mon Sep 17 00:00:00 2001
From: beeanyew <beeanyew@gmail.com>
Date: Wed, 11 Aug 2021 14:18:40 +0200
Subject: [PATCH] Some more Chip fastpath stability stuff

---
 emulator.c         | 3 ++-
 gpio/ps_protocol.c | 7 +++++++
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/emulator.c b/emulator.c
index d983d96..5c3bde6 100644
--- a/emulator.c
+++ b/emulator.c
@@ -231,7 +231,8 @@ cpu_loop:
       }
       if (last_irq != 0 && last_irq != last_last_irq) {
         last_last_irq = last_irq;
-        M68K_SET_IRQ(last_irq);
+        if (ipl_enabled[last_irq])
+          M68K_SET_IRQ(last_irq);
       }
       m68k_execute(state, 50);
   }
diff --git a/gpio/ps_protocol.c b/gpio/ps_protocol.c
index 0e9da82..8198948 100644
--- a/gpio/ps_protocol.c
+++ b/gpio/ps_protocol.c
@@ -236,6 +236,7 @@ void ps_write_status_reg(unsigned int value) {
   *(gpio + 7) = 1 << PIN_WR; // delay
 #ifdef CHIP_FASTPATH
   *(gpio + 7) = 1 << PIN_WR; // delay 210810
+  *(gpio + 7) = 1 << PIN_WR; // delay 210810
 #endif
   *(gpio + 10) = 1 << PIN_WR;
   *(gpio + 10) = 0xffffec;
@@ -246,7 +247,9 @@ void ps_write_status_reg(unsigned int value) {
 }
 
 unsigned int ps_read_status_reg() {
+  GPFSEL_OUTPUT;
   *(gpio + 7) = (REG_STATUS << PIN_A0);
+
   *(gpio + 7) = 1 << PIN_RD;
   *(gpio + 7) = 1 << PIN_RD;
   *(gpio + 7) = 1 << PIN_RD;
@@ -254,8 +257,12 @@ unsigned int ps_read_status_reg() {
 #ifdef CHIP_FASTPATH
   *(gpio + 7) = 1 << PIN_RD; // delay 210810
   *(gpio + 7) = 1 << PIN_RD; // delay 210810
+  *(gpio + 7) = 1 << PIN_RD; // delay 210810
+  *(gpio + 7) = 1 << PIN_RD; // delay 210810
 #endif
 
+  GPFSEL_INPUT;
+
   unsigned int value = *(gpio + 13);
   while ((value=*(gpio + 13)) & (1 << PIN_TXN_IN_PROGRESS)) {}