mirror of
https://github.com/captain-amygdala/pistorm.git
synced 2026-01-25 11:36:08 +00:00
cleaned up write functions, added gayle
This commit is contained in:
Claude
parent
2aa4f43aba
commit
fb02e9af52
4
Makefile
4
Makefile
@ -1,6 +1,6 @@
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EXENAME = emulator
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MAINFILES = emulator.c
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MAINFILES = emulator.c Gayle.c ide.c
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MUSASHIFILES = m68kcpu.c softfloat/softfloat.c
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MUSASHIGENCFILES = m68kops.c
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MUSASHIGENHFILES = m68kops.h
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@ -17,7 +17,7 @@ EXEPATH = ./
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CC = gcc
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WARNINGS = -Wall -Wextra -pedantic
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CFLAGS = $(WARNINGS) -march=armv7 -O3
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LFLAGS = $(WARNINGS)
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LFLAGS = $(WARNINGS)
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TARGET = $(EXENAME)$(EXE)
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263
emulator.c
263
emulator.c
@ -13,9 +13,11 @@
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#include "m68k.h"
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#include "main.h"
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#include<pthread.h>
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#include "Gayle.h"
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#include "ide.h"
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//#define BCM2708_PERI_BASE 0x20000000 //pi0-1
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//#define BCM2708_PERI_BASE 0xFE000000 //pi4
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#define BCM2708_PERI_BASE 0x3F000000 //pi3
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#define BCM2708_PERI_SIZE 0x01000000
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#define GPIO_BASE (BCM2708_PERI_BASE + 0x200000) /* GPIO controller */
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@ -48,27 +50,13 @@ do { \
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} while (0)
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#define MAX_RAM 0xFFFFFF
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/* Read/write macros */
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#define READ_BYTE(BASE, ADDR) (BASE)[ADDR]
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#define READ_WORD(BASE, ADDR) (((BASE)[ADDR]<<8) | \
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(BASE)[(ADDR)+1])
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#define READ_LONG(BASE, ADDR) (((BASE)[ADDR]<<24) | \
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((BASE)[(ADDR)+1]<<16) | \
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((BASE)[(ADDR)+2]<<8) | \
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(BASE)[(ADDR)+3])
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#define WRITE_BYTE(BASE, ADDR, VAL) (BASE)[ADDR] = (VAL)&0xff
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#define WRITE_WORD(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL)>>8) & 0xff; \
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(BASE)[(ADDR)+1] = (VAL)&0xff
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#define WRITE_LONG(BASE, ADDR, VAL) (BASE)[ADDR] = ((VAL)>>24) & 0xff; \
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(BASE)[(ADDR)+1] = ((VAL)>>16)&0xff; \
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(BASE)[(ADDR)+2] = ((VAL)>>8)&0xff; \
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(BASE)[(ADDR)+3] = (VAL)&0xff
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#define FASTBASE 0x07FFFFFF
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//#define FASTSIZE 0xFFFFFF
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#define FASTSIZE 0xFFFFFFF
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#define GAYLEBASE 0xD80000 //D7FFFF
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#define GAYLESIZE 0x6FFFF
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int mem_fd;
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int mem_fd_gpclk;
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@ -118,10 +106,12 @@ volatile uint32_t srdata2;
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volatile uint32_t srdata2_old;
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unsigned char g_ram[MAX_RAM+1]; /* RAM */
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unsigned char g_ram[FASTSIZE+1]; /* RAM */
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unsigned char toggle;
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void* iplThread(void *args){
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printf("thread!/n");
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@ -141,10 +131,13 @@ while(42){
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}
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} else {
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if (toggle != 0){
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srdata = read_reg();
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/*
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srdata = read_reg();
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srdata2 = ((srdata >> 13)&0xff);
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srdata2_old = srdata;
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m68k_set_irq(srdata2);
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*/
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m68k_set_irq(0);
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//printf("STATUS: 0\n");
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toggle = 0;
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}
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@ -168,6 +161,21 @@ const struct sched_param priority = {99};
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mlockall(MCL_CURRENT); // lock in memory to keep us from paging out
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InitGayle();
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/*
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int fd;
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ide0 = ide_allocate("cf");
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fd = open("hd0.img", O_RDWR);
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if (fd == -1){
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printf("HDD Image hd0.image failed open\n");
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}else{
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ide_attach(ide0, 0, fd);
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ide_reset_begin(ide0);
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printf("HDD Image hd0.image attached\n");
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}
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*/
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setup_io();
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//Enable 200MHz CLK output on GPIO4, adjust divider and pll source depending on pi model
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@ -236,6 +244,7 @@ const struct sched_param priority = {99};
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write_reg(0x01);
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usleep(100);
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usleep(1500);
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write_reg(0x00);
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usleep(100);
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@ -243,12 +252,13 @@ const struct sched_param priority = {99};
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write8(0xbfe201,0x0001); //AMIGA OVL
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write8(0xbfe001,0x0001); //AMIGA OVL high (ROM@0x0)
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usleep(1000);
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usleep(1500);
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m68k_init();
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m68k_set_cpu_type(M68K_CPU_TYPE_68040);
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m68k_set_cpu_type(M68K_CPU_TYPE_68EC030);
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m68k_pulse_reset();
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srdata2_old = read_reg();
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printf("STATUS: %d\n", srdata2_old);
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toggle = 0;
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/*
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@ -264,11 +274,20 @@ const struct sched_param priority = {99};
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m68k_pulse_reset();
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while(42) {
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m68k_execute(600);
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m68k_execute(150);
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//usleep(1);
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if (GET_GPIO(1) == 0){
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//printf("IRQ:0x%06x\n",CheckIrq());
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/*
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if (CheckIrq() == 1)
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m68k_set_irq(2);
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else
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m68k_set_irq(0);
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*/
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if (GET_GPIO(1) == 0 || CheckIrq() == 1){
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srdata = read_reg();
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// if (CheckIrq() == 1) srdata |= (1 << 14);
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if (srdata != srdata2_old){
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srdata2 = ((srdata >> 13)&0xff);
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//printf("STATUS: %d\n", srdata2);
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@ -277,8 +296,9 @@ const struct sched_param priority = {99};
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toggle = 1;
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}
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} else {
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if (toggle != 0){
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srdata = read_reg();
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srdata = read_reg();
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srdata2 = ((srdata >> 13)&0xff);
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srdata2_old = srdata;
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m68k_set_irq(srdata2);
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@ -287,7 +307,6 @@ const struct sched_param priority = {99};
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}
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}
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}
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return 0;
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@ -313,8 +332,12 @@ int cpu_irq_ack(int level)
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unsigned int m68k_read_memory_8(unsigned int address){
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if(address>0x07FFFFFF){
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return g_ram[address- 0x07FFFFFF];
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if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
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return readGayleB(address);
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}
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if(address>FASTBASE){
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return g_ram[address- FASTBASE];
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}
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return read8((uint32_t)address);
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@ -322,8 +345,12 @@ unsigned int m68k_read_memory_8(unsigned int address){
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unsigned int m68k_read_memory_16(unsigned int address){
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if(address>0x07FFFFFF){
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uint16_t value = *(uint16_t*)&g_ram[address- 0x07FFFFFF];
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if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
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return readGayle(address);
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}
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if(address>FASTBASE){
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uint16_t value = *(uint16_t*)&g_ram[address- FASTBASE];
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value = (value << 8) | (value >> 8);
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return value;
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}
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@ -332,9 +359,12 @@ unsigned int m68k_read_memory_16(unsigned int address){
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unsigned int m68k_read_memory_32(unsigned int address){
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if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
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return readGayleL(address);
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}
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if(address>0x07FFFFFF){
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uint32_t value = *(uint32_t*)&g_ram[address- 0x07FFFFFF];
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if(address>FASTBASE){
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uint32_t value = *(uint32_t*)&g_ram[address- FASTBASE];
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value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
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return value << 16 | value >> 16;
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}
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@ -347,8 +377,14 @@ unsigned int m68k_read_memory_32(unsigned int address){
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void m68k_write_memory_8(unsigned int address, unsigned int value){
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if(address>0x07FFFFFF){
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g_ram[address- 0x07FFFFFF] = value;
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if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
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writeGayleB(address, value);
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return;
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}
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if(address>FASTBASE){
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g_ram[address- FASTBASE] = value;
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return;
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}
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@ -359,8 +395,14 @@ void m68k_write_memory_8(unsigned int address, unsigned int value){
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void m68k_write_memory_16(unsigned int address, unsigned int value){
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// if (address==0xdff030) printf("%c", value);
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if(address>0x07FFFFFF){
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uint16_t* dest = (uint16_t*)&g_ram[address- 0x07FFFFFF];
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if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
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writeGayle(address,value);
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return;
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}
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if(address>FASTBASE){
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uint16_t* dest = (uint16_t*)&g_ram[address- FASTBASE];
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value = (value << 8) | (value >> 8);
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*dest = value;
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return;
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@ -373,8 +415,12 @@ void m68k_write_memory_16(unsigned int address, unsigned int value){
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void m68k_write_memory_32(unsigned int address, unsigned int value){
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if(address>0x07FFFFFF){
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uint32_t* dest = (uint32_t*)&g_ram[address- 0x07FFFFFF];
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if(address>GAYLEBASE && address<GAYLEBASE + GAYLESIZE){
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writeGayleL(address, value);
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}
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if(address>FASTBASE){
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uint32_t* dest = (uint32_t*)&g_ram[address- FASTBASE];
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value = ((value << 8) & 0xFF00FF00 ) | ((value >> 8) & 0xFF00FF );
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value = value << 16 | value >> 16;
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*dest = value;
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@ -386,6 +432,7 @@ void m68k_write_memory_32(unsigned int address, unsigned int value){
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return;
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}
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/*
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void write32(uint32_t address, uint32_t data){
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write16(address+2 , data);
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write16(address , data >>16 );
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@ -396,45 +443,44 @@ uint32_t read32(uint32_t address){
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uint16_t b = read16(address);
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return (a>>16)|b;
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}
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*/
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void write16(uint32_t address, uint32_t data)
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{
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asm volatile ("dmb" ::: "memory");
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uint32_t addr_h_s = (address & 0x0000ffff) << 8;
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uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
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uint32_t addr_l_s = (address >> 16) << 8;
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uint32_t addr_l_r = (~address >> 16) << 8;
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uint32_t data_s = (data & 0x0000ffff) << 8;
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uint32_t data_r = (~data & 0x0000ffff) << 8;
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// asm volatile ("dmb" ::: "memory");
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W16
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// asm volatile ("nop" ::);
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// asm volatile ("nop" ::);
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// asm volatile ("nop" ::);
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//write phase
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*(gpio) = gpfsel0_o;
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*(gpio + 1) = gpfsel1_o;
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*(gpio + 2) = gpfsel2_o;
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*(gpio + 7) = (address & 0x0000ffff) << 8;
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*(gpio + 10) = (~address & 0x0000ffff) << 8;
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*(gpio + 7) = addr_h_s;
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*(gpio + 10) = addr_h_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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GPIO_SET = 1 << 7;
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*(gpio + 7) = (address >> 16) << 8;
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*(gpio + 10) = (~address >> 16) << 8;
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*(gpio + 7) = addr_l_s;
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*(gpio + 10) = addr_l_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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GPIO_SET = 1 << 7;
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//write phase
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*(gpio + 7) = (data & 0x0000ffff) << 8;
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*(gpio + 10) = (~data & 0x0000ffff) << 8;
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*(gpio + 7) = data_s;
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*(gpio + 10) = data_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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GPIO_SET = 1 << 7;
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*(gpio) = gpfsel0;
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*(gpio + 1) = gpfsel1;
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*(gpio + 2) = gpfsel2;
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while ((GET_GPIO(0)));
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asm volatile ("dmb" ::: "memory");
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// asm volatile ("dmb" ::: "memory");
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}
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@ -444,74 +490,71 @@ void write8(uint32_t address, uint32_t data)
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if ((address & 1) == 0)
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data = data + (data << 8); //EVEN, A0=0,UDS
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else data = data & 0xff ; //ODD , A0=1,LDS
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uint32_t addr_h_s = (address & 0x0000ffff) << 8;
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uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
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uint32_t addr_l_s = (address >> 16) << 8;
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uint32_t addr_l_r = (~address >> 16) << 8;
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uint32_t data_s = (data & 0x0000ffff) << 8;
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uint32_t data_r = (~data & 0x0000ffff) << 8;
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asm volatile ("dmb" ::: "memory");
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// asm volatile ("dmb" ::: "memory");
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W8
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// asm volatile ("nop" ::);
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// asm volatile ("nop" ::);
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// asm volatile ("nop" ::);
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//write phase
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*(gpio) = gpfsel0_o;
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*(gpio + 1) = gpfsel1_o;
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*(gpio + 2) = gpfsel2_o;
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*(gpio + 7) = (address & 0x0000ffff) << 8;
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*(gpio + 10) = (~address & 0x0000ffff) << 8;
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*(gpio + 7) = addr_h_s;
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*(gpio + 10) = addr_h_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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*(gpio + 7) = (address >> 16) << 8;
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*(gpio + 10) = (~address >> 16) << 8;
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*(gpio + 7) = addr_l_s;
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*(gpio + 10) = addr_l_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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//write phase
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*(gpio + 7) = (data & 0x0000ffff) << 8;
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*(gpio + 10) = (~data & 0x0000ffff) << 8;
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*(gpio + 7) = data_s;
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*(gpio + 10) = data_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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*(gpio) = gpfsel0;
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*(gpio + 1) = gpfsel1;
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*(gpio + 2) = gpfsel2;
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while ((GET_GPIO(0)));
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asm volatile ("dmb" ::: "memory");
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// asm volatile ("dmb" ::: "memory");
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GPIO_SET = 1 << 7;
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}
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uint32_t read16(uint32_t address)
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{
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volatile int val;
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// while ((GET_GPIO(0)));
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asm volatile ("dmb" ::: "memory");
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uint32_t addr_h_s = (address & 0x0000ffff) << 8;
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uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
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uint32_t addr_l_s = (address >> 16) << 8;
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uint32_t addr_l_r = (~address >> 16) << 8;
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// asm volatile ("dmb" ::: "memory");
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R16
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// asm volatile ("nop" ::);
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// asm volatile ("nop" ::);
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// asm volatile ("nop" ::);
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//write phase
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*(gpio) = gpfsel0_o;
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*(gpio + 1) = gpfsel1_o;
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*(gpio + 2) = gpfsel2_o;
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val = address;// & 0x0000FFFF;
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*(gpio + 7) = (val & 0xffff) << 8;
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*(gpio + 10) = (~val & 0xffff) << 8;
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*(gpio + 7) = addr_h_s;
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*(gpio + 10) = addr_h_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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val = address >> 16;
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*(gpio + 7) = (val & 0xffff) << 8;
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*(gpio + 10) = (~val & 0xffff) << 8;
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*(gpio + 7) = addr_l_s;
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*(gpio + 10) = addr_l_r;
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GPIO_CLR = 1 << 7;
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// GPIO_CLR = 1 << 7; //delay
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GPIO_SET = 1 << 7;
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//read phase
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*(gpio) = gpfsel0;
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@ -521,9 +564,12 @@ uint32_t read16(uint32_t address)
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||||
GPIO_CLR = 1 << 6;
|
||||
while (!(GET_GPIO(0)));
|
||||
GPIO_CLR = 1 << 6;
|
||||
val = *(gpio + 13);
|
||||
asm volatile ("nop" ::);
|
||||
asm volatile ("nop" ::);
|
||||
asm volatile ("nop" ::);
|
||||
val = *(gpio + 13);
|
||||
GPIO_SET = 1 << 6;
|
||||
asm volatile ("dmb" ::: "memory");
|
||||
// asm volatile ("dmb" ::: "memory");
|
||||
return (val >>8)&0xffff;
|
||||
}
|
||||
|
||||
@ -531,30 +577,25 @@ uint32_t read16(uint32_t address)
|
||||
uint32_t read8(uint32_t address)
|
||||
{
|
||||
int val;
|
||||
// while ((GET_GPIO(0)));
|
||||
asm volatile ("dmb" ::: "memory");
|
||||
uint32_t addr_h_s = (address & 0x0000ffff) << 8;
|
||||
uint32_t addr_h_r = (~address & 0x0000ffff) << 8;
|
||||
uint32_t addr_l_s = (address >> 16) << 8;
|
||||
uint32_t addr_l_r = (~address >> 16) << 8;
|
||||
|
||||
// asm volatile ("dmb" ::: "memory");
|
||||
R8
|
||||
// asm volatile ("nop" ::);
|
||||
// asm volatile ("nop" ::);
|
||||
// asm volatile ("nop" ::);
|
||||
//write phase
|
||||
*(gpio) = gpfsel0_o;
|
||||
*(gpio + 1) = gpfsel1_o;
|
||||
*(gpio + 2) = gpfsel2_o;
|
||||
|
||||
val = address;// & 0x0000FFFF;
|
||||
*(gpio + 7) = (val & 0xffff) << 8;
|
||||
*(gpio + 10) = (~val & 0xffff) << 8;
|
||||
|
||||
*(gpio + 7) = addr_h_s;
|
||||
*(gpio + 10) = addr_h_r;
|
||||
GPIO_CLR = 1 << 7;
|
||||
// GPIO_CLR = 1 << 7; //delay
|
||||
GPIO_SET = 1 << 7;
|
||||
|
||||
val = address >> 16;
|
||||
*(gpio + 7) = (val & 0xffff) << 8;
|
||||
*(gpio + 10) = (~val & 0xffff) << 8;
|
||||
*(gpio + 7) = addr_l_s;
|
||||
*(gpio + 10) = addr_l_r;
|
||||
GPIO_CLR = 1 << 7;
|
||||
// GPIO_CLR = 1 << 7; //delay
|
||||
GPIO_SET = 1 << 7;
|
||||
|
||||
//read phase
|
||||
@ -566,10 +607,12 @@ uint32_t read8(uint32_t address)
|
||||
GPIO_CLR = 1 << 6;
|
||||
while (!(GET_GPIO(0)));
|
||||
GPIO_CLR = 1 << 6;
|
||||
asm volatile ("nop" ::);
|
||||
asm volatile ("nop" ::);
|
||||
asm volatile ("nop" ::);
|
||||
val = *(gpio + 13);
|
||||
GPIO_SET = 1 << 6;
|
||||
asm volatile ("dmb" ::: "memory");
|
||||
// return (val >>8)&0xffff;
|
||||
// asm volatile ("dmb" ::: "memory");
|
||||
|
||||
val = (val >>8)&0xffff;
|
||||
if ((address & 1) == 0)
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user