mirror of
https://github.com/captain-amygdala/pistorm.git
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This most definitely requires a make clean and then make, due to all the header files edited. I can't seem to build a314.device, so it's not included yet.
430 lines
14 KiB
C
430 lines
14 KiB
C
// SPDX-License-Identifier: MIT
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#include "platforms/platforms.h"
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#include "pistorm-dev/pistorm-dev-enums.h"
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#include "amiga-autoconf.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "a314/a314.h"
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#define Z2_Z2 0xC
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#define Z2_FAST 0x2
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#define Z2_BOOTROM 0x1
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// PiStorm Zorro II AutoConfig Fast RAM ROM
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static unsigned char ac_fast_ram_rom[] = {
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Z2_Z2 | Z2_FAST, AC_MEM_SIZE_8MB, // 00/02, link into memory free list, 8 MB
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0x6, 0x9, // 06/09, product id
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0x8, 0x0, // 08/0a, preference to 8 MB space
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0x0, 0x0, // 0c/0e, reserved
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PISTORM_AC_MANUF_ID, // Manufacturer ID
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0x0, 0x0, 0x0, 0x0, 0x0, 0x4, 0x2, 0x0, // 18/.../26, serial
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0x0, 0x0, 0x0, 0x0, // Optional BOOT ROM vector
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};
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// PiSCSI AutoConfig Device ROM
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unsigned char ac_piscsi_rom[] = {
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Z2_Z2 | Z2_BOOTROM, AC_MEM_SIZE_64KB, // 00/01, Z2, bootrom, 64 KB
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0x6, 0xA, // 06/0A, product id
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0x0, 0x0, // 00/0a, any space where it fits
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0x0, 0x0, // 0c/0e, reserved
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PISTORM_AC_MANUF_ID, // Manufacturer ID
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0x0, 0x0, 0x0, 0x0, 0x0, 0x4, 0x2, 0x1, // 18/.../26, serial
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0x4, 0x0, 0x0, 0x0, // Optional BOOT ROM vector
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};
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// PiStorm Device Interaction ROM
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unsigned char ac_pistorm_rom[] = {
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Z2_Z2, AC_MEM_SIZE_64KB, // 00/01, Z2, bootrom, 64 KB
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0x6, 0xB, // 06/0B, product id
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0x0, 0x0, // 00/0a, any space where it fits
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0x0, 0x0, // 0c/0e, reserved
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PISTORM_AC_MANUF_ID, // Manufacturer ID
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0x0, 0x0, 0x0, 0x0, 0x0, 0x4, 0x2, 0x2, // 18/.../26, serial
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0x4, 0x0, 0x0, 0x0, // Optional BOOT ROM vector
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};
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// A314 Emulation ROM
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static unsigned char ac_a314_rom[] = {
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0xc, AC_MEM_SIZE_64KB, // 00/02, 64 kB
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0xa, 0x3, // 04/06, product id
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0x0, 0x0, // 08/0a, any space okay
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0x0, 0x0, // 0c/0e, reserved
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0x0, 0x7, 0xd, 0xb, // 10/12/14/16, mfg id
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0xa, 0x3, 0x1, 0x4, 0x0, 0x0, 0x0, 0x0, // 18/.../26, serial
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0x0, 0x0, 0x0, 0x0, // Optional BOOT ROM vector
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};
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extern unsigned int a314_base;
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int ac_z2_current_pic = 0;
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int ac_z2_pic_count = 0;
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int ac_z2_done = 0;
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int ac_z2_type[AC_PIC_LIMIT];
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int ac_z2_index[AC_PIC_LIMIT];
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unsigned int ac_base[AC_PIC_LIMIT];
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int ac_z3_current_pic = 0;
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int ac_z3_pic_count = 0;
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int ac_z3_done = 0;
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int ac_z3_type[AC_PIC_LIMIT];
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int ac_z3_index[AC_PIC_LIMIT];
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uint32_t piscsi_base = 0, pistorm_dev_base = 0;
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extern uint8_t *piscsi_rom_ptr;
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unsigned char get_autoconf_size(int size) {
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if (size == 8 * SIZE_MEGA)
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return AC_MEM_SIZE_8MB;
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if (size == 4 * SIZE_MEGA)
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return AC_MEM_SIZE_4MB;
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if (size == 2 * SIZE_MEGA)
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return AC_MEM_SIZE_2MB;
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else
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return AC_MEM_SIZE_64KB;
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}
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unsigned char get_autoconf_size_ext(int size) {
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if (size == 16 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_16MB;
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if (size == 32 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_32MB;
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if (size == 64 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_64MB;
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if (size == 128 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_128MB;
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if (size == 256 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_256MB;
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if (size == 512 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_512MB;
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if (size == 1024 * SIZE_MEGA)
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return AC_MEM_SIZE_EXT_1024MB;
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else
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return AC_MEM_SIZE_EXT_64MB;
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}
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extern void adjust_ranges_amiga(struct emulator_config *cfg);
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void autoconfig_reset_all() {
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printf("[AUTOCONF] Resetting all autoconf data.\n");
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for (int i = 0; i < AC_PIC_LIMIT; i++) {
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ac_z2_type[i] = ACTYPE_NONE;
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ac_z3_type[i] = ACTYPE_NONE;
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ac_z2_index[i] = 0;
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ac_z3_index[i] = 0;
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}
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ac_z3_pic_count = 0;
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ac_z2_pic_count = 0;
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ac_z2_current_pic = 0;
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ac_z3_current_pic = 0;
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}
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unsigned int autoconfig_read_memory_z3_8(struct emulator_config *cfg, unsigned int address) {
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int index = ac_z3_index[ac_z3_current_pic];
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unsigned char val = 0;
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if ((address & 0xFF) >= AC_Z3_REG_RES50 && (address & 0xFF) <= AC_Z3_REG_RES7C) {
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val = 0;
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}
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else {
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switch(address & 0xFF) {
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case AC_Z3_REG_ER_TYPE:
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val |= BOARDTYPE_Z3;
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if (cfg->map_type[index] == MAPTYPE_RAM)
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val |= BOARDTYPE_FREEMEM;
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if (cfg->map_size[index] > 8 * SIZE_MEGA)
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val |= get_autoconf_size_ext(cfg->map_size[index]);
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else
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val |= get_autoconf_size(cfg->map_size[index]);
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if (ac_z3_current_pic + 1 < ac_z3_pic_count)
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val |= BOARDTYPE_LINKED;
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// Pre-invert this value, since it's the only value not physically complemented
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// for Zorro III.
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val ^= 0xFF;
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break;
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case AC_Z3_REG_ER_PRODUCT:
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// 1.1... maybe...
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val = 0x11;
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break;
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case AC_Z3_REG_ER_FLAGS:
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if (cfg->map_type[index] == MAPTYPE_RAM)
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val |= Z3_FLAGS_MEMORY;
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if (cfg->map_size[index] > 8 * SIZE_MEGA)
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val |= Z3_FLAGS_EXTENSION;
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val |= Z3_FLAGS_RESERVED;
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// Bottom four bits are zero, useless unles you want really odd RAM sizes.
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break;
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// Manufacturer ID low/high bytes.
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case AC_Z3_REG_MAN_LO:
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val = PISTORM_MANUF_ID & 0x00FF;
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break;
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case AC_Z3_REG_MAN_HI:
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val = (PISTORM_MANUF_ID >> 8);
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break;
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case AC_Z3_REG_SER_BYTE0:
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case AC_Z3_REG_SER_BYTE1:
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case AC_Z3_REG_SER_BYTE2:
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case AC_Z3_REG_SER_BYTE3:
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// Expansion board serial assigned by manufacturer.
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val = 0;
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break;
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case AC_Z3_REG_INIT_DIAG_VEC_LO:
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case AC_Z3_REG_INIT_DIAG_VEC_HI:
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// 16-bit offset to boot ROM in assigned memory range.
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val = 0;
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break;
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// Additional reserved/unused registers.
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case AC_Z3_REG_ER_RES03:
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case AC_Z3_REG_ER_RES0D:
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case AC_Z3_REG_ER_RES0E:
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case AC_Z3_REG_ER_RES0F:
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case AC_Z3_REG_ER_Z2_INT:
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val = 0;
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break;
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default:
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val = 0;
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break;
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}
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}
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//printf("Read byte %d from Z3 autoconf for PIC %d (%.2X).\n", address, ac_z3_current_pic, val);
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return (address & 0x100) ? (val << 4) ^ 0xFF : (val & 0xF0) ^ 0xFF;
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}
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int nib_latch = 0;
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void autoconfig_write_memory_z3_8(struct emulator_config *cfg, unsigned int address, unsigned int value) {
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int index = ac_z3_index[ac_z3_current_pic];
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unsigned char val = (unsigned char)value;
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int done = 0;
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switch(address & 0xFF) {
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case AC_Z3_REG_WR_ADDR_LO:
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if (nib_latch) {
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0xFF0F0000) | ((val & 0xF0) << 16);
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nib_latch = 0;
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}
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else
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0xFF000000) | (val << 16);
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break;
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case AC_Z3_REG_WR_ADDR_HI:
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if (nib_latch) {
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0x0FFF0000) | ((val & 0xF0) << 24);
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nib_latch = 0;
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}
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0x00FF0000) | (val << 24);
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done = 1;
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break;
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case AC_Z3_REG_WR_ADDR_NIB_LO:
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0xFFF00000) | ((val & 0xF0) << 12);
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nib_latch = 1;
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break;
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case AC_Z3_REG_WR_ADDR_NIB_HI:
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0xF0FF0000) | ((val & 0xF0) << 20);
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nib_latch = 1;
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break;
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case AC_Z3_REG_SHUTUP:
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//printf("Write to Z3 shutup register for PIC %d.\n", ac_z3_current_pic);
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done = 1;
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break;
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default:
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break;
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}
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if (done) {
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nib_latch = 0;
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printf("[AUTOCONF] Address of Z3 autoconf RAM assigned to $%.8x [B]\n", ac_base[ac_z3_current_pic]);
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cfg->map_offset[index] = ac_base[ac_z3_current_pic];
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cfg->map_high[index] = cfg->map_offset[index] + cfg->map_size[index];
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m68k_add_ram_range(cfg->map_offset[index], cfg->map_high[index], cfg->map_data[index]);
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ac_z3_current_pic++;
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if (ac_z3_current_pic == ac_z3_pic_count) {
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ac_z3_done = 1;
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adjust_ranges_amiga(cfg);
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}
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}
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return;
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}
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void autoconfig_write_memory_z3_16(struct emulator_config *cfg, unsigned int address, unsigned int value) {
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int index = ac_z3_index[ac_z3_current_pic];
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unsigned short val = (unsigned short)value;
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int done = 0;
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switch(address & 0xFF) {
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case AC_Z3_REG_WR_ADDR_HI:
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// This is, as far as I know, the only register it should write a 16-bit value to.
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ac_base[ac_z3_current_pic] = (ac_base[ac_z3_current_pic] & 0x00000000) | (val << 16);
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done = 1;
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break;
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default:
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printf("Unknown WORD write to Z3 autoconf address $%.2X", address & 0xFF);
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//stop_cpu_emulation();
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break;
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}
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if (done) {
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printf("[AUTOCONF] Address of Z3 autoconf RAM assigned to $%.8x [W]\n", ac_base[ac_z3_current_pic]);
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cfg->map_offset[index] = ac_base[ac_z3_current_pic];
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cfg->map_high[index] = cfg->map_offset[index] + cfg->map_size[index];
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m68k_add_ram_range(cfg->map_offset[index], cfg->map_high[index], cfg->map_data[index]);
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ac_z3_current_pic++;
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if (ac_z3_current_pic == ac_z3_pic_count) {
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ac_z3_done = 1;
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adjust_ranges_amiga(cfg);
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}
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}
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return;
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}
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void add_z2_pic(uint8_t type, uint8_t index) {
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if (ac_z2_pic_count < AC_PIC_LIMIT) {
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ac_z2_type[ac_z2_pic_count] = type;
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ac_z2_index[ac_z2_pic_count] = index;
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ac_z2_pic_count++;
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return;
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}
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printf("[AUTOCONF] Failed to add Z2 PIC of type %d, limit exceeded.\n", type);
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}
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void remove_z2_pic(uint8_t type, uint8_t index) {
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uint8_t pic_found = 0;
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if (index) {}
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for (uint32_t i = 0; i < ac_z2_pic_count; i++) {
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if (ac_z2_type[i] == type && !pic_found) {
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pic_found = 1;
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}
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if (pic_found && i < AC_PIC_LIMIT - 1) {
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ac_z2_type[i] = ac_z2_type[i + 1];
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ac_z2_index[i] = ac_z2_index[ i + 1];
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}
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}
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if (pic_found) {
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ac_z2_type[AC_PIC_LIMIT - 1] = ACTYPE_NONE;
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ac_z2_index[AC_PIC_LIMIT - 1] = 0;
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ac_z2_pic_count--;
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}
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else {
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printf("[AUTOCONF] Tried to remove Z2 PIC of type %d, but it wasn't found.\n", type);
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}
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}
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unsigned int autoconfig_read_memory_8(struct emulator_config *cfg, unsigned int address) {
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unsigned char *rom = NULL;
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unsigned char val = 0;
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switch(ac_z2_type[ac_z2_current_pic]) {
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case ACTYPE_MAPFAST_Z2:
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rom = ac_fast_ram_rom;
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break;
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case ACTYPE_A314:
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rom = ac_a314_rom;
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break;
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case ACTYPE_PISCSI:
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rom = ac_piscsi_rom;
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break;
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case ACTYPE_PISTORM_DEV:
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rom = ac_pistorm_rom;
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break;
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default:
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return 0;
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break;
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}
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if ((address & 1) == 0 && (address / 2) < (int)sizeof(ac_fast_ram_rom)) {
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if (ac_z2_type[ac_z2_current_pic] == ACTYPE_MAPFAST_Z2 && address / 2 == 1) {
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val = get_autoconf_size(cfg->map_size[ac_z2_index[ac_z2_current_pic]]);
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if (ac_z2_current_pic + 1 < ac_z2_pic_count)
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val |= BOARDTYPE_LINKED;
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}
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else
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val = rom[address / 2];
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//printf("Read byte %d from Z2 autoconf for PIC %d (%.2X).\n", address/2, ac_z2_current_pic, val);
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}
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val <<= 4;
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if (address != 0 && address != 2 && address != 0x40 && address != 0x42)
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val ^= 0xff;
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return (unsigned int)val;
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}
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void autoconfig_write_memory_8(struct emulator_config *cfg, unsigned int address, unsigned int value) {
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int done = 0;
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int index = ac_z2_index[ac_z2_current_pic];
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unsigned int *base = NULL;
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switch(ac_z2_type[ac_z2_current_pic]) {
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case ACTYPE_MAPFAST_Z2:
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base = &ac_base[ac_z2_current_pic];
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break;
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case ACTYPE_A314:
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base = &a314_base;
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break;
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case ACTYPE_PISCSI:
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base = &piscsi_base;
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break;
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case ACTYPE_PISTORM_DEV:
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base = &pistorm_dev_base;
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break;
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default:
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break;
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}
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if (!base) {
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//printf("Failed to set up the base for autoconfig PIC %d.\n", ac_z2_current_pic);
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done = 1;
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}
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else {
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if (address == 0x4a) { // base[19:16]
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*base = (value & 0xf0) << (16 - 4);
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} else if (address == 0x48) { // base[23:20]
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*base &= 0xff0fffff;
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*base |= (value & 0xf0) << (20 - 4);
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if (ac_z2_type[ac_z2_current_pic] == ACTYPE_A314) {
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//a314_set_mem_base_size(*base, cfg->map_size[ac_index[ac_z2_current_pic]]);
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}
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done = 1;
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} else if (address == 0x4c) { // shut up
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//printf("Write to Z2 shutup register for PIC %d.\n", ac_z2_current_pic);
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done = 1;
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}
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}
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if (done) {
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switch (ac_z2_type[ac_z2_current_pic]) {
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case ACTYPE_MAPFAST_Z2:
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cfg->map_offset[index] = ac_base[ac_z2_current_pic];
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cfg->map_high[index] = cfg->map_offset[index] + cfg->map_size[index];
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printf("[AUTOCONF] Address of Z2 autoconf RAM assigned to $%.8X\n", ac_base[ac_z2_current_pic]);
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m68k_add_ram_range(cfg->map_offset[index], cfg->map_high[index], cfg->map_data[index]);
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printf("[AUTOCONF] Z2 PIC %d at $%.8lX-%.8lX, Size: %d MB\n", ac_z2_current_pic, cfg->map_offset[index], cfg->map_high[index], cfg->map_size[index] / SIZE_MEGA);
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break;
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case ACTYPE_PISCSI:
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printf("[AUTOCONF] PiSCSI Z2 device assigned to $%.8X\n", piscsi_base);
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//m68k_add_rom_range(piscsi_base + (16 * SIZE_KILO), piscsi_base + (32 * SIZE_KILO), piscsi_rom_ptr);
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break;
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case ACTYPE_A314:
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printf("[AUTOCONF] A314 emulation device assigned to $%.8X\n", a314_base);
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break;
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case ACTYPE_PISTORM_DEV:
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printf("[AUTOCONF] PiStorm Interaction Z2 device assigned to $%.8X\n", pistorm_dev_base);
|
|
break;
|
|
default:
|
|
printf("[!!!AUTOCONF] Some strange unknown Z2 device has been assigned to $%.8X?", *base);
|
|
break;
|
|
}
|
|
ac_z2_current_pic++;
|
|
if (ac_z2_current_pic == ac_z2_pic_count) {
|
|
ac_z2_done = 1;
|
|
adjust_ranges_amiga(cfg);
|
|
}
|
|
}
|
|
}
|