mirror of
https://github.com/chip-red-pill/uCodeDisasm.git
synced 2026-01-11 23:53:26 +00:00
5b2b1f1246
2. Secure Enclave (SGX) SVN key generation is found 3. A Python module is implemented for the disassembler 4. Many other microarchitectural data are found and added
39 lines
917 B
Plaintext
39 lines
917 B
Plaintext
067: CORE_CR_CUR_RIP
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068: CORE_CR_CUR_UIP
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205: UCODE_CR_SE_SVN_KEY_0
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206: UCODE_CR_SE_SVN_KEY_1
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208: CTAP_CR_PPPE_TAP_STATUS
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285: CTAP_CR_TAP_CONFIG
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288: UCODE_CR_X2APIC_TPR
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28b: UCODE_CR_X2APIC_EOI
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29e: UCODE_CR_PPPE_EVENT_RESET
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29f: UCODE_CR_PPPE_EVENT_STATUS
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2c0: CTAP_CR_PDR_T0_LOW
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2c1: CTAP_CR_PDR_T0_HIGH
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2c4: ML3_CR_PIC_GLOBAL_EVENT_INHIBIT
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2cd: CTAP_CR_PROBE_MODE
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2b9: X86_CR_THREAD_ID
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2df: ROB1_CR_ICECTLPMR
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2e6: ML3_CR_PIC_DEBUG_MODES
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51b: PMH_CR_BRAM_BASE
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528: PMH_CR_CR3
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555: PMH_CR_ELSRR_BASE
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556: PMH_CR_ELSRR_MASK
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557: PMH_CR_EPCM_BASE
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562: PMH_CR_EMRR_BASE
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563: PMH_CR_EMRR_MASK
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564: PMH_CR_EMXRR_BASE
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565: PMH_CR_EMXRR_MASK
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572: PMH_CR_SMRR_BASE
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573: PMH_CR_SMRR_MASK
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574: PMH_CR_PRMRR_BASE
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575: PMH_CR_PRMRR_MASK
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692: MS_CR_DEBUG_DEFEATURE
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752: XU_CR_MACROINSTRUCTION_ALIAS
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7c5: CORE_CR_CR4
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78e: BAC_CR_CS_BASE
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7c6: UCODE_CR_XU_USTATE_CTRL
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7f6: CORE_CR_CR0
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7f9: CORE_CR_DEBUGCTL
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7fe: CORE_CR_EFLAGS
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