{\rtf1\ansi\ansicpg1252\deff0 {\fonttbl {\f0\fnil\fcharset0\fprq0\fttruetype Courier New;} {\f1\fnil\fcharset0\fprq0\fttruetype NULL;} {\f2\fnil\fcharset0\fprq0\fttruetype Dingbats;} {\f3\fnil\fcharset0\fprq0\fttruetype Symbol;} {\f4\fnil\fcharset0\fprq0\fttruetype Times New Roman;} {\f5\fnil\fcharset0\fprq0\fttruetype Arial;}} {\colortbl \red0\green0\blue0; \red255\green255\blue255;} {\stylesheet {\s7\sl240\slmult1\f4\fs24 Default;} {\s18\sl240\slmult1\fi-431\li720\sbasedon19 Lower Roman List;} {\s20\sl240\slmult1\tx431\sbasedon10\snext19 Numbered Heading 1;} {\s21\sl240\slmult1\tx431\sbasedon11\snext19 Numbered Heading 2;} {\s8\sl240\slmult1\fi-431\li720 Diamond List;} {\s22\sl240\slmult1\tx431\sbasedon12\snext19 Numbered Heading 3;} {\s23\sl240\slmult1\fi-431\li720 Numbered List;} {\s10\sl240\slmult1\sb440\sa60\f5\fs34\b\sbasedon19\snext19 Heading 1;} {\s27\sl240\slmult1\fi-431\li720 Square List;} {\s6\sl240\slmult1\fi-431\li720 Dashed List;} {\s29\sl240\slmult1\sa117\f4\fs24\sbasedon7 Text body;} {\s13\sl240\slmult1\fi-431\li720 Heart List;} {\s33\sl240\slmult1\fi-431\li720\sbasedon23 Upper Roman List;} {\s25\sl240\slmult1\f0\fs20\sbasedon7 Preformatted Text;} {\s4\sl240\slmult1\sb117\sa117\f4\fs20\i\sbasedon7 Caption;} {\s31\sl240\slmult1\fi-431\li720 Triangle List;} {\s32\sl240\slmult1\fi-431\li720\sbasedon23 Upper Case List;} {\s3\sl240\slmult1\fi-431\li720 Bullet List;} {\s9\sl240\slmult1\fi-431\li720 Hand List;} {\s26\sl240\slmult1\tx1584\sbasedon20\snext19 Section Heading;} {\s11\sl240\slmult1\sb440\sa60\f5\fs28\b\sbasedon19\snext19 Heading 2;} {\s12\sl240\slmult1\sb440\sa60\f5\fs24\b\sbasedon19\snext19 Heading 3;} {\s30\sl240\slmult1\fi-431\li720 Tick List;} {\s19\sl240\slmult1\f4\fs24 Normal;} {\s17\sl240\slmult1\fi-431\li720\sbasedon23 Lower Case List;} {\s1\sl240\slmult1\li1440\ri1440\sa117\sbasedon19 Block Text;} {\s16\sl240\slmult1\f4\fs24\sbasedon29 List;} {\s15\sl240\slmult1\f4\fs24\sbasedon7 Index;} {\s14\sl240\slmult1\fi-431\li720 Implies List;} {\s2\sl240\slmult1\fi-431\li720 Box List;} {\s28\sl240\slmult1\fi-431\li720 Star List;} {\s24\sl240\slmult1\f0\sbasedon19 Plain Text;} {\s5\sl240\slmult1\tx1584\sbasedon20\snext19 Chapter Heading;}} \kerning0\cf0\viewkind1\paperw23811\paperh16837\margl1440\margr1440\landscape\widowctl \sectd\sbknone\colsx360\margtsxn720\margbsxn720\pgncont\ltrsect \pard\plain\ltrpar\s19\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}QD071 0 1 2 3 4 5 6 7 8 9} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} The Unit Selection is used by Test I/O, Halt I/O and I/O If doing CC, the routine then goes and sets I/O interrupt} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} interrupt when the channel is not busy and by CC when a latch and restores the CPU. If doing Start I/O or Halt I/O} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}A program check occurs If doing a Test I/O or I/O interrupt the CSW status bytes will be stored and if doing a Test} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} the routine goes to the Status In wait loop in the CC and I/O or I/O interrupt a CSW with CHannel Not Busy will be} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Start I/O Unit Selection routine. If one of the other two stored. The status routine is used by Test I/O and I/O} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} the routine goes to the Halt I/O sequence routine. The interrupt when the channel is not busy. If doing a Test} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Control Unit Busy sequence is used whenever a short I/O with the channel and device status is zero, a} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Control Unit Busy sequence is encountered by either Unit condition code 0 is set, otherwise, a CSW is stored.} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}B Selection routine. It checks that Status In does fall and} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} if not, indicates an Interface Control check ------------------------------------------O------------------------------------------------------------------------------QD161------CDE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 11 --- 0997 | | 00 --- 098C (11)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QD181.NGE------------------------------------------------------ K 1000 | | | K 1011 | Selr Ch No} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00) | A GT.KH>Z | | | A 0+KH>R | Response test} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}C Selr Ch | ----| |*--- | ----| |*---------------------------------------------------------QD161------CGE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Prog Ck in | | C HZ>S4 | | | C HZ>S4,LZ>S5 | (00)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} CC | | | 014V | | | 014V Selr Ch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | R 1,1 1FR | | R 0,0 58R Addr} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | C4-- 11 --CD | | C7-- 00 --CG mismatch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | Time-out | | Addr mismatch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}D | | | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 01 --- 099D | 00 --- 099C | 01 --- 0995 10 --- 099E 11 --- 09A7 | | 01 --- 098D } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 1100,1 | ---*K 1100 | | K 0100 | | | K 0110,0 | | | K 1100,0 | } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A SL>S | A GTX+KH>Z | | A V+KL>V | A GR^R>Z | | | | | | | } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}E QD031.JHE----------------------------------*| |*------S WRITE |*--O---| |*--O---| |*------| |*+-O---| |*----------------------------------------------O----------QD081------EGE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01) C K>GH | | | | | | C GI>GR | C K>GB | | C K>GB | | (10)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Selr Ch | 014V ----| 014V | 014V | | 014V | 014V | | 014V | Selr Ch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Unit Selection R 0,0 9CR | R AC,1 95R R AC,1BC 9CR | R 1,1 A7R R 0,Z=0 8CR | R S6,0 B4R | Sta In wait} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Test+Halt I-O E2-- 00 --EB | E3-- *1 --EC E4-- ** --ED | E5-- 11 --EE E6-- 0* --EF | E7-- *0 --EG | loop Test I-O} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Sel Out | Test for Adr In | Adr In GR=0 | Reset Sel Out |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}F | or Sta In response | addr compare | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} O-------------------------------------------- GR=device addr | -----------QD101------EGE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 11 --- 099F 10 --- 09AE | 11 --- 09BB (00)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | K 0111 | | K 0100 | Selr Ch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | A 0+KH>R | | A 0+KH>T | Halt I-O seq} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}G ----| |*--- ----| |-- ----| |*---} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C GI>GR | | | C HZ>S4,LZ>S5 | | | | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 014V | | | 014V | | 014V |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,0 F8R | | R 1,1 1FR | R 0,1 25R |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} G3-- 00 --GC | | G6-- 11 --GF | G8-- 01 --GH |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Sta In | | Status In | I-OIntrp+Test I-O |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}H GR=Dev status | | failed to fall | T=40 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 00 --- 09F8 10 --- 09F6 | 00 --- 09AC 11 --- 09F7 | 01 --- 09B9 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} ----K 1100,1 | K 0100 | | K 0100 | | | | | | | -----------QD101------JHE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A 0>V | A GT.KL>Z | | A V+KL>V | A 0>R | | | | | | (10)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}J QD081.EBE------------------------------------------------------------------------------*| |*------| |*--O---| |*--O---| |*--O---| |*--+---------------------O Selr Ch CC} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00) C K>GB | | | | | | | | | | | | Ctrl unit busy} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Selr Ch | 014V ----| 014V | 014V | | 014V | 014V | -----------QD131------JHE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Ctrl Unit Busy R 1,0 F6R | R AC,0 ACR R 1,Z=0 F6R | R S6,1 B9R R 1,S7 F2R | (11)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} CC+Start I-O J4-- 10 --JD | J5-- *0 --JE J6-- 1* --JF | J7-- *1 --JG J8-- 1* --JH | Selr Ch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Rst Sel Out | Test for fall of Status In | Status In down CC, Start I-O + | Store status} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}K | | Halt I-O | bytes CU busy} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} --------------------------------------------- |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 11 --- 09A3 01 --- 09A5 10 --- 09A6 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 0001,0 | | | K 1001,0 | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A 0>R | | | | | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}L QD081.JJE-----------------------------------------------------O--*| |*--O---| |*--O---| |*--------------------------------------------------------------------+--------------------------------QD021------LEE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (10,11) | C K>GA | | | | | C K>GB | | (01)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Selr Ch | | 014V | | 014V | | 014V | Selr Ch set} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Status routine | R 0,S7 A4R | R S4,0 A4R | R 0,1 55R | Cond Code 0} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Test I-O | L3-- 0* --LC | L4-- *0 --LD | L5-- 01 --LE |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Test I-O and | Not I-O Intrp | Ch status=0 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}M | Dev Sta=0 | | Reset Ch |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Srv Out | | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 10 --- 09A2 | | 00 --- 09A4 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0001,0 | | ----K 0100 | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A 0>R | | A 0+KH>T | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}N ----| | --------------------------| |*--------------------------------------------------------------------O--------------------------------QD131------NEE} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C K>GA | | | (01)} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 014V*----------------------------| 014V Selr Ch} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,0 A4R R 0,1 25R Store CSW} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} N3-- 00 --NC N5-- 01 --NE Ch not busy} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Test I-O and I-O Intrp+} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}P Dev Sta#0 Ch Sta#0} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Srv Out} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}Q} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} } \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}R} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}S} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} \par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} D} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 0} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 7 | 128053 02/18/66 | Mach 2030 | Date 03/01/66 Sheet 1 QD071 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | | Name | Log 2072 Version 014 |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | Mode Manual | |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | P.N. 837193 | Selr CHannel Unit Selection |} \par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | IBM Corp. | Test and Halt I-O |} \par\pard\plain\ltrpar\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}}}