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ibm2030.IBM2030/CLD/qa941.rtf
2021-07-23 21:56:41 +02:00

119 lines
29 KiB
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{\rtf1\ansi\deff0\adeflang1025
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{\stylesheet{\s1\cf0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af4\afs24\lang255\ltrch\dbch\af2\afs24\langfe255\loch\f0\fs24\lang1033\snext1 Default;}
{\s2\sa120\cf0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af4\afs24\lang255\ltrch\dbch\af2\afs24\langfe255\loch\f0\fs24\lang1033\sbasedon1\snext2 Text body;}
{\s3\cf0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af5\afs24\lang255\ltrch\dbch\af2\afs24\langfe255\loch\f0\fs24\lang1033\sbasedon2\snext3 List;}
{\s4\sb120\sa120\cf0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af5\afs20\lang255\ai\ltrch\dbch\af2\afs20\langfe255\ai\loch\f0\fs20\lang1033\i\sbasedon1\snext4 Caption;}
{\s5\cf0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af5\afs24\lang255\ltrch\dbch\af2\afs24\langfe255\loch\f0\fs24\lang1033\sbasedon1\snext5 Index;}
{\s6\cf0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033\sbasedon1\snext6 Preformatted Text;}
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{\info{\creatim\yr2004\mo4\dy24\hr13\min23}{\operator Hans PUFAL}{\revtim\yr2004\mo5\dy11\hr22\min29}{\printim\yr1601\mo1\dy1\hr0\min0}{\comment StarWriter}{\vern6450}}\deftab709
{\*\pgdsctbl
{\pgdsc0\pgdscuse195\lndscpsxn\pgwsxn23818\pghsxn16834\marglsxn1440\margrsxn1440\margtsxn576\margbsxn576\pgdscnxt0 Default;}}
\landscape\paperh16834\paperw23818\margl1440\margr1440\margt576\margb576\sectd\sbknone\lndscpsxn\pgwsxn23818\pghsxn16834\marglsxn1440\margrsxn1440\margtsxn576\margbsxn576\ftnbj\ftnstart1\ftnrstcont\ftnnar\aenddoc\aftnrstcont\aftnstart1\aftnnrlc
\pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 QA941 0 1 2 3 4 5 6 7 8 9}
\par
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 This prog transfers the contents of the FGHJ switches The soft stop and wait loop routines are This page also allows an operator to display}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 into the IJ reg. It also restores any hdwe latches also contained on this page. The current PSW in instr stepmode. In this}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 containing PSW info (sys mask, machine check mask, ASCII mode IJ is displayed on the console. ROAR}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 A latch, stg prot key in Q reg) that may have been affected resetting to addr 000A (see loc E3) the}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 by a system reset, and insures that the cond reg contains remaining bytes of the PSW will be displayed}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 a bit it also sets S0=1 if wait bit is on. (see loc G9).}
\par
\par
\par
\par {\loch\f3\fs14\lang1033\i0\b0 B}
\par
\par {\loch\f3\fs14\lang1033\i0\b0 01 --- 0001 01 --- 0015 00 --- 0088 01 --- 00AD 01 --- 00A5 00 --- 00A0 00 --- 00C0 11 --- 00EF 10 --- 00FA}
\par {\loch\f3\fs14\lang1033\i0\b0 K 0100,0 | | | K 1011,1 | | | K 0001,1 | K 0011,1 | K 1001,0 | K 0010 | K DECA}
\par {\loch\f3\fs14\lang1033\i0\b0 A 0>R | A 0+R>J | A FG>I | A R>D | A 0+K+H+1>L | A SL.K>S | A J.LL>L | A R.KL>Z | A 0!+-0>Z | }
\par {\loch\f3\fs14\lang1033\i0\b0 C S *8C LS S*------S STORE |*------S *BB LS S*--O---S WRITE |*------S *BB LS S*- --S WRITE |*-O----S *B9 LS S*------S WRITE |*---O--| |*---O }
\par {\loch\f3\fs14\lang1033\i0\b0 C 0>S7 | | | | | | C HZ>S4 | | | \\ / C K>FB | | C ANSNZ>S2 | | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 | | A HJ>B | | | | | | | | | | | | | ---| | | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 R 0,1 15R R 0,0 88R R 0,1 ADR | R 0,1 A5R R 1,0 B6R | | R S4,0 C0R | | R 1,1 EFR R 1,S7 FAR | R 0,Z=0 24R |}
\par {\loch\f3\fs14\lang1033\i0\b0 C1-- 01 --CA C2-- 00 --CB C3-- 01 --CC | C4-- 01 --CD C5-- 10 --CE | | C6-- *0 --CF | | C7-- 11 --CG C8-- 1* --CH | C9-- 0* --CJ |}
\par {\loch\f3\fs14\lang1033\i0\b0 Set IJ from Reset PSW bit Load I, Rd cond | Test for bit in Rd system mask | | Set system mask | | Test lo bit of Test for wait | Set mach ch |}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 D switches, and load J. reg and pgm | cond reg. Set LH=0D cond | | hdwe latches | | J=0, set L=0 bit on | mask and ASCII |}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 The above addr Note-R is named mask | S4=1=no bit reg. For use in | | | | Rd prot. Key | latches |}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 is forced when as a (B) source 10 --- 000A | case cond reg | | | | and AMWP bits. | S7=1 to hold |}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 the \ldblquote SET IC\rdblquote only to open the K 1011,1 | | has no bits. | | | | | wait latch if |}
\par {\loch\f3\fs14\lang1033\i0\b0 switch is pushed (B) gates to the | | | LL=1 for masking | | | | | in wait state | }
\par {\loch\f3\fs14\lang1033\i0\b0 E or when a match ALU. Naming S *BB LS S*--- lo bit of J. | | | | | | }
\par {\loch\f3\fs14\lang1033\i0\b0 occurs in \ldblquote SAR Ctrl/K sgn stops C 1>S7 | | | | | | | }
\par {\loch\f3\fs14\lang1033\i0\b0 RESTART\rdblquote mode. R form getting | | | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 into the (B) entry R 0,1 ADR | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 and causes switches E3-- 01 --EC | | | | | |}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 SHJ to enter PSW display routine: ---------------------- | | ------------------------------------------- | |}
\par {\loch\f3\fs14\lang1033\i0\b0\fs14 F instead. Rate sw.=instr step | | | | | |}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 Set sw. FGHJ=000A | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 Wait until I/O oper complete | 10 --- 00B6 | | 10 --- 00C2 01 --- 00ED | | 11 --- 00FB |}
\par {\loch\f3\fs14\lang1033\i0\b0 ROAR reset | | | | | K 1011,1 | K 1011,1 | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 Start (see loc G9) | A R>T | | | A DL+LH>R | | | / \\ A T+D>Z | |}
\par {\loch\f3\fs14\lang1033\i0\b0 G Press start to continue ----| |*---- -----S *BB LS S*------S STORE |*- --| |*-- | }
\par {\loch\f3\fs14\lang1033\i0\b0 C 0>S6 | | | | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 | | | | | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 R 0,0 A0R R 0,1 EDR R 0,0 CDR R 0,0 F8R | |}
\par {\loch\f3\fs14\lang1033\i0\b0 G5-- 00 --GE G7-- 01 --GG G8-- 00 --GH G9-- 00 --GJ | |}
\par {\loch\f3\fs14\lang1033\i0\b0 Cond reg has no PSW displayed | |}
\par {\loch\f3\fs14\lang1033\i0\b0 H bits. Set 00 R-reg=prot key | | }
\par {\loch\f3\fs14\lang1033\i0\b0 QA941.NFE---------------------------------------------------------------------------- code. ----------------------- and AMWP | |}
\par {\loch\f3\fs14\lang1033\i0\b0 (00) | 00 --- 00BC 01 --- 0005 | 00 --- 00F8 | A-reg=sys mask | |}
\par {\loch\f3\fs14\lang1033\i0\b0 Continue -------------------------*| | | | | | | | B-reg=cond reg | |}
\par {\loch\f3\fs14\lang1033\i0\b0 testing A H>H | | | | A SP>Z | | and pgm mask| |}
\par {\loch\f3\fs14\lang1033\i0\b0 J QA942.LHE--------------------------------------------------------------------------------------------------O-*| |*------| |*---------------------- | | |*--- | | }
\par {\loch\f3\fs14\lang1033\i0\b0 (00,01) | C 0>S2 | | | \\ | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 Stop on addr | | | | | | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 contents or | R 0,1 05R R S0,0 ACR | | --R 0,0 ACR | |}
\par {\loch\f3\fs14\lang1033\i0\b0 continue. | J5-- 01 --JE J6-- *0 --JF | | | J8-- 00 --JH | |}
\par {\loch\f3\fs14\lang1033\i0\b0 QA942.GCE------------------------------------------------------------------------------------------------- | | | | | |}
\par {\loch\f3\fs14\lang1033\i0\b0 K (01) | | | | ------------------------------------------ |}
\par {\loch\f3\fs14\lang1033\i0\b0 Normal stop --------------------------------------------------------------------------------------------------------------------------------------}
\par {\loch\f3\fs14\lang1033\i0\b0 | 00 --- 0024 | | 01 --- 00BD 00 --- 0078 11 --- 00FF | | 00 --- 00AC }
\par {\loch\f3\fs14\lang1033\i0\b0 | | | | ---| | | | | | | | K 0001,0 | }
\par {\loch\f3\fs14\lang1033\i0\b0 | A RH>Q | | A I>D | A H>H | A JSP+D>Z | | | | | }
\par {\loch\f3\fs14\lang1033\i0\b0 L O---| |*-O----| |*------| |*------| |*--O---| K>W R*-----------------------------------QA001------LHE}
\par {\loch\f3\fs14\lang1033\i0\b0 | C 1>S0 | | C 0>S6 | C 1>S7 | | | | | | | (00)}
\par {\loch\f3\fs14\lang1033\i0\b0 | | | | --*| | | | | | O-----| | Execute I}
\par {\loch\f3\fs14\lang1033\i0\b0 | R 0,1 BDR | | R 0,0 78R R 1,1 FFR R s0,0 ACR | | R 0,0 00R cycle start}
\par {\loch\f3\fs14\lang1033\i0\b0 | L4-- 01 --LD | | L5-- 00 --LE L6-- 11 --LF L7-- ** --LG | | L8-- 00 --LH }
\par {\loch\f3\fs14\lang1033\i0\b0 | Restore prot key | | I is put H>H resets the Soft stop stops | | Start I cycle}
\par {\loch\f3\fs14\lang1033\i0\b0 M | Wait bit is on,so | | into D so it priority latch. Clock if no I/O | | Do not test for}
\par {\loch\f3\fs14\lang1033\i0\b0 | set S0=1 | | can be displayed channels are | | interrupts}
\par {\loch\f3\fs14\lang1033\i0\b0 01 --- 0100 | 01 --- 0025 | | in step LG running, but | | 11 --- 00AF }
\par {\loch\f3\fs14\lang1033\i0\b0 K 0000,1 | | | | | | leaves clock so | | K 0001,0 | }
\par {\loch\f3\fs14\lang1033\i0\b0 A RX>G | | A RH>Q | | | that further | | | | }
\par {\loch\f3\fs14\lang1033\i0\b0 N QA001.EGE------------*S WRITE K>W R*--O ----| |*-- | share cycles can | O---| K>W R*-----------------------------------QA001------NNE}
\par {\loch\f3\fs14\lang1033\i0\b0 (01) C 1>S0 | | | | | restart it. | | | | (00,01)}
\par {\loch\f3\fs14\lang1033\i0\b0 Wait | | | | | | S0=1=wait state | | | | Branch I }
\par {\loch\f3\fs14\lang1033\i0\b0 R 1,1 2BR | R 0,1 BDR | IJ is displayed | | R 0,INTR 00R cycle start}
\par {\loch\f3\fs14\lang1033\i0\b0 N1-- 11 --NA | N4-- 01 --ND | in the A and | | N8-- 0* --NH }
\par {\loch\f3\fs14\lang1033\i0\b0 Restore ILC | Restore prot key | B regs | | }
\par {\loch\f3\fs14\lang1033\i0\b0 P in G reg | | | | }
\par {\loch\f3\fs14\lang1033\i0\b0 | | | O----------------------}
\par {\loch\f3\fs14\lang1033\i0\b0 | 11 --- 002B | | | 10 --- 00AE | }
\par {\loch\f3\fs14\lang1033\i0\b0 | | | | | ----| DECA | }
\par {\loch\f3\fs14\lang1033\i0\b0 | A I>D | | | A J!+-D0>Z | | }
\par {\loch\f3\fs14\lang1033\i0\b0 Q QA871.JHE-----------O-------------------O-----------------------------------------------| |*------------------------------------------------------------------------| |*--- }
\par {\loch\f3\fs14\lang1033\i0\b0 (11) | | | | | | | }
\par {\loch\f3\fs14\lang1033\i0\b0 QA931.NEE{\*\bkmkstart DDE_LINK1}{\*\bkmkend DDE_LINK1}------------ | | | ------| | }
\par {\loch\f3\fs14\lang1033\i0\b0 (11) R 1,0 AER | R 1,INTR AER }
\par {\loch\f3\fs14\lang1033\i0\b0 Go to wait Q4-- 10 --QD | Q8-- ** --QH }
\par {\loch\f3\fs14\lang1033\i0\b0 Put I into D | Set wait latch}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 R so it can be | The above word keeps turning on the latch until}
\par {\loch\f3\fs14\lang1033\i0\b0\fs14 displayed in | an interrupt is found, the wait latch is held by}
\par {\loch\f3\fs14\lang1033\i0\b0\fs14 step QH | S7=1 S7 is reset after the interrupt is taken,}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 QA942.JGE--------------------------------------------------------------------------------------------------- allowing the wait latch to reset off. The B in-}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs20\lang1033{\loch\f3\fs14\lang1033\i0\b0\fs14 (01) put tot he ALU is forced to 00 to prevent any ALU}
\par \pard\plain \ltrpar\s6\cf0\sl0\slmult0{\*\hyphen2\hyphlead2\hyphtrail2\hyphmax0}\aspalpha\ql\rtlch\af3\afs20\lang255\ltrch\dbch\af3\afs20\langfe255\loch\f3\fs14\lang1033 {\loch\f3\fs14\lang1033\i0\b0 S Branch trace checks that could arise because of specifying a}
\par {\loch\f3\fs14\lang1033\i0\b0 stop decimal OR with non-decimal data on the B input.}
\par
\par {\loch\f3\fs14\lang1033\i0\b0 Q}
\par {\loch\f3\fs14\lang1033\i0\b0 A}
\par {\loch\f3\fs14\lang1033\i0\b0 9}
\par {\loch\f3\fs14\lang1033\i0\b0 4 | 128015 09/24/65 | Mach 2030 | Date 09/24/68 Sheet 1 QA941 |}
\par {\loch\f3\fs14\lang1033\i0\b0 1 | 128045 11/17/65 | Name | Log 2016 Version |}
\par {\loch\f3\fs14\lang1033\i0\b0 | 128065 08/15/67 | Mode Manual | |}
\par {\loch\f3\fs14\lang1033\i0\b0 | 128069 09/09/68 | P.N. 837067 | Set IJ from switches |}
\par {\loch\f3\fs14\lang1033\i0\b0 | | IBM Corp. | and stop request |}
\par }