1
0
mirror of https://github.com/ibm2030/IBM2030.git synced 2026-01-11 23:52:47 +00:00
ibm2030.IBM2030/CLD/qc001521.rtf
2021-07-23 21:56:41 +02:00

463 lines
109 KiB
Plaintext

{\rtf1\ansi\ansicpg1252\deff0
{\fonttbl
{\f0\fnil\fcharset0\fprq0\fttruetype Courier New;}
{\f1\fnil\fcharset0\fprq0\fttruetype NULL;}
{\f2\fnil\fcharset0\fprq0\fttruetype Dingbats;}
{\f3\fnil\fcharset0\fprq0\fttruetype Symbol;}
{\f4\fnil\fcharset0\fprq0\fttruetype Times New Roman;}
{\f5\fnil\fcharset0\fprq0\fttruetype Arial;}}
{\colortbl
\red0\green0\blue0;
\red255\green255\blue255;}
{\stylesheet
{\s7\sl240\slmult1\f4\fs24 Default;}
{\s18\sl240\slmult1\fi-431\li720\sbasedon19 Lower Roman List;}
{\s20\sl240\slmult1\tx431\sbasedon10\snext19 Numbered Heading 1;}
{\s21\sl240\slmult1\tx431\sbasedon11\snext19 Numbered Heading 2;}
{\s8\sl240\slmult1\fi-431\li720 Diamond List;}
{\s22\sl240\slmult1\tx431\sbasedon12\snext19 Numbered Heading 3;}
{\s23\sl240\slmult1\fi-431\li720 Numbered List;}
{\s10\sl240\slmult1\sb440\sa60\f5\fs34\b\sbasedon19\snext19 Heading 1;}
{\s27\sl240\slmult1\fi-431\li720 Square List;}
{\s6\sl240\slmult1\fi-431\li720 Dashed List;}
{\s29\sl240\slmult1\sa117\f4\fs24\sbasedon7 Text body;}
{\s13\sl240\slmult1\fi-431\li720 Heart List;}
{\s33\sl240\slmult1\fi-431\li720\sbasedon23 Upper Roman List;}
{\s25\sl240\slmult1\f0\fs20\sbasedon7 Preformatted Text;}
{\s4\sl240\slmult1\sb117\sa117\f4\fs20\i\sbasedon7 Caption;}
{\s31\sl240\slmult1\fi-431\li720 Triangle List;}
{\s32\sl240\slmult1\fi-431\li720\sbasedon23 Upper Case List;}
{\s3\sl240\slmult1\fi-431\li720 Bullet List;}
{\s9\sl240\slmult1\fi-431\li720 Hand List;}
{\s26\sl240\slmult1\tx1584\sbasedon20\snext19 Section Heading;}
{\s11\sl240\slmult1\sb440\sa60\f5\fs28\b\sbasedon19\snext19 Heading 2;}
{\s12\sl240\slmult1\sb440\sa60\f5\fs24\b\sbasedon19\snext19 Heading 3;}
{\s30\sl240\slmult1\fi-431\li720 Tick List;}
{\s19\sl240\slmult1\f4\fs24 Normal;}
{\s17\sl240\slmult1\fi-431\li720\sbasedon23 Lower Case List;}
{\s1\sl240\slmult1\li1440\ri1440\sa117\sbasedon19 Block Text;}
{\s16\sl240\slmult1\f4\fs24\sbasedon29 List;}
{\s15\sl240\slmult1\f4\fs24\sbasedon7 Index;}
{\s14\sl240\slmult1\fi-431\li720 Implies List;}
{\s2\sl240\slmult1\fi-431\li720 Box List;}
{\s28\sl240\slmult1\fi-431\li720 Star List;}
{\s24\sl240\slmult1\f0\sbasedon19 Plain Text;}
{\s5\sl240\slmult1\tx1584\sbasedon20\snext19 Chapter Heading;}}
\kerning0\cf0\viewkind1\paperw23811\paperh16837\margl1440\margr1440\landscape\widowctl
\sectd\sbknone\colsx360\margtsxn720\margbsxn720\pgncont\ltrsect
\pard\plain\ltrpar\s19\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}QC001 0 1 2 3 4 5 6 7 8 9}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} This is the beginning of all IO execute cyucles for all This micro-routine begins the final decoding of the four}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} IO channels. Entry into the routine if from the I-cycles IO ops, (Start-IO,Test-IO,Halt-IO,and Test-Channel). The}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}A micro-program For RS ops at entry T is set to 4A, the final decode is effected by inspection of the two low}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} address of the 2nd byte of the CAW in main storage, the order op bits found in G5 and G7 at entry from I cycles.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} exit from RS I cycles leaves S1=0 if the IO instruction Inspection of the channel address (found in U5,U6,andU7)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} is being performed in the main instruction stream and is also undertaken to direct the initiation of the oper-}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S1=1 if the instruction is being executed by an execute ation to the proper channel. An entry from the hardware}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} instruction. If S1=2, the IC and any impending wrap con- forced interrupt routine also shares this entry routine.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}B ditions have already been stored temporarily in LS-A9-AA.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 01 --- 031D 00 --- 05EC 11 --- XXX}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 1001,0 | K 0010,0 | | Go to |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A 0+0+1>L | A 0+KL>L | | QA879.CAE |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}C QA091.NFE-------------------------------O--*S *B9 LS S---- ----------------------------------------------------------------------S WRITE |*--O---| |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01,11) | C 0>S4,S5 | | | C 0>S6 | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} I-O ops | | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} -any I-O | R 1,0 AAR | | R 1,CA01>W 46R | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} instruction | C2-- 10 --CB | | C8-- 11 --CH | C9-- 11 --CJ}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} T is set | B9-Mem Prot. | | Problem State | Prg Int}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}D to 4A | and Supervisor | | IO not allowed |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | ----------------------------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 11 --- 031F | 10 --- 03AA 01 --- 0571 | | 01 --- 05ED 11 --- 0583 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 1001,0 | | K 0101,1 | K 0001,1 | | --K 1100 | K 0010,1 | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A 0+0+1>L | | A RL.LL>Z | A I>R | | | | A J>R | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}E ----S *B9 LS S*--O---S WRITE K>W R*--O---S *A9 LS S*--O---S STORE |*--O---S *AA LS S*- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C 0>S4,S5 | C LZ>S5 | | C 1>S6 | C 0>S6 | | C 0>S2 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | C Y>WRAP | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 1,0 AAR R S1,1 71R | R 0,S5 ECR R S6,1 81R | R 0,1 EDR |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} E2-- 10 --EB E3-- *1 --EC | E4-- 0* --ED E5-- *1 --EE | E6-- 01 --EF |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} From checking BR on execute | Not execute Store IC-- | Access AA for |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}F mask in D reg Chk Sys mode | Start IJ store I in A9-J in AA | J storage |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} ----------------------+-------------------------------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 01 --- 0581 | 11 --- 0573 10 --- 05EE |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0100,0 | ----K 0111 | K 0010,0 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A GXL!KH>R | A G.KL>G | A 0+KL>L | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}G ----S *8C LS S*------S STORE |*--O---------------------------------------------------------------------S WRITE |----}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | C 0>S2 | | C 0>S6 | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 1,1 73R R 1,S5 EER | R 1,CA01>W 46R }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} G3-- 11 --GC G4-- 1* --GD | G8-- 11 --GH }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 8C-ILC + PSW G=0000 00XX | Problem State}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}H bit storage BR on Sys mode | IO not allowed}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} -------------------------------------------------------------------}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 11 --- 05EF 01 --- 0505 10 --- 0586 10 --- 0506 00 --- 0588 00 004 0508 01 --- 0509}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | K 0010 | | | K 0111 | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A T+0+1>T | A R>I | A T.-KL>T | A R>J | A R.KL>S | A I+0>ZC | A T-0>T |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}J ----S T>MN MS S*--O---S WRITE |*--O---S T>MN MS S*------S WRITE |*------| |*------S T>MN MS S*------S WRITE |*-----------------------------------QC011------JHE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | C ANSNZ>S2 | | | | | (10,11) EF,CB}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | | | 004V | | CAW handling}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R G6,1 05R | R 1,G7 86R | R 1,0 06R R 0,0 88R R 0,0 08R R 0,1 09R R 1,S3 8AR routine for}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} J2-- *1 --JB | J3-- 1* --JC | J4-- 10 --JD J5-- 00 --JE J6-- 00 --JF J7-- 01 --JG J8-- 1* --JH Start IO}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 4A-CAW byte 2 | Stt IO or TIO | 4B-CAW byte 3 Nxt CCW addr Check lo 3 bits 49-CAW byte 1 BR on addr err}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}K partial decode | Finish decode | T set to 49 now in IJ reg of addr for NZ Chk CCW addr T set to 48}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | S=0000 0000 for too big S3=1=error}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | 11 --- 0587 if all ok Addr too big}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | ----K 0111 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A U.KL>Z |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}L QA901.LJE----------------------------------------------------+------------------------*| |*---------------------------------------------------------------------------------------------------------------------------QC011------LDE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (11) | C ANSNZ>S2 | (01)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Interrupt | | | Interrupt or}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} entry to | R 0,1 89R TIO initial}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} cause CSW | L4-- *1 --LD}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} storage | TIO (G3=0) or}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}M | interrupt (G3=1)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 11 --- 0507 10 --- 050E 00 --- 0574}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0111 | K 1001,0 | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A U.KL>S | A 0-0>L | A VH+0+1>S |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}N ----S WRITE |*--O---| |*--O---| |*-----------------------------------------------------------------------------------------------------QC041------NEE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C ANSNZ>S2 | | C K>FB | | | | (10) EC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | Halt IO cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 1,G7 0ER | R S2,0 74R | R 1,0 3AR to Mplx Chnl}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} N3-- 1* --NC | N4-- *0 --ND | N5-- 10 --NE --Enter UCW}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} HIO or TC | HIO-L=FF | Set S with hi addr formation}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}P Finish decode | XH,XL=00 | 4 un addr bits routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S=0000 0000 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} if Mpx cnl addr | 11 --- 050F | 10 014 0576}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0001 | ----K 1001,1 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A FT.KL>Z | A UL>S |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}Q ----| |*--O---| K>W R*-----------------------------------------------------------------------------------------------------QD011------QEE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | (01)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | 014V Sel Ch I/O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 1,Z=0 76R | R 0,1 19R commands}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q4-- 1* --QD | Q5-- 01 --QE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Test Channel | Sel Ch Hlt or}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}R BR on chnl | Tets Channel}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 11 --- 0577}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Version for system | K 1011,1 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} with at least one | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}S selector channel ----S *BB LS S*-----------------------------------------------------------------------------------------------------QC151------SEE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} and 64k main storage | | (00,01) NF,QF}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q | | Test Channel}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C R 0,Z=0 D0R cmd-Mplx}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 0 S5-- 0* --SE channel}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 0 | 128015 10/11/65 | Mach 2030 | Date 11/17/65 Sheet 1 QC001 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | 128045 11/17/65 | Name | Log 2046 Version A02 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 128065 07/26/67 | Mode Manual | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | P.N. 837405 | All channel operation decode |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | IBM Corp. | and execute initiation |}
\par\pard\plain\ltrpar\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}\page }
\par\pard\plain\ltrpar\s19\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}QC011 0 1 2 3 4 5 6 7 8 9}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} This routine contains the completion of CAW check for}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} the Start I/O instruction and the final breakout of SIO }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}A and TIO to the designated channel routines, also found}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} on this page is the Transfer-in-Channel (TIC) routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} used when specified in command-chaining (CC) and data}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} chaining (CDA). TIC is an illegal initial command (the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} CAW cannot legally specify a 1st CCW which contains a}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} TIC command-format XXXX1000).}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}B}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} On TIC error (bad format or address S2=1) we update the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 10 --- 058A 11 006 050B 00 --- 050C next CCW address in the UCW +8 in preparation for}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | a full CSW store. If no error we update UCW}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A R>Z | A RL>Z | A UL!RH>U | and IJ with the new CCW address +8 as}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}C QC001.JHE-------------------------------O---S T>MN MS S*------S WRITE |*------| |*--- specified by the TIC.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (11,10) | C ANSNZ>S2 | C ANSNZ>S2 | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} CAW handling | | | | 006V | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} routine for | R 1,1 0BR R 0,0 0CR R 1,0 72R |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Start IO- | C2-- 11 --CB C3-- 00 --CC C4-- 10 --CD |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} MP portion | A8-Mem Prot Chk lo 4 bits Load prot tag |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}D | byte in CAW must be zero into U high |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} ------------------------------------------------------------------+----------------------}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 10 --- 0572 | 11 --- 058B}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0111 | ---*K 0111,1 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A U.KL>Z | A 0+KL>LC |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}E QC351.EHE-------------------------------------------------------------------------------------------------O---S IJ>MN MS S*--O---S WRITE |*-------------------------------------------------------------------------------QD461------EFE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (10) C ANSNZ>S2 | | C 1>S7 | (01) JB}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} IPL entry | | | | | Program err}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} to Start IO R S2,1 89R | R 0,CA0A>W 89R Interrupt}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} routine E5-- *1 --EE | E6-- 01 --EF exit}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Chk chnl addr | CAW format bad L=07}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}F in U lo for 000 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QC001.LDE------------------------------------------------------------------------------------------------- Begin access |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01) | to CCW cmd | 01 --- 0589 11 014 058F}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} From Test | byte--000 | K 1001,0 | K 1001,1 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} IO or Intrpt | | A J+0+1>J | A UL>Z |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}G initialization -----------------------O---S WRITE |*--O---| K>W R*--O------------------------------------------------------QD131------GGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C K>FB | | | | | (11)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | 014V | Selr ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R S2,G7 8CR | R S4,1 1BR | I-O commands}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} G6-- ** --GF | G7-- *1 --GG |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Good CAW pnt | Selr TIO cmd |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}H Load XH,XL=00 | or interrupt |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 00 --- 0544 10 --- 0512 | 10 014 058E |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QC131.LHE----------------------------------*K 0010 | K 0111 | | K 1001,1 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00) A J+KL>J | A J!KL>J | | A UL>Z | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}J Enter CCW S IJ>MN MS S*--O---S WRITE |*--- O---| K>W R---O------------------------------------------------------QD011------GGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} chk routine | | | | | | | | | (01)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} from command ---*| | | | | | | | | Selr ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} chaining | R 1,Z=0 12R | R 0,0 1CR | | R 0,1 19R I-O commands}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S0=0 | J2-- 1* --JB | J3-- 00 --JC | | J7-- *1 --JG }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | CCW byte 1 | No TIC | | Selr Stt IO}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}K | (must be zero) | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QC101.CGE-------------------------------- BR on TIC cmd | ------------------------------------------------------------------+----------------------------------------------------------------------------QC021------JCE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00) | 11 --- 0513 10 --- 0526 | (00) JD}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Enter TIC | | | K 1001,1 | | Enter CCW cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} check rtne | A R>Z | A 0+KL>L | | routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}L from CDA ----S WRITE |*--- ----| |*------------------------+----------------------------------------------------------------------------QC461------LEE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} routine C ANSNZ>S2 | | | C 1>S7 | | (01,11) JB,NB}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | Program err}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,1 19R | | R ?0,CA0A>W 89R | interrupt}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} L3-- 01 --LC | | L5-- *1 --LE | Exit-L=09}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} TIC on chaning | | TIC cmd format |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}M Chk byte 1 for NZ | | bad-bad addr |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} --------------------------------------------- ------------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 01 --- 0519 01 --- 0821 | 00 --- 0524 | 00 --- 058C}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0011,1 | K 0111 | | | | O---K 1000 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A J^KL>J | A RL.KL>Z | | A J+0+1>JC | | A RL^KL>Z |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}N ----S IJ>MN MS S*------S WRITE |*--- O-S IJ>MN MS S*--+---S WRITE |*---------------------------------------------------------QC021------NGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | C ANSNZ>S2 | | | | | | | | (00) EB}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | TIC complete}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,1 21R R 0,1 0DR | | R 0,0 8CR | R 0,0 1?R Enter CCW chk}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} N2-- 01 --NB N3-- 01 --NC | | N6-- 00 --NF | N7-- 00 --NG routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} CCW byte 3 Chk lo 3 bits | |Read-out CCW | SIO or Chain}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}P New CCW adr lo for non zero | |op byte 0 | Chk for TIC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} ------------------------------------------------------------------- | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 01 --- 050D 00 --- 0522 01 --- 05AD 11 --- 05CB .00--- 0510 | New CCW addr | 01 --- 058D 01 --- 0561}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0111 | K 1000 | K 0001 | | | | | | is now in IJ | | | K 1001,0 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A T!KL>T | A J+KL>RC | A T^KL>T | A I+0+C>RC | | | | | A 0>S | A 0-0>L |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}Q ---*| |*--O---S T>MN MPX S*------S STORE |*------S T>MN MPX S*------S STORE |*----- ----| |*------| |*-----------------------------------QC041------QHE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | | | C K>FB | (01) ED}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | | | | | Enter T addr}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R S2,0 20R | R 0,1 ADR R 1,1 CBR R 0,0 10R R S2,0 24R R 0,1 61R R 0,1 9?R formation}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q1-- *0 --QA | Q2-- 01 --QB Q3-- 11 --QC Q4-- 00 --QD Q5-- *0 --QE Q7-- 01 --QG Q8-- 01 --QH routine-TIO}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Mplx chnl TIO Set L=FF as}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}R --------------------------------------------O------------------------------------------------------------------ or interrupt a mask for}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | later use,}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 00 --- 0520 01 --- 0541 11 --- 0543 | XXH,XH,XL=000}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} This version for system with | K 0010 | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} memory protect and with at least | A J!KL>J | A R>J | A R>Z | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}S one selector channel ----| |*------S IJ>MN MS S*------S WRITE |----}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C R 0,1 41R R 1,1 43R R 1,0 22R}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 0 S4-- 01 --SD S5-- 11 -SE S6-- *0 --SF}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | 128065 07/26/67 | Mach 2030 | Date 09/24/68 Sheet 1 QC011 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | 128066 11/14/67 | Name | Log 2016 Version A03 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 128069 09/09/68 | Mode Manual | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | P.N. 837142 | Selector Cnl op breakout |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | IBM Corp. SDD | and Mplx Cnl TIC routine |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s19\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}QC511 0 1 2 3 4 5 6 7 8 9}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} This microprogram is the breakout point from the Mpx is checked for validity. An invalid command sets Cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} channel Start I/O to the 1050 Start I/O. The op code is Reject in the sense register, and Unit Check in the unit}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}A checked. If Start I/O, the unit status is checked for status.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} busy When busy because of a stacked interrupt, micro}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} force is turned off. The interrupt condition plus busy is}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} presented to the CSW routine and the unit status is}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} reset. When busy and there is no interrupt stacked, busy}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} is presented to the CSW routine. When not busy the high -----------------------------------------------------------------------------------------}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}B byte of the command | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 00 010 A30 | 10 010 088E 01 010 088D |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 0111 | | | | K 0010 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A R.-KH>D | | | | A 0+KH>TA | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}C ---*| |*--- ----| |*--O---| |*----- -----------QC541------CEE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | (00,01) CB,QB}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C 010V | | 010V | | 010V | Auto Intr}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 0,G3 3CR | R R0,1 8DR | R 1,1 8FR | or Test I/O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C5-- 0* --CE | C7-- *1 --CG | C8-- 11 --CH | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Test I/O or | Busy | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}D | auto Intr D=Un Sta | ----------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | X000XXXX ------------------------------------------- | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 10 010 A32 10 010 0A36 | | | 11 010 088F}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0001 | K 1000,0 | | | --K 0000,1 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A R.KH>Z | A TTX>R | | | | | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}E O---| |*--O-----------------------------------------------| |*O ----S T>MN MPX S*-------------QC151------EJE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C ANSNZ>S2 | | C ANSNZ>S2 | | C 0>S2 | (01) JD}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C 010V | ----------------------------C 010V ------| 010V Mpx Halt}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 1,Z=0 36R | | R 1,Z=0 8ER R 0,CA05>W C5R I/O routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | E5-- 1* --EE | | E8-- 1* --EH E9-- 01 --EJ Set Cdn Cd1}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Test Busy | | RO UCW op}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}F | BR on oper | | Flg byte}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} --------------------- | | D=0 Un Sta}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 10 010 08EA 11 010 A2F | | 11 010 A37 | 11 010 0A33 }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 1010,1 | K 0001 | | | K 0001 | | | | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A 0>D | A TT.KH>Z | | | A R.JH>Z | | A 0>TA | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}G ----S K>W R*------| |-- ----| |*O ----S STORE |----}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C 010V C 010V C 010V | | C 010V |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 1,1 2FR R G6,0 30R R S2,0 34R | | R 0,1 31R |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | G4-- 11 --GD G5-- *0 --GE G6-- *0 --GF | | G7-- *1 --GG |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Halt/Test I/O Test for oper Not oper | | Int stkd, 0 Unit |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}H | BR on busy | | Sta-micro force |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | off |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 01 010 0875 01 010 0879 11 010 0877 | 00 010 08EC 10 010 8FA | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 1001,1 | K 0010 | K 1000 | | | | K 1001,1 | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A SX>S | A H!KL>H | A FT.KL>Z | | A FTSP>Z | A 0>R | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}J QC031.JHE------------*S *99 LS S*------| |*------S WRITE |*--O ----S WRITE | ----S *99 LS S*+-O---------------------O------------------------------------------------------QC551------JFE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01) | | | | | | | | | | | C 0>S0 | | (01) CD}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Breakout C 010V C 010V C 010V | | C 010V | C 010V | Un Sta busy}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} from Mpx Ch R 0,1 79R R 1,1 77R R S4,0 E8R | | R 0,0 00R | R G2,CA0A>W 31R | Form CSW set}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Start I/O J1-- 01 --JA J2-- 11 --JB J3-- *0 --JC | | J5-- 00 --JE | J6-- *1 --JF | Cond code 1}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Read Unit Sta Mplx Hold On BR Stt/Halt- | | IPL-Stop | Busy, read Unit -----}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}K into R. Cross Test I/O mask | | | Sta, BR Int stkd |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S for CC S5=1 for IPL | | --------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 00 010 08EB | 01 010 08ED 11 010 8EF | | 00 010 A34}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Reg sta on ent | | | | K 1111 | K 0110 | | --K 0010 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Stt I/O CC | A GL!RH>G | | A D.KH>Z | A R.-KH>D | | A H.-KL>H |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}L D=cmnd Cmnd 0000 XXXX ----| |*--O---| |*--O---| |*- -*| |*---------------------------------------------------------QC541------LGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} L=fld Flg XXXX X111 | | | | | | | | | | (10) GH}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S0=0 0 C 010V C 010V | C 010V | C 010V Set Cond Code}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S1=0 1 R 0,Z=0 ECR R 1,G3 EER | R 1,0 FAR | R 1,0 3ER 3 for Start}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S2=X 1 L4-- 0* --LD L5-- 1* --LE | L6-- 10 --LF | L7-- 10 --LG I/O, Halt I/O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S3=0 X Stt I/O/IPL Stt.I/O, mask | D=Un Sta less |Not operational}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}M S4=0 X Un status in GH cmnd hio | De Ser, Int stkd |Mpx hold lt off}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S5=1 1 GL same as BR on busy sta | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S6=0 0 on entry | 10 010 08EE |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S7=0 0 | K 0011 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} V=Unit addr | A D.KL>Z | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}N ----| |*--O-+--------------------------------------------------------------------------QC521------NFE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | (01) EA}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C 010V | | Test for valid}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,Z=0 80R | | 1050 cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} N6-- 0* --NF | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} BR on hi cmnd | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}P Test lo cmnd | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} --------------------------------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 00 010 0880 10 010 0882 | 01 010 A35 01 010 A21 01 010 08E9}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 1000 | K 0100,1 | | | | K 1000,0 | K 0010 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A 0!KH>U | A 0!KL>V | | A U>R | | | A 0!KL>R | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}Q ----| |*------| |*----+-S UV>MN LS S*------S STORE K>W R*------| |*-------------QC551------QJE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C 0>S2 | | | | | | C 0>S0 | | | (00,01)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QC521.CJE-------------------------------- ---*C 010V C 010V O-C 010V C 010V C 010V Invalid cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00,01) | | R 1,0 82R R 0,CA0A>W 35R | R 0,1 21R R 0,1 E9R R 0,S5 E4R BR on origin}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Update sense | | Q5-- 10 --QE Q6-- 01 --QF | Q7-- 01 --QG Q8-- 01 --QH Q9-- 0* --QJ Stt I/O or CC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} byte or to | | Hi cmd not 0 V=home sense |Addr home sens Store R set Branch on CC as}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}R set Cond | | Preset cmnd rej address |byte sense data S0=0 origin preset}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Code 3 | | in U for home |in R Unit Chk in R}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | sense byte |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} ------------------------------------------------------------------+----------------------------------------------}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}S QC521.CDE--------------------------------------------------------------------------------------------------}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q Update sense}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C byte}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 5}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | 128015 09/27/65 | Mach 2030 | Date 11/17/65 Sheet 1 QC511 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | 128045 11/17/65 | Name | Log 2245 Version 010 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 128054 04/04/66 | Mode Manual | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 128060 08/22/66 | P.N. 837172 | 1050 Start I/O, Test I/O |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 128061 10/06/66 | IBM Corp. | and Halt I/O |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s19\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}QC521 0 1 2 3 4 5 6 7 8 9}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} This microprogram checks the low byte of the command for not from CC Cnd Code 3 is set. WHen operational the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} validity. If invalid, Command Reject is set in the sense command is checked for a modifier bit. A read with a}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}A register and Unit Check set in the unit status. Branching modifier sets up the TA register to perform a read}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} is done on a valid command to determine what the, inquiry. No modifier, sets up a read reader 2. A write}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} command is. On a read or write command the 1050 is modifier indicates, that it is write with a CELF. The}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} checked for being operational. If not operational skip flag is set to indicate CRLF.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} intervention required is set in the sense register}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} when from CC. If}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}B ------------------------------------------------------------------O------------------------------------------------------QC511------CDE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | (00) QE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 01 --- 8A1 10 --- A56 | 11 --- A47 10 --- A2A | 00 --- A48 Update sense}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 1000 | K 1000,0 | | K 0100 | K 1000,0 | | ------K 0100 | byte}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A D.KL>Z | | | | A L.KH>Z | | | | | A 0!KH>U | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}C ----| |*--- ----S K>W R*--- ----| |*--O---S K>W R---- | ----| |*-------------QC511------CJE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | | | | | | | (00,01) QG,LG}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C 010V | | R 010V | C 010V | C 010V | | C 010V Update sense}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 0,0 A0R | | R 0,0 80R | R G4,0 28R | R 0,0 80R | | R 0,S5 34R byte or set}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C2-- 00 --CB | | C4-- 00 --CD | C6-- *0 --CF | C7-- 00 --CG | | C9-- 0* --CJ cond code 3}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Cmnd bits 6,7=0 | | Invalid cmnd | Ctrl cmnd, BR on | Ring alarm | | Not rdy or not}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}D | Mask cmnd for | | | modifier mask L | Set Cmd Reject | | oper. Set Intv}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | bit 4 | | | for CC next | No alarm | | Reqd in U BR}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 01 --- 088a | | 00 --- 8A0 | | | 00 --- A28 | | on CC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} K 0100 | | | K 1010,1 | | | | K 1000,0 | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} A D.KL>Z | | | A S>R | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}E QC511.NFE------------*| |*--O---------------------O---S K>W R*--O | ----S K>W R*----------------------+-+--------------------------------QC551------EGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01) C | | | | | | | | | (10,11) GB,LB}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Test for vald C 010V C 010V | | C 010V | | Cmd immed}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1050 cmd R 0,Z=0 A0R R 1,Z=0 56R | | R 1,Z=0 E6R | | Ck for CC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} E1-- 0* --EA E3-- 1* --EC | | E7-- 1* --EG | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Mask cmnd for Cmnd bits 6,7= | | No Op BR on | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}F invalid BR on 01,10,11 | | CC next | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} cmnd bits 6,7 BR on bit 5 | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} from 981,bit4 | 01 --- A25 11 --- A4B | 10 --- A46 | | 10 --- 0A4A}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} from 993. | K 0100 | | | | K 0100 | | | K 1100,0 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A D!KL>G | A TTH!RL>S | | A 0!KL>V | | | A 0!KH>TA | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}G T= | --| |*--O---| |*--O---| |*O-------------------------------------------- O---| |----}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} S= | | | | | | | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} L=CCW flgs | | C 010V | C 010V | C 010V | | C 010V |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} D=CCW op byte | | R 1,1 4BR | R G6,G7 44R | R 0,S3 48R | | R 1,CA08>W 9BR |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} U= | | G4-- 11 --GD | G5-- ** --GE | G6-- 0* --GF | | G9-- 1* --GJ |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} V=Unit addr --------------------- |Valid cmnd to | Gate hi tags to | Read cmnd, BR | | Rdy-Home Rdr |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}H I= | |1050, G=cmnd | S and retain SL | on 1050 oper | | Stt and Rdr |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} J=CCW low data byte addr | |G5=1 | Branch on cmnd | V=sense byte | | Run on |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} GH=Unit status | 11 --- A57 | 00 --- A24 | | addr | 00 --- A4C 11 --- A23 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | K 0100 | | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | A D.-KL>G | | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}J --| |*----O-| |---- | | --| |*----O-| |*--- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C 010V C 010V | | | C 010V | C 010V |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,G5 24R R 1,1 4BR | | | R 1,Z=0 22R | R S1,0 48R |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} J3-- 0* --JC J4-- 11 --JD | | | J7-- 1* --JG | J8-- *0 --JH |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Valid cmnd to | | |Read cmnd, BR |Read Rdr 2 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}K 1050,G=cmnd | | |on modifier |cmnd BR on |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} G5=0 | | --------------------- |Sel/Rdy |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 01 --- A45 | 01 --- A49 | | 10 --- 0A22 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0100 | | K 1000 | | | K 0101,0 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A 0!KL>V | | A D.KL>Z | | | A 0!KH>TA | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}L O---| |-O-----| |*--O ------------------------| |---O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | | | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C 010V C 010V | C 010V |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 0,S3 48R R 0,G7 4CR | R 1,CA08>W 9BR |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | L6-- 0* --LF L7-- 0* --LG | L9-- 1* --LJ |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Write cmnd, BR Mask cmnd for | Read Inq-Rdr |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}M | on 1050 oper modifier BR on | Run and |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | V=sense byte write | Proceed on. |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | addr | 01 --- A4D |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | K 1000,0 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | A 0!KH>TA | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}N | ----S K>W R*--O---------------------O----------QC531------NHE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | (11) ED}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C 010V | | Valid cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 1,Z=0 9AR | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | N8-- 1* --NH | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Write cmnd. BR on | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}P | modifier, turn | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | on home Rdr Stt | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 00 --- A44 | 10 --- 089A |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0011,0 | | K 0001 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A 0!KH>TA | | A L!KH>L | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}Q ----| |*--- ----| |----}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C 0>S6 | | | | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C 010V | C 010V}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 1,CA08>W 97R | R 1,1 9BR}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q6-- 11 --QF | Q9-- 1* --QJ}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Sense cmnd, | Set skip in}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}R turn on Micro | flags-acr}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Force, Proceed | for write cmnd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Set S6=0 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}S -----------------------------------------------------------------------------QC531------QFE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (11) EC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q Sense cmd}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 5}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 2 | 128015 09/23/65 | Mach 2030 | Date 11/17/65 Sheet 1 QC521 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | 128045 11/17/65 | Name | Log 3563 Version 010 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | Mode Manual | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | P.N. 837173 | 1050 Start I/O Test comnd for |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | IBM Corp. | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}}}