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ibm2030.IBM2030/CLD/qd081.rtf
Lawrence Wilkinson bf39525f5f Add CLD files in RTF format
2021-07-23 21:56:41 +02:00

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\pard\plain\ltrpar\s19\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}QD081 0 1 2 3 4 5 6 7 8 9}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} The Address In wait loop is used by Start I/O and CC. If or Test I/O, as Test I/O and I/O Interrupt also use the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }{\f0\fs14\lang1033{\*\listtag0} Status In is sent, the routine goes to the Control Unit Status In wait loop. CD also uses the data address fetch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}A}{\f0\fs14\lang1033{\*\listtag0} Busy routine. If Address In is found, an address match is routine after which it sets count ready and restores the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }{\f0\fs14\lang1033{\*\listtag0} done. A mismatch will give an Interface Control Check. If CPU.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }{\f0\fs14\lang1033{\*\listtag0} the addresses compare, the command will be sent to the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }{\f0\fs14\lang1033{\*\listtag0} control unit and set into the selector channel hardware.}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }{\f0\fs14\lang1033{\*\listtag0} The data address will be read out and loaded in the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} selector channel hardware, and the routine will go to the}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}B}{\f0\fs14\lang1033{\*\listtag0} Status In wait loop. When Status In is found, the routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} will go to the status routine of either CC and Start I/O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QD101.EDE------------------------------------------------------------------------------------------------------------------------}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01) |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}C Sel Ch |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Prog Ck in |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} CC |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QD071.EGE-------------------------------------------------------------------------------------------------- |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}D (10) | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Selr Ch ----------------------------------------------+---------------------+--------------------------------------------------------------------------------------------------QD071------EBE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Sta In wait 11 --- 09B3 | 11 --- 09AF | | 11 --- 09B7 }{\f0\fs14\lang1033{\*\listtag0} (00)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} loop Test I-O | | | K 1000 | | | K 0101 | }{\f0\fs14\lang1033{\*\listtag0} Selr Ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | A GT.KH>Z | | | A 0+KH>R | }{\f0\fs14\lang1033{\*\listtag0} Ctrl unit busy}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}E ----| |*- ----| |*--- | | ----| |*---}{\f0\fs14\lang1033{\*\listtag0} CC+Start I-O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C GI>GR | | C HZ>S4 | | | | | C 0>S4,S5 | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | 014V | | 014V | | | | | 014V -------------------------------------------------------QD161------EGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | R 0,0 F8R | R 1,1 1FR | | | | R 1,0 2AR }{\f0\fs14\lang1033{\*\listtag0} (10)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | E2-- 00 --EB | E3-- 11 --EC | | | | E7-- 10 --EG }{\f0\fs14\lang1033{\*\listtag0} Selr Ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Sta In | Time-out | | | |}{\f0\fs14\lang1033{\*\listtag0} Time-out Inf Ctrc Chk}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}F | GR=Dev status | Test for Sel In | | | | No Sta In resonse}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | ----------------------+---------------------+---------------------+----------------------------------------------------------------------------QD161------ECE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 00 --- 09B0 | 01 --- 09AD | 10 --- 09B6 | 01 --- 09BD | 01 --- 09B5 11 --- 097B (11)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 1100 | | K 0100 | | K 1010,0 | ---*K 0100 | | | | K 0001,0 | Selr Ch No}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A GTX+KH>Z | | A S+KL>S | | A 0>VC | A GT.KL>Z | | A V+0+1>V | | | response test}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}G O---| |*--O---| |*- ---*| |*------| |*--O---| |*--- ----| |*-------------QD101------GJE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | | | C K>GA | | | | | | | C K>GA | (10)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} QD051.GGE-----------------------------O-+--*| 014V | 014V | | 014V ----| 014V | 014V | | | 014V Prog Ck}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (00,10) | | R AC,1 ADR R AC,1BC B0R | R 0,1 BDR | R AC,1 B5R R 0,Z=0 BDR | | R 1,0 F2R in CC}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Selr Ch | | G2-- *1 --GB G3-- ** --GC | G5-- 01 --GE | G6-- *1 --GF G7-- 0* --GG | | G9-- 10 --GJ}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Unit Selection | | Test for Adr In | Com Out | Test for Status | | Srv Out}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}H CC+Start I-O | | + Sta In response | | In response | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | O------------------------------------------ --------------------------------------------O |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | 10 --- 09B2 01 --- 09B1 11 --- 0993 00 --- 09F4 11 --- 09DF 00 --- 09B8 | 00 --- 09BC | 10 --- 097A}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | | | K 0011 | K 1010,0 | | | K 0100 | | | | | | | K 0100 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | A GR^R>Z | A V+KL>V | A SL-0+1>SC | A V-0>V | A GT.KL>Z | A 0>VC | | A GR>R | | A GJXH+K0>Z | }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}J | ----S UV>MN MS S*------S WRITE GR S*--O---S UV>MN MS S*------S WRITE GR S*--O---S UV>MN MS S*--O---S WRITE GR S---O---| |*--O---| |*--O----------QD091------JJE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | C GI>GR | C GR>GG | | C K>GA | C GR>GW | | | | | C GR>GU | C GI>GR | C HZ>S4 | | (00,01)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} ------| 014V | 014V | | 014V ----| 014V | | 014V | | 014V | 014V | 014V | Selr Ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,1 B1R R 1,Z=0 93R | R 0,0 F4R | R 1,S3 DER | R S0,0 B8R | R 0,Z=0 BCR R 1,S3 7BR R S6,Z=0 A0R | Status routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} J2-- 01 --JB J3-- 1* --JC | J4-- 00 --JD | J5-- 1* --JE | J6-- *0 --JF | J7-- 0* --JG J8-- 1* --JH J9-- ** --JJ | CC+Start I-O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Adr In GG=Op | Addr match | GV=low data addr | Fetch high data | GU=high data addr Sta In Test Ch Sta=0 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}K Fetch Op byte | S3=1 | | addr | R=GR=Dev status -----------QD071------JJE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Addr compare | Com Out | | | (10,11)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 01 --- 09F5 | | | 10 --- 09BA }{\f0\fs14\lang1033{\*\listtag0} Selr Ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 1111 | | | | K 0001 | }{\f0\fs14\lang1033{\*\listtag0} Status routine}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A GR+K+C>ZC | | | | A GS.KL>Z | }{\f0\fs14\lang1033{\*\listtag0} Test I-O}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}L QD051.QEE---------------------------------------------------------------------------+--*S UV>MN MS S*--- | ----S WRITE GR S*---------------------------------------------------------QD091------LGE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} (01) | C GUV>GCD | | C GR>GU | }{\f0\fs14\lang1033{\*\listtag0} (10)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Selr Ch CD | | 014V | | 014V }{\f0\fs14\lang1033{\*\listtag0} Selr Ch CD}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Data address | R 0,0 F4R | R 1,0 BER }{\f0\fs14\lang1033{\*\listtag0} Set cnt rdy}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} fetch | L4-- 00 --LD | L7-- 10 --LG }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | Fetch low data addr | Test Ch waiting}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}M | Test high count#0 | GL=high data addr}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | GCD=count ---------------------------------------------------------------------------------------------------QD051------JEE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 10 --- 0992 }{\f0\fs14\lang1033{\*\listtag0} (10)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | K 0100 | }{\f0\fs14\lang1033{\*\listtag0} Selr Ch CD}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | A 0+KH>R | }{\f0\fs14\lang1033{\*\listtag0} cnt zero}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}N ----| |*---------------------------------------------------------------------------------------------------------------------------QD161------NDE}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} C HZ>S4,LZ>S5 | }{\f0\fs14\lang1033{\*\listtag0} (00)}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | 014V }{\f0\fs14\lang1033{\*\listtag0} Selr Ch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} R 0,0 58R }{\f0\fs14\lang1033{\*\listtag0} addr mismatch}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} N4-- 00 --ND }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Addr mismath}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}P}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}Q}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} }
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}R}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}S}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}
\par}\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} Q}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} D}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 0}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 8 | 128053 02/10/66 | Mach 2030 | Date 03/01/66 Sheet 1 QD081 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} 1 | | Name | Log 2072 Version 014 |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | Mode Manual | |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | P.N. 837194 | Selr Channel Unit Selection |}
\par\pard\plain\ltrpar\s25\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0} | | IBM Corp. | routine CC+Start I-O |}
\par\pard\plain\ltrpar\sl240\slmult1{\f0\fs14\lang1033{\*\listtag0}}}
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