From f0dbd0a33edaa56ce1c76b2b83a45aaedd425235 Mon Sep 17 00:00:00 2001 From: J Date: Tue, 5 Mar 2019 02:17:06 -0500 Subject: [PATCH] correct outputs for Lattice EVB. Fix stack location. Still crashes with result code 0x11 on the LEDs --- cpu_lattice.vhd | 35 +++++++++-- ram.img | Bin 4680 -> 4672 bytes ram_init.vhd | 138 ++++++++++++++++++++--------------------- testrom/main.c | 4 +- testrom/startup/sh32.x | 4 +- 5 files changed, 103 insertions(+), 78 deletions(-) diff --git a/cpu_lattice.vhd b/cpu_lattice.vhd index 09cdfc7..bef48c8 100644 --- a/cpu_lattice.vhd +++ b/cpu_lattice.vhd @@ -5,9 +5,12 @@ use std.textio.all; use work.cpu2j0_pack.all; use work.data_bus_pkg.all; + +library sb_ice40_components_syn; +use sb_ice40_components_syn.components.all; + entity cpu_lattice is port ( - clk : in std_logic; - led : out std_logic_vector(7 downto 0)); + led : inout std_logic_vector(7 downto 0)); end; architecture behaviour of cpu_lattice is @@ -37,7 +40,7 @@ architecture behaviour of cpu_lattice is signal event_i : cpu_event_i_t := NULL_CPU_EVENT_I; signal event_o : cpu_event_o_t; --- signal clk : std_logic := '1'; + signal clk : std_logic := '1'; signal rst : std_logic := '1'; signal dummy : bit; @@ -46,6 +49,9 @@ architecture behaviour of cpu_lattice is signal pio_data_i : cpu_data_i_t := (ack => '0', d => (others => '0')); signal data_select : data_bus_device_t; signal db_we : std_logic_vector(3 downto 0); + + signal le : std_logic_vector(7 downto 0); + signal vh : std_logic; begin rst <= '1', '0' after 10 ns; @@ -57,6 +63,11 @@ begin -- wait for 10 ns; -- end process; + vh <= '1'; + + ck: SB_HFOSC generic map (clkhf_div => "0b10") + port map (clkhfen => vh, clkhf => clk, clkhfpu => vh); + process (data_master_o) variable dev : data_bus_device_t; begin @@ -120,6 +131,22 @@ begin db_o => data_slaves_i(DEV_SRAM)); -- intercept and print PIO and UART writes + + led(7 downto 3) <= le(7 downto 3); + + rgb: SB_RGBA_DRV generic map ( CURRENT_MODE => "0b1", + RGB0_CURRENT => "0b000001", + RGB1_CURRENT => "0b000001", + RGB2_CURRENT => "0b000001") + port map ( curren => '1', + rgbleden => '1', + rgb0pwm => le(0), + rgb1pwm => le(1), + rgb2pwm => le(2), + rgb0 => led(0), + rgb1 => led(1), + rgb2 => led(2)); + l0: process(clk) variable uart_line : line; variable l : line; @@ -130,7 +157,7 @@ begin -- write(l, string'("LED: Write ")); -- write(l, " at " & time'image(now)); -- writeline(output, l); - led <= pio_data_o.d(7 downto 0); + le <= pio_data_o.d(7 downto 0); end if; if data_slaves_o(DEV_UART0).wr = '1' and data_slaves_o(DEV_UART0).a = x"ABCD0104" then -- c := character'val(to_integer(unsigned(data_slaves_o(DEV_UART0).d(7 downto 0)))); diff --git a/ram.img b/ram.img index cd9d707bf7b1869f52c22396b6e9c232cc5fdfe6..3f8d9d4eec47bec52741087b49c12f527068dcfd 100755 GIT binary patch delta 497 zcmX@1azI6Zfq{{SfkFNcjNT|v%qV*20<*u812+SwzZwIO1VRRZFPmpDS~D_EnS6z5 zJL8niJJMgDVf>|maos1Wm1YIvO zIch^Z1C%|$FVDIFtnLZFIqL@?%VDyDfOY+yi;Rj+AWyG8%fO)D_QXMd+6_^EB@gcU zKNm!9ihu&egZqio6=6>x>xvMFyeR|}33$k$FO>MnaC#?G;-~dL3mJi8q3B{$m_2~% z*S~tmz_1GF`52%NZGf}}kOqdA;1>o)rndQ$p9pxfegO*KnQS6BSuh7EQ3Axkz!hu( z;-1Mj1g%ZYtWqsg(hQ7}j17&zGjmd`6hcZ<6?_wm6ckJq3=FJ{&8zkRLOqim_|ql9EESJV#*0jXt{0gc zwIQAX${ygCXI%kS_k`b^73h5-kI4!G*7Z*=GAcTOJiYoX1A~6s69@fi`paH1+z|Iy z^5Cxjb3yE;7${&oxSu#(5%mPJu84rhCjlPZFB$X~J>pFKWT@WBlK82RQD12N53tHm z{YjYOQNbzxxO63_rLZUFJ0$#(?2S^of~o=nyeoGe%Z6axmZ zU<(lU0P&Q`7X+