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100
PSNee_V8/PSNee_V8/BIOS_patching.h
Normal file
100
PSNee_V8/PSNee_V8/BIOS_patching.h
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@ -0,0 +1,100 @@
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#pragma once
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#ifdef BIOS_PATCH
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void Timer_Start(void);
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void Timer_Stop(void);
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extern volatile uint8_t count_isr;
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extern volatile uint32_t microsec;
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volatile uint8_t impulse = 0;
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volatile uint8_t patch = 0;
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ISR(PIN_AX_INTERRUPT_VECTOR) {
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impulse++;
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if (impulse == TRIGGER){ // If impulse reaches the value defined by TRIGGER, the following actions are performed:
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HOLD;
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#ifdef HIGH_PATCH
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PIN_DX_SET;
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#endif
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PIN_DX_OUTPUT;
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PATCHING;
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#ifdef HIGH_PATCH
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PIN_DX_CLEAR;
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#endif
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PIN_DX_INPUT;
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PIN_AX_INTERRUPT_DISABLE;
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impulse = 0;
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patch = 1; // patch is set to 1, indicating that the first patch is completed.
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}
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}
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#ifdef HIGH_PATCH
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ISR(PIN_AY_INTERRUPT_VECTOR){
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impulse++;
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if (impulse == TRIGGER2) // If impulse reaches the value defined by TRIGGER2, the following actions are performed:
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{
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HOLD2;
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PIN_DX_OUTPUT;
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PATCHING2;
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PIN_DX_INPUT;
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PIN_AY_INTERRUPT_DISABLE;
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patch = 2; // patch is set to 2, indicating that the second patch is completed.
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}
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}
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#endif
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void Bios_Patching(){
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// If LOW_TRIGGER is defined
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#ifdef LOW_TRIGGER
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PIN_AX_INTERRUPT_FALLING;
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#else
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PIN_AX_INTERRUPT_RISING;
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#endif
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if (PIN_AX_READ != 0) // If the AX pin is high
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{
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while (PIN_AX_READ != 0); // Wait for it to go low
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while (PIN_AX_READ == 0); // Then wait for it to go high again.
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}
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else // If the AX pin is low
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{
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while (PIN_AX_READ == 0); // Wait for it to go high.
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}
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Timer_Start();
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while (microsec < CHECKPOINT); // Wait until the number of microseconds elapsed reaches a value defined by CHECKPOINT.
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Timer_Stop();
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PIN_AX_INTERRUPT_ENABLE;
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while (patch != 1); // Wait for the first stage of the patch to complete:
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#ifdef HIGH_PATCH
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#ifdef HIGH_PATCH
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PIN_AY_INTERRUPT_FALLING;
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#else
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PIN_AY_INTERRUPT_RISING;
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#endif
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while (PIN_AY_READ != 0); // Wait for it to go low
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Timer_Start();
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while (microsec < CHECKPOINT2); // Wait until the number of microseconds elapsed reaches a value defined by CHECKPOINT2.
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Timer_Stop();
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PIN_AY_INTERRUPT_ENABLE;
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while (patch != 2); // Wait for the second stage of the patch to complete:
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#endif
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}
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#endif
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642
PSNee_V8/PSNee_V8/MUC.h
Normal file
642
PSNee_V8/PSNee_V8/MUC.h
Normal file
@ -0,0 +1,642 @@
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//Configuring the clock speed and associated registers. F_CPU / (TCCR0B |= (1<<CS00) *(OCR0A = 159 +1) = 16000000 /(0 * (160)) = 100KHz
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#pragma once
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#ifdef ATmega328_168
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#define F_CPU 16000000L
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#define TIMER_TCNT_CLEAR TCNT0 = 0x00 //TCNT0 - Timer/Counter Register
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#define SET_OCROA_DIV OCR0A = 159; //OCR0A – Output Compare Register A, 0x10011111, 100KHz
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#define SET_TIMER_TCCROA TCCR0A |= (1 << WGM01); //TCCR0A – Timer/Counter Control Register A. turn on CTC mode, WGM01
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#define SET_TIMER_TCCROB TCCR0B |= (1 << CS00); //TCCR0B – Timer/Counter Control Register B, CS00: Clock Select, clk I/O
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//Waveform Generation Mode, Mode 2 CTC
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#define CTC_TIMER_VECTOR TIMER0_COMPA_vect //interrupt vector for match event, OCR0A comparison and Timer/Counter 0
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#include <stdint.h>
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#include <stdbool.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/sfr_defs.h>
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#include <util/delay.h>
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// Globale interrupt seting
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#define GLOBAL_INTERRUPT_ENABLE SREG |= (1<<7)
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#define GLOBAL_INTERRUPT_DISABLE SREG &= ~(1<<7)
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// Handling the main pins
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// Main pins input
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#define PIN_DATA_INPUT DDRB &= ~(1<<DDB0)
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#define PIN_WFCK_INPUT DDRB &= ~(1<<DDB1) // Create a mask (1<<0) with the first bit at 1 b00000001 uses the ~ operator to perform a bit inversion b11111110,
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#define PIN_SQCK_INPUT DDRD &= ~(1<<DDD6) // &= updates the DDRB register with the AND operator and the mask, DDRB bxxxxxxxx OR mask b11111110 = bxxxxxxx0
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#define PIN_SUBQ_INPUT DDRD &= ~(1<<DDD7)
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// Main pin output
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#define PIN_DATA_OUTPUT DDRB |= (1<<DDB0) // Create a mask (1<<0) with the first bit at 1 b00000001,
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#define PIN_WFCK_OUTPUT DDRB |= (1<<DDB1) // |= updates the DDRB register with the OR operator and the mask, DDRB bxxxxxxxx OR mask b00000001 = bxxxxxxx1
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// Define pull-ups and set high at the main pin
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#define PIN_DATA_SET PORTB |= (1<<PB0) // Create a mask (1<<0) with the first bit at 1 b00000001,
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// |= updates the PORTB register with the OR operator and the mask, PORTB bxxxxxxxx OR mask b00000001 = bxxxxxxx1
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// Define pull-ups set down at the main pin
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#define PIN_DATA_CLEAR PORTB &= ~(1<<PB0) // Create a mask (1<<0) with the first bit at 1 b00000001 uses the ~ operator to perform a bit inversion b11111110,
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#define PIN_WFCK_CLEAR PORTB &= ~(1<<PB1) // &= updates the DDRB register with the AND operator and the mask, DDRB bxxxxxxxx OR mask b11111110 = bxxxxxxx0
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// Read the main pins
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#define PIN_SQCK_READ (PIND & (1<<PIND6)) // Create a mask (1<<6) with the six bit at 1 b00100000,
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#define PIN_SUBQ_READ (PIND & (1<<PIND7)) // compare the PINB register and the mask with the AND operator, and returns the result, PINB bxx1xxxxx AND mask b00100000 = 1
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#define PIN_WFCK_READ (PINB & (1<<PINB1))
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// Handling and use of the LED pin
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#define LED_RUN
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#define PIN_LED_OUTPUT DDRB |= (1<<DDB5)
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#define PIN_LED_ON PORTB |= (1<<PB5)
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#define PIN_LED_OFF PORTB &= ~(1<<PB5)
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// Handling the BIOS patch
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// BIOS interrupt seting
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#define TIMER_INTERRUPT_ENABLE TIMSK0 |= (1<<OCIE0A)
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#define TIMER_INTERRUPT_DISABLE TIMSK0 &= ~(1<<OCIE0A)
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// BIOS timer clear
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#define TIMER_TIFR_CLEAR TIFR0 |= (1<<OCF0A)
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// Pins input
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#define PIN_AX_INPUT DDRD &= ~(1<<DDD2)
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#define PIN_AY_INPUT DDRD &= ~(1<<DDD3)
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#define PIN_DX_INPUT DDRD &= ~(1<<DDD4)
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// Pin output
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#define PIN_DX_OUTPUT DDRD |= (1<<DDD4)
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// Define pull-ups set high
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#define PIN_DX_SET PORTD |= (1<<PD4)
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// Define pull-ups set down
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#define PIN_DX_CLEAR PORTD &= ~(1<<PD4)
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// Read pins for BIOS patch
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#define PIN_AX_READ (PIND & (1<<PIND2))
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#define PIN_AY_READ (PIND & (1<<PIND3))
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// Handling the external interrupt
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#define PIN_AX_INTERRUPT_ENABLE EIMSK |= (1<<INT0)
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#define PIN_AY_INTERRUPT_ENABLE EIMSK |= (1<<INT1)
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#define PIN_AX_INTERRUPT_DISABLE EIMSK &= ~(1<<INT0)
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#define PIN_AY_INTERRUPT_DISABLE EIMSK &= ~(1<<INT1)
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#define PIN_AX_INTERRUPT_RISING EICRA |= (1<<ISC01)|(1<<ISC00)
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#define PIN_AY_INTERRUPT_RISING EICRA |= (1<<ISC11)|(1<<ISC10)
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#define PIN_AX_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC00)) | (1<<ISC01))
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#define PIN_AY_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC10)) | (1<<ISC11))
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#define PIN_AX_INTERRUPT_VECTOR INT0_vect
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#define PIN_AY_INTERRUPT_VECTOR INT1_vect
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// Handling and reading the switch pin for patch BIOS
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#define PIN_SWITCH_INPUT DDRD &= ~(1<<DDD5)
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#define PIN_SWITCH_SET PORTD |= (1<<PD5)
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#define PIN_SWICHE_READ (PIND & (1<<PIND5))
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#endif
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#ifdef LGT8F328P
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#define F_CPU 32000000L
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#define TIMER_TCNT_CLEAR TCNT0 = 0x00
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#define SET_OCROA_DIV OCR0A = 319;
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#define SET_TIMER_TCCROA TCCR0A |= (1 << WGM01);
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#define SET_TIMER_TCCROB TCCR0B |= (1 << CS00);
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#define CTC_TIMER_VECTOR TIMER0_COMPA_vect //??
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#include <stdint.h>
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#include <stdbool.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/sfr_defs.h>
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#include <util/delay.h>
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// Globale interrupt seting
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#define GLOBAL_INTERRUPT_ENABLE SREG |= (1<<7)
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#define GLOBAL_INTERRUPT_DISABLE SREG &= ~(1<<7)
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// Handling the main pins
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// Main pins input
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#define PIN_DATA_INPUT DDRB &= ~(1<<DDB0)
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#define PIN_WFCK_INPUT DDRB &= ~(1<<DDB1)
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#define PIN_SQCK_INPUT DDRD &= ~(1<<DDD6)
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#define PIN_SUBQ_INPUT DDRD &= ~(1<<DDD7)
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// Main pin output
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#define PIN_DATA_OUTPUT DDRB |= (1<<DDB0)
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#define PIN_WFCK_OUTPUT DDRB |= (1<<DDB1)
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// Define pull-ups and set high at the main pin
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#define PIN_DATA_SET PORTB |= (1<<PB0)
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// Define pull-ups set down at the main pin
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#define PIN_DATA_CLEAR PORTB &= ~(1<<PB0)
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#define PIN_WFCK_CLEAR PORTB &= ~(1<<PB1)
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// Read the main pins
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#define PIN_SQCK_READ (PIND & (1<<PIND6))
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#define PIN_SUBQ_READ (PIND & (1<<PIND7))
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#define PIN_WFCK_READ (PINB & (1<<PINB1))
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// Handling and use of the LED pin
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#define LED_RUN
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#define PIN_LED_OUTPUT DDRB |= (1<<DDB5)
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#define PIN_LED_ON PORTB |= (1<<PB5)
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#define PIN_LED_OFF PORTB &= ~(1<<PB5)
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// Handling the BIOS patch
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// BIOS interrupt seting
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#define TIMER_INTERRUPT_ENABLE TIMSK0 |= (1<<OCIE0A)
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#define TIMER_INTERRUPT_DISABLE TIMSK0 &= ~(1<<OCIE0A)
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// BIOS timer clear
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#define TIMER_TIFR_CLEAR TIFR0 |= (1<<OCF0A)
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// Pins input
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#define PIN_AX_INPUT DDRD &= ~(1<<DDD2)
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#define PIN_AY_INPUT DDRD &= ~(1<<DDD3)
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#define PIN_DX_INPUT DDRD &= ~(1<<DDD4)
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// Pin output
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#define PIN_DX_OUTPUT DDRD |= (1<<DDD4)
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// Define pull-ups set high
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#define PIN_DX_SET PORTD |= (1<<PD4)
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// Define pull-ups set down
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#define PIN_DX_CLEAR PORTD &= ~(1<<PD4)
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// Read pins for BIOS patch
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#define PIN_AX_READ (PIND & (1<<PIND2))
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#define PIN_AY_READ (PIND & (1<<PIND3))
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// Handling the external interrupt
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#define PIN_AX_INTERRUPT_ENABLE EIMSK |= (1<<INT0)
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#define PIN_AY_INTERRUPT_ENABLE EIMSK |= (1<<INT1)
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#define PIN_AX_INTERRUPT_DISABLE EIMSK &= ~(1<<INT0)
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#define PIN_AY_INTERRUPT_DISABLE EIMSK &= ~(1<<INT1)
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#define PIN_AX_INTERRUPT_RISING EICRA |= (1<<ISC01)|(1<<ISC00)
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#define PIN_AY_INTERRUPT_RISING EICRA |= (1<<ISC11)|(1<<ISC10)
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#define PIN_AX_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC00)) | (1<<ISC01))
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#define PIN_AY_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC10)) | (1<<ISC11))
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#define PIN_AX_INTERRUPT_VECTOR INT0_vect
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#define PIN_AY_INTERRUPT_VECTOR INT1_vect
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// Handling and reading the switch pin for patch BIOS
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#define PIN_SWITCH_INPUT DDRD &= ~(1<<DDD5)
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#define PIN_SWITCH_SET PORTD |= (1<<PD5)
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#define PIN_SWICHE_READ (PIND & (1<<PIND5))
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#endif
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#ifdef ATmega32U4_16U4
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#define F_CPU 16000000L
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#define TIMER_TCNT_CLEAR TCNT0 = 0x00;
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#define SET_OCROA_DIV OCR0A = 159;
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#define SET_TIMER_TCCROA TCCR0A |= (1 << WGM01);
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#define SET_TIMER_TCCROB TCCR0B |= (1 << CS00);
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#define CTC_TIMER_VECTOR TIMER0_COMPA_vect
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#include <stdint.h>
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#include <stdbool.h>
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#include <avr/io.h>
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#include <avr/interrupt.h>
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#include <avr/sfr_defs.h>
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#include <util/delay.h>
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// Globale interrupt seting
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#define GLOBAL_INTERRUPT_ENABLE SREG |= (1<<7)
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#define GLOBAL_INTERRUPT_DISABLE SREG &= ~(1<<7)
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#define TIMER_INTERRUPT_ENABLE TIMSK0 |= (1<<OCIE0A)
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#define TIMER_INTERRUPT_DISABLE TIMSK0 &= ~(1<<OCIE0A)
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// Handling the main pins
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// Main pins
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#define PIN_DATA_INPUT DDRB &= ~(1<<DDB4)
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#define PIN_WFCK_INPUT DDRB &= ~(1<<DDB5)
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#define PIN_SQCK_INPUT DDRD &= ~(1<<DDD7)
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#define PIN_SUBQ_INPUT DDRE &= ~(1<<DDE6)
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#define PIN_DATA_OUTPUT DDRB |= (1<<DDB4)
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#define PIN_WFCK_OUTPUT DDRB |= (1<<DDB5)
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// Define pull-ups and set high at the main pin
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#define PIN_DATA_SET PORTB |= (1<<PB4)
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// Define pull-ups set down at the main pin
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#define PIN_DATA_CLEAR PORTB &= ~(1<<PB4)
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#define PIN_WFCK_CLEAR PORTB &= ~(1<<PB5)
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// Read the main pins
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#define PIN_SQCK_READ (PIND & (1<<PIND7))
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#define PIN_SUBQ_READ (PINE & (1<<PINE6))
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#define PIN_WFCK_READ (PINB & (1<<PINB5))
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// Handling and use of the LED pin
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#define LED_RUN
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#define PIN_LED_OUTPUT DDRB |= (1<<DDB6)
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#define PIN_LED_ON PORTB |= (1<<PB6)
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#define PIN_LED_OFF PORTB &= ~(1<<PB6)
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// Handling the BIOS patch
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// Pins input
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#define PIN_AX_INPUT DDRD &= ~(1<<DDD1)
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#define PIN_AY_INPUT DDRD &= ~(1<<DDD0)
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#define PIN_DX_INPUT DDRD &= ~(1<<DDD4)
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// Pin output
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#define PIN_DX_OUTPUT DDRD |= (1<<DDD4)
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// Define pull-ups set high
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#define PIN_DX_SET PORTD |= (1<<PD4)
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// Define pull-ups set down
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#define PIN_DX_CLEAR PORTD &= ~(1<<PD4)
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// Read pins for BIOS patch
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#define PIN_AX_READ (PIND & (1<<PIND1))
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#define PIN_AY_READ (PIND & (1<<PIND0))
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// Handling and reading the switch pin for patch BIOS
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#define PIN_SWITCH_INPUT DDRC &= ~(1<<DDC6)
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#define PIN_SWITCH_SET PORTC |= (1<<PC6)
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#define PIN_SWICHE_READ (PINC & (1<<PINC6))
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// BIOS timer clear
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#define TIMER_TCNT_CLEAR TCNT0 = 0x00
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#define TIMER_TIFR_CLEAR TIFR0 |= (1<<OCF0A)
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// Handling the external interrupt
|
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#define PIN_AX_INTERRUPT_ENABLE EIMSK |= (1<<INT1)
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#define PIN_AY_INTERRUPT_ENABLE EIMSK |= (1<<INT0)
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#define PIN_AX_INTERRUPT_DISABLE EIMSK &= ~(1<<INT1)
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#define PIN_AY_INTERRUPT_DISABLE EIMSK &= ~(1<<INT0)
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#define PIN_AX_INTERRUPT_RISING EICRA |= (1<<ISC11)|(1<<ISC10)
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#define PIN_AY_INTERRUPT_RISING EICRA |= (1<<ISC01)|(1<<ISC00)
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#define PIN_AX_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC10)) | (1<<ISC11))
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#define PIN_AY_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC00)) | (1<<ISC01))
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#define PIN_AX_INTERRUPT_VECTOR INT1_vect
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#define PIN_AY_INTERRUPT_VECTOR INT0_vect
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#endif
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#ifdef ATtiny85_45_25
|
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#define DF_CPU 8000000L
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#define TIMER_TCNT_CLEAR TCNT0 = 0x00;
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#define SET_OCROA_DIV OCR0A = 79; //OCR0A – Output Compare Register A,100KHz
|
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#define SET_TIMER_TCCROA TCCR0A |= (1 << WGM01);
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#define SET_TIMER_TCCROB TCCR0B |= (1 << CS00);
|
||||
#define CTC_TIMER_VECTOR TIMER0_COMPA_vect
|
||||
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
#include <avr/sfr_defs.h>
|
||||
#include <util/delay.h>
|
||||
|
||||
// Globale interrupt seting
|
||||
#define GLOBAL_INTERRUPT_ENABLE SREG |= (1<<7)
|
||||
#define GLOBAL_INTERRUPT_DISABLE SREG &= ~(1<<7)
|
||||
|
||||
// Handling the main pins
|
||||
|
||||
// Main pins input
|
||||
#define PIN_DATA_INPUT DDRB &= ~(1<<DDB2)
|
||||
#define PIN_WFCK_INPUT DDRB &= ~(1<<DDB4)
|
||||
#define PIN_SQCK_INPUT DDRB &= ~(1<<DDB0)
|
||||
#define PIN_SUBQ_INPUT DDRB &= ~(1<<DDB1)
|
||||
|
||||
// Main pin output
|
||||
#define PIN_DATA_OUTPUT DDRB |= (1<<DDB2)
|
||||
#define PIN_WFCK_OUTPUT DDRB |= (1<<DDB4)
|
||||
|
||||
// Define pull-ups and set high at the main pin
|
||||
#define PIN_DATA_SET PORTB |= (1<<PB2)
|
||||
|
||||
// Define pull-ups set down at the main pin
|
||||
#define PIN_DATA_CLEAR PORTB &= ~(1<<PB2)
|
||||
#define PIN_WFCK_CLEAR PORTB &= ~(1<<PB4)
|
||||
|
||||
// Read the main pins
|
||||
#define PIN_SQCK_READ (PINB & (1<<PINB0))
|
||||
#define PIN_SUBQ_READ (PINB & (1<<PINB1))
|
||||
#define PIN_WFCK_READ (PINB & (1<<PINB4))
|
||||
|
||||
#defintu conais les attiny 414e TIMER_INTERRUPT_ENABLE TIMSK |= (1<<OCIE0A)
|
||||
#define TIMER_INTERRUPT_DISABLE TIMSK &= ~(1<<OCIE0A)
|
||||
|
||||
#if !defined(SCPH_xxx1) && !defined(SCPH_xxx2) && !defined(SCPH_103)
|
||||
#error "ATtiny85_45_25 Not compatible with BIOS patch, please choose a compatible SCPH. For example: SCPH_xxx1: SCPH_xxx2: SCPH_103"
|
||||
#endif
|
||||
|
||||
#ifdef ATtiny88_48
|
||||
|
||||
#define F_CPU 16000000L
|
||||
#define TIMER_TCNT_CLEAR TCNT0 = 0x00 //TCNT0 - Timer/Counter Register
|
||||
#define SET_OCROA_DIV OCR0A = 159; //OCR0A – Output Compare Register A, 0x10011111, 100KHz
|
||||
#define SET_TIMER_TCCROA TCCR0A |= (1 << CTC0 ); //TCCR0A – Timer/Counter Control Register A. turn on CTC mode, CTC0
|
||||
#define SET_TIMER_TCCROB TCCR0A |= (1 << CS00); //TCCR0B – Timer/Counter Control Register B, CS00: Clock Select, clk I/O
|
||||
//Waveform Generation Mode, Mode 2 CTC
|
||||
#define CTC_TIMER_VECTOR TIMER0_COMPA_vect //interrupt vector for match event, OCR0A comparison and Timer/Counter 0
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
#include <avr/sfr_defs.h>
|
||||
#include <util/delay.h>
|
||||
|
||||
// Globale interrupt seting
|
||||
#define GLOBAL_INTERRUPT_ENABLE SREG |= (1<<7)
|
||||
#define GLOBAL_INTERRUPT_DISABLE SREG &= ~(1<<7)
|
||||
|
||||
// Handling the main pins
|
||||
|
||||
// Main pins input
|
||||
#define PIN_DATA_INPUT DDRB &= ~(1<<DDB0)
|
||||
#define PIN_WFCK_INPUT DDRB &= ~(1<<DDB1) // Create a mask (1<<0) with the first bit at 1 b00000001 uses the ~ operator to perform a bit inversion b11111110,
|
||||
#define PIN_SQCK_INPUT DDRD &= ~(1<<DDD6) // &= updates the DDRB register with the AND operator and the mask, DDRB bxxxxxxxx OR mask b11111110 = bxxxxxxx0
|
||||
#define PIN_SUBQ_INPUT DDRD &= ~(1<<DDD7)
|
||||
|
||||
// Main pin output
|
||||
#define PIN_DATA_OUTPUT DDRB |= (1<<DDB0) // Create a mask (1<<0) with the first bit at 1 b00000001,
|
||||
#define PIN_WFCK_OUTPUT DDRB |= (1<<DDB1) // |= updates the DDRB register with the OR operator and the mask, DDRB bxxxxxxxx OR mask b00000001 = bxxxxxxx1
|
||||
|
||||
// Define pull-ups and set high at the main pin
|
||||
#define PIN_DATA_SET PORTB |= (1<<PB0) // Create a mask (1<<0) with the first bit at 1 b00000001,
|
||||
// |= updates the PORTB register with the OR operator and the mask, PORTB bxxxxxxxx OR mask b00000001 = bxxxxxxx1
|
||||
|
||||
// Define pull-ups set down at the main pin
|
||||
#define PIN_DATA_CLEAR PORTB &= ~(1<<PB0) // Create a mask (1<<0) with the first bit at 1 b00000001 uses the ~ operator to perform a bit inversion b11111110,
|
||||
#define PIN_WFCK_CLEAR PORTB &= ~(1<<PB1) // &= updates the DDRB register with the AND operator and the mask, DDRB bxxxxxxxx OR mask b11111110 = bxxxxxxx0
|
||||
|
||||
// Read the main pins
|
||||
#define PIN_SQCK_READ (PIND & (1<<PIND6)) // Create a mask (1<<6) with the six bit at 1 b00100000,
|
||||
#define PIN_SUBQ_READ (PIND & (1<<PIND7)) // compare the PINB register and the mask with the AND operator, and returns the result, PINB bxx1xxxxx AND mask b00100000 = 1
|
||||
#define PIN_WFCK_READ (PINB & (1<<PINB1))
|
||||
|
||||
// Handling and use of the LED pin
|
||||
//#define LED_RUN
|
||||
//#define PIN_LED_OUTPUT DDRB |= (1<<DDB5)
|
||||
//#define PIN_LED_ON PORTB |= (1<<PB5)
|
||||
//#define PIN_LED_OFF PORTB &= ~(1<<PB5)
|
||||
|
||||
// Handling the BIOS patch
|
||||
|
||||
// BIOS interrupt seting
|
||||
#define TIMER_INTERRUPT_ENABLE TIMSK0 |= (1<<OCIE0A)
|
||||
#define TIMER_INTERRUPT_DISABLE TIMSK0 &= ~(1<<OCIE0A)
|
||||
|
||||
// BIOS timer clear
|
||||
#define TIMER_TIFR_CLEAR TIFR0 |= (1<<OCF0A)
|
||||
|
||||
// Pins input
|
||||
#define PIN_AX_INPUT DDRD &= ~(1<<DDD2)
|
||||
#define PIN_AY_INPUT DDRD &= ~(1<<DDD3)
|
||||
#define PIN_DX_INPUT DDRD &= ~(1<<DDD4)
|
||||
// Pin output
|
||||
#define PIN_DX_OUTPUT DDRD |= (1<<DDD4)
|
||||
// Define pull-ups set high
|
||||
#define PIN_DX_SET PORTD |= (1<<PD4)
|
||||
// Define pull-ups set down
|
||||
#define PIN_DX_CLEAR PORTD &= ~(1<<PD4)
|
||||
// Read pins for BIOS patch
|
||||
#define PIN_AX_READ (PIND & (1<<PIND2))
|
||||
#define PIN_AY_READ (PIND & (1<<PIND3))
|
||||
|
||||
// Handling the external interrupt
|
||||
#define PIN_AX_INTERRUPT_ENABLE EIMSK |= (1<<INT0)
|
||||
#define PIN_AY_INTERRUPT_ENABLE EIMSK |= (1<<INT1)
|
||||
|
||||
#define PIN_AX_INTERRUPT_DISABLE EIMSK &= ~(1<<INT0)
|
||||
#define PIN_AY_INTERRUPT_DISABLE EIMSK &= ~(1<<INT1)
|
||||
|
||||
#define PIN_AX_INTERRUPT_RISING EICRA |= (1<<ISC01)|(1<<ISC00)
|
||||
#define PIN_AY_INTERRUPT_RISING EICRA |= (1<<ISC11)|(1<<ISC10)
|
||||
|
||||
#define PIN_AX_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC00)) | (1<<ISC01))
|
||||
#define PIN_AY_INTERRUPT_FALLING (EICRA = (EICRA & ~(1<<ISC10)) | (1<<ISC11))
|
||||
|
||||
#define PIN_AX_INTERRUPT_VECTOR INT0_vect
|
||||
#define PIN_AY_INTERRUPT_VECTOR INT1_vect
|
||||
|
||||
// Handling and reading the switch pin for patch BIOS
|
||||
#define PIN_SWITCH_INPUT DDRD &= ~(1<<DDD5)
|
||||
#define PIN_SWITCH_SET PORTD |= (1<<PD5)
|
||||
#define PIN_SWICHE_READ (PIND & (1<<PIND5))
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef ATtiny214_414
|
||||
|
||||
|
||||
|
||||
//#define SET_CTRLA
|
||||
//#define F_CPU 16000000L
|
||||
#define TIMER_TCNT_CLEAR TCA0.SINGLE.CNT = 0x00 //TCNT0 - Timer/Counter Register
|
||||
#define SET_OCROA_DIV TCA0.SINGLE.CMP0L = 159; //OCR0A – Output Compare Register A, 0x10011111, 100KHz
|
||||
#define SET_TIMER_TCCROA TCA0.SINGLE.CTRLB |= TCA_SINGLE_WGMODE_FRQ_gc //TCCR0A – Timer/Counter Control Register A. turn on CTC mode, CTC0
|
||||
#define SET_TIMER_TCCROB TCA0.SINGLE.CTRLA |= TCA_SINGLE_CLKSEL_DIV1_gc//TCCR0B – Timer/Counter Control Register B, CS00: Clock Select, clk I/O
|
||||
//Waveform Generation Mode, Mode 2 CTC
|
||||
#define CTC_TIMER_VECTOR TCA0_CMP0_vect //interrupt vector for match event, OCR0A comparison and Timer/Counter 0
|
||||
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
#include <avr/sfr_defs.h>
|
||||
#include <util/delay.h>
|
||||
|
||||
// Globale interrupt seting
|
||||
#define GLOBAL_INTERRUPT_ENABLE CPU.SREG |= (1<<7)
|
||||
#define GLOBAL_INTERRUPT_DISABLE CPU.SREG &= ~(1<<7)
|
||||
|
||||
// Handling the main pins
|
||||
|
||||
// Main pins input
|
||||
#define PIN_DATA_INPUT PORTA.DIR = PIN2_bm
|
||||
#define PIN_WFCK_INPUT PORTA.DIR = PIN1_bm // Create a mask (1<<0) with the first bit at 1 b00000001 uses the ~ operator to perform a bit inversion b11111110,
|
||||
#define PIN_SQCK_INPUT PORTA.DIR = PIN4_bm // &= updates the DDRB register with the AND operator and the mask, DDRB bxxxxxxxx OR mask b11111110 = bxxxxxxx0
|
||||
#define PIN_SUBQ_INPUT PORTA.DIR = PIN3_bm
|
||||
|
||||
// Main pin output
|
||||
#define PIN_DATA_OUTPUT PORTA.DIR |= PIN2_bm // Create a mask (1<<0) with the first bit at 1 b00000001,
|
||||
#define PIN_WFCK_OUTPUT PORTA.DIR |= PIN1_bm // |= updates the DDRB register with the OR operator and the mask, DDRB bxxxxxxxx OR mask b00000001 = bxxxxxxx1
|
||||
|
||||
// Define pull-ups and set high at the main pin
|
||||
#define PIN_DATA_SET PORTA.OUT |= PIN2_bm // Create a mask (1<<0) with the first bit at 1 b00000001,
|
||||
// |= updates the PORTB register with the OR operator and the mask, PORTB bxxxxxxxx OR mask b00000001 = bxxxxxxx1
|
||||
|
||||
// Define pull-ups set down at the main pin
|
||||
#define PIN_DATA_CLEAR PORTA.OUT &= ~PIN2_bm // Create a mask (1<<0) with the first bit at 1 b00000001 uses the ~ operator to perform a bit inversion b11111110,
|
||||
#define PIN_WFCK_CLEAR PORTA.OUT &= ~PIN1_bm // &= updates the DDRB register with the AND operator and the mask, DDRB bxxxxxxxx OR mask b11111110 = bxxxxxxx0
|
||||
|
||||
// Read the main pins
|
||||
#define PIN_SQCK_READ PORTA.IN & PIN4_bm // Create a mask (1<<6) with the six bit at 1 b00100000,
|
||||
#define PIN_SUBQ_READ PORTA.IN & PIN3_bm // compare the PINB register and the mask with the AND operator, and returns the result, PINB bxx1xxxxx AND mask b00100000 = 1
|
||||
#define PIN_WFCK_READ PORTA.IN & PIN1_bm
|
||||
|
||||
// Handling and use of the LED pin
|
||||
#define LED_RUN
|
||||
#define PIN_LED_OUTPUT PORTB.DIR |= PIN2_bm
|
||||
#define PIN_LED_ON PORTB.OUT |= PIN2_bm
|
||||
#define PIN_LED_OFF PORTB.OUT &= ~PIN2_bm
|
||||
|
||||
// Handling the BIOS patch
|
||||
|
||||
// BIOS interrupt seting
|
||||
#define TIMER_INTERRUPT_ENABLE TCA0.SPLIT.INTCTRL |= TCA_SINGLE_CMP0_bm
|
||||
#define TIMER_INTERRUPT_DISABLE TCA0.SPLIT.INTCTRL &= ~TCA_SPLIT_HCMP0_bm
|
||||
|
||||
// BIOS timer clear
|
||||
#define TIMER_TIFR_CLEAR TCA0.SPLIT.INTFLAGS = TCA_SPLIT_HCMP0_bm
|
||||
|
||||
// Pins input
|
||||
#define PIN_AX_INPUT PORTB.DIR &= ~PIN3_bm
|
||||
#define PIN_AY_INPUT PORTA.DIR &= ~PIN7_bm
|
||||
#define PIN_DX_INPUT PORTA.DIR &= ~PIN6_bm
|
||||
// Pin output
|
||||
#define PIN_DX_OUTPUT PORTA.DIR |= PIN6_bm
|
||||
// Define pull-ups set high
|
||||
#define PIN_DX_SET PORTA.OUT |= PIN6_bm
|
||||
// Define pull-ups set down
|
||||
#define PIN_DX_CLEAR PORTA.OUT &= ~PIN6_bm
|
||||
// Read pins for BIOS patch
|
||||
#define PIN_AX_READ PORTB.IN & PIN3_bm
|
||||
#define PIN_AY_READ PORTA.IN & PIN6_bm
|
||||
|
||||
// Handling the external interrupt
|
||||
//#define PIN_AX_INTERRUPT_ENABLE PORTB.PIN3CTRL |= (1<<INTn)
|
||||
//#define PIN_AY_INTERRUPT_ENABLE PORTA.PIN7CTRL |= (1<<INTn)
|
||||
|
||||
#define PIN_AX_INTERRUPT_DISABLE PORTB.PIN3CTRL = PORT_ISC_INTDISABLE_gc
|
||||
#define PIN_AY_INTERRUPT_DISABLE PORTA.PIN7CTRL = PORT_ISC_INTDISABLE_gc
|
||||
|
||||
#define PIN_AX_INTERRUPT_RISING PORTB.PIN3CTRL = PORT_ISC_RISING_gc
|
||||
#define PIN_AY_INTERRUPT_RISING PORTA.PIN7CTRL = PORT_ISC_RISING_gc
|
||||
|
||||
#define PIN_AX_INTERRUPT_FALLING PORTB.PIN3CTRL = PORT_ISC_FALLING_gc
|
||||
#define PIN_AY_INTERRUPT_FALLING PORTA.PIN7CTRL = PORT_ISC_FALLING_gc
|
||||
|
||||
//#define PB3_INTERRUPT PORTB.INTFLAGS & PIN3_bm
|
||||
//#define PA7_INTERRUPT PORTB.INTFLAGS & PIN7_bm
|
||||
|
||||
#define PIN_AX_INTERRUPT_VECTOR PORTB_PORT_vect
|
||||
#define PIN_AY_INTERRUPT_VECTOR PORTA_PORT_vect
|
||||
|
||||
// Handling and reading the switch pin for patch BIOS
|
||||
#define PIN_SWITCH_INPUT PORTA.DIR &= ~PIN5_bm
|
||||
#define PIN_SWITCH_SET PORTA.OUT |= PIN5_bm
|
||||
#define PIN_SWICHE_READ PORTA.IN & PIN5_bm
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
#ifdef CH32V003
|
||||
|
||||
#include "ch32v003.h" // Inclure le fichier d'en-tête spécifique au microcontrôleur
|
||||
#include <stdint.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
// Fréquence d'horloge
|
||||
#define F_CPU 8000000L
|
||||
|
||||
// Configuration du timer pour une fréquence de 100 kHz
|
||||
#define TIMER_TCNT_CLEAR TIM2_CNT = 0x00 // ok Effacer le compteur du Timer 2
|
||||
#define SET_OCROA_DIV TIM2_ARR = 79 // not Définir la valeur de comparaison pour générer une interruption à 100 kHz
|
||||
#define SET_TIMER_TCCROA TIM2_CR1 |= TIM_CR1_OPM // notMettre le Timer en mode One Pulse (à adapter selon le mode souhaité)
|
||||
#define SET_TIMER_TCCROB TIM2_PSC = 0 // ok Définir le prescaler à 0 pour une fréquence maximale
|
||||
|
||||
// Vecteur d'interruption pour le Timer 2
|
||||
#define CTC_TIMER_VECTOR TIM2_UP_IRQHandler // Remplacer par le vecteur d'interruption approprié
|
||||
|
||||
// Interruption globale
|
||||
#define GLOBAL_INTERRUPT_ENABLE __enable_irq()
|
||||
#define GLOBAL_INTERRUPT_DISABLE __disable_irq()
|
||||
|
||||
// Configuration des broches GPIO
|
||||
#define PIN_DATA_INPUT GPIOA->INDR &= ~(GPIO_MODER_MODER0)
|
||||
#define PIN_WFCK_INPUT GPIOA->INDR &= ~(GPIO_MODER_MODER1)
|
||||
#define PIN_SQCK_INPUT GPIOA->INDR &= ~(GPIO_MODER_MODER6)
|
||||
#define PIN_SUBQ_INPUT GPIOA->INDR &= ~(GPIO_MODER_MODER7)
|
||||
|
||||
#define PIN_DATA_OUTPUT GPIOA->OUTDR |= (GPIO_MODER_MODER0_0)
|
||||
#define PIN_WFCK_OUTPUT GPIOA->OUTDR |= (GPIO_MODER_MODER1_0)
|
||||
|
||||
#define PIN_DATA_SET GPIOA->BSHR |= (GPIO_ODR_ODR_0)
|
||||
|
||||
#define PIN_DATA_CLEAR GPIOA->BRC &= ~(GPIO_ODR_ODR_0)
|
||||
#define PIN_WFCK_CLEAR GPIOA->BRC &= ~(GPIO_ODR_ODR_1)
|
||||
|
||||
#define PIN_SQCK_READ (GPIOA->IDR & (GPIO_IDR_IDR_6))
|
||||
#define PIN_SUBQ_READ (GPIOA->IDR & (GPIO_IDR_IDR_7))
|
||||
#define PIN_WFCK_READ (GPIOA->IDR & (GPIO_IDR_IDR_1))
|
||||
|
||||
// Gestion de la broche LED
|
||||
#define PIN_LED_OUTPUT GPIOA->MODER |= (GPIO_MODER_MODER5_0)
|
||||
#define PIN_LED_ON GPIOA->ODR |= (GPIO_ODR_ODR_5)
|
||||
#define PIN_LED_OFF GPIOA->ODR &= ~(GPIO_ODR_ODR_5)
|
||||
|
||||
// Gestion des interruptions du timer
|
||||
#define TIMER_INTERRUPT_ENABLE TIM2_DIER |= (TIM_DIER_UIE)
|
||||
#define TIMER_INTERRUPT_DISABLE TIM2_DIER &= ~(TIM_DIER_UIE)
|
||||
#define TIMER_TIFR_CLEAR TIM2_SR &= ~(TIM_SR_UIF)
|
||||
|
||||
// Configuration des broches pour le BIOS
|
||||
#define PIN_AX_INPUT GPIOA->MODER &= ~(GPIO_MODER_MODER2) AFIO_EXTICR
|
||||
#define PIN_AY_INPUT GPIOA->MODER &= ~(GPIO_MODER_MODER3)
|
||||
#define PIN_DX_INPUT GPIOA->MODER &= ~(GPIO_MODER_MODER4)
|
||||
|
||||
#define PIN_DX_OUTPUT GPIOA->MODER |= (GPIO_MODER_MODER4_0)
|
||||
|
||||
#define PIN_DX_SET GPIOA->ODR |= (GPIO_ODR_ODR_4)
|
||||
|
||||
#define PIN_DX_CLEAR GPIOA->ODR &= ~(GPIO_ODR_ODR_4)
|
||||
|
||||
#define PIN_AX_READ (GPIOA->IDR & (GPIO_IDR_IDR_2))
|
||||
#define PIN_AY_READ (GPIOA->IDR & (GPIO_IDR_IDR_3))
|
||||
|
||||
// Gestion des interruptions externes
|
||||
#define PIN_AX_INTERRUPT_ENABLE EXTI->IMR |= (EXTI_IMR_MR0) //1<<EXTI_INTENR_MR0
|
||||
#define PIN_AY_INTERRUPT_ENABLE EXTI->IMR |= (EXTI_IMR_MR1)
|
||||
|
||||
#define PIN_AX_INTERRUPT_DISABLE EXTI->IMR &= ~(EXTI_IMR_MR0) //EXTI_INTENR
|
||||
#define PIN_AY_INTERRUPT_DISABLE EXTI->IMR &= ~(EXTI_IMR_MR1)
|
||||
|
||||
#define PIN_AX_INTERRUPT_RISING EXTI->RTSR |= (EXTI_RTSR_TR0) //EXTI_RTENR
|
||||
#define PIN_AY_INTERRUPT_RISING EXTI->RTSR |= (EXTI_RTSR_TR1)
|
||||
|
||||
#define PIN_AX_INTERRUPT_FALLING EXTI->FTSR |= (EXTI_FTENR_MR0) //EXTI_FTENR
|
||||
#define PIN_AY_INTERRUPT_FALLING EXTI->FTSR |= (EXTI_FTENR_MR1)
|
||||
|
||||
#define PIN_AX_INTERRUPT_VECTOR EXTI0_IRQHandler
|
||||
#define PIN_AY_INTERRUPT_VECTOR EXTI1_IRQHandler
|
||||
|
||||
// Gestion de la broche de commutation pour le BIOS
|
||||
#define PIN_SWITCH_INPUT GPIOA->MODER &= ~(GPIO_MODER_MODER5)
|
||||
#define PIN_SWITCH_SET GPIOA->ODR |= (GPIO_ODR_ODR_5)
|
||||
#define PIN_SWICHE_READ (GPIOA->IDR & (GPIO_IDR_IDR_5))
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
372
PSNee_V8/PSNee_V8/PSNee_V8.ino
Normal file
372
PSNee_V8/PSNee_V8/PSNee_V8.ino
Normal file
@ -0,0 +1,372 @@
|
||||
//------------------------------------------------------------------------------------------------
|
||||
// Select your chip
|
||||
//------------------------------------------------------------------------------------------------
|
||||
|
||||
//#define ATmega328_168 // Fuses: JAP_FAT - H: DF, L: EE, E: FF; Other - H: DF, L: FF, E: FF.
|
||||
//#define ATmega32U4_16U4
|
||||
//#define ATtiny85_45_25
|
||||
|
||||
/* PinVCC-3.5v, PinGND-GND,
|
||||
Pin2-BIOS AX,
|
||||
Pin3-BIOS AY,
|
||||
Pin4-BIOS DX, Pin5-Switch*(optional),
|
||||
Pin6-SQCK,
|
||||
Pin7-SUBQ,
|
||||
Pin8-DATA,
|
||||
Pin9-GATE_WFCK,
|
||||
PinRST-RESET*(Only for JAP_FAT) */
|
||||
|
||||
//------------------------------------------------------------------------------------------------
|
||||
// Select your console
|
||||
//------------------------------------------------------------------------------------------------
|
||||
// Attention!
|
||||
// If a BIOS checksum is specified, it is more important than the SCPH model number!
|
||||
//------------------------------------------------------------------------------------------------
|
||||
|
||||
//#define SCPH_xxx1 // Use for all NTSC-U/C models. No BIOS patching needed.
|
||||
//#define SCPH_xxx2 // Use for all PAL FAT models. No BIOS patching needed.
|
||||
//#define SCPH_103 // No BIOS patching needed.
|
||||
//#define SCPH_102 // DX - D0, AX - A7. BIOS ver. 4.4e, CRC 0BAD7EA9 | 4.5e, CRC 76B880E5
|
||||
//#define SCPH_100 // DX - D0, AX - A7. BIOS ver. 4.3j, CRC F2AF798B
|
||||
//#define SCPH_7000_9000 // DX - D0, AX - A7. BIOS ver. 4.0j, CRC EC541CD0
|
||||
//#define SCPH_5500 // DX - D0, AX - A5. BIOS ver. 3.0j, CRC FF3EEB8C
|
||||
//#define SCPH_3500_5000 // DX - D0, for 40-pin BIOS: AX - A4, for 32-pin BIOS: AX - A5. BIOS ver. 2.2j, CRC 24FC7E17 | 2.1j, CRC BC190209
|
||||
//#define SCPH_3000 // DX - D5, for 40-pin BIOS: AX - A6, AY - A7, for 32-pin BIOS: AX - A7, AY - A8. BIOS ver. 1.1j, CRC 3539DEF6
|
||||
//#define SCPH_1000 // DX - D5, for 40-pin BIOS: AX - A6, AY - A7, for 32-pin BIOS: AX - A7, AY - A8. BIOS ver. 1.0j, CRC 3B601FC8
|
||||
|
||||
//------------------------------------------------------------------------------------------------
|
||||
// Options
|
||||
//------------------------------------------------------------------------------------------------
|
||||
|
||||
//#define PATCH_SWICHE // Enables hardware support for disabling BIOS patching.
|
||||
//#define LED_RUN
|
||||
|
||||
//------------------------------------------------------------------------------------------------
|
||||
// Code section
|
||||
//------------------------------------------------------------------------------------------------
|
||||
|
||||
#include "MUC.h"
|
||||
#include "settings.h"
|
||||
#include "BIOS_patching.h"
|
||||
|
||||
//Initializing values for region code injection timing
|
||||
#define DELAY_BETWEEN_BITS 4000 // 250 bits/s (microseconds) (ATtiny 8Mhz works from 3950 to 4100) PU-23 PU-22 MAX 4250 MIN 3850
|
||||
#define DELAY_BETWEEN_INJECTIONS 90 // PU-22+ work best with 80 to 100 (milliseconds) 72 in oldcrow. pu_23 pu-22 MAX 250 MIN 50
|
||||
#define HYSTERESIS_MAX 14 //pu-23 pu-22 min 5 max 200
|
||||
|
||||
//Creation of the different variables for the counter
|
||||
volatile uint8_t count_isr = 0;
|
||||
volatile uint32_t microsec = 0;
|
||||
volatile uint16_t millisec = 0;
|
||||
|
||||
//Flag initializing for automatic console generation selection 0 = old, 1 = pu-22 end ++
|
||||
volatile bool wfck_mode = 0;
|
||||
|
||||
//Counter increment function Fuses
|
||||
ISR(CTC_TIMER_VECTOR) {
|
||||
microsec += 10;
|
||||
count_isr++;
|
||||
if (count_isr == 100)
|
||||
{
|
||||
millisec++;
|
||||
count_isr = 0;
|
||||
}
|
||||
}
|
||||
|
||||
//Timer register reset function
|
||||
void Timer_Start() {
|
||||
#if defined(ATmega328_168) || defined(ATmega32U4_16U4) || defined(ATtiny85_45_25) || defined(LGT8F328P)
|
||||
TIMER_TCNT_CLEAR;
|
||||
TIMER_INTERRUPT_ENABLE;
|
||||
#if defined(BIOS_PATCH)
|
||||
TIMER_TIFR_CLEAR;
|
||||
#endif
|
||||
#endif
|
||||
}
|
||||
|
||||
//Function to stop timer registers, and reset time counters
|
||||
void Timer_Stop() {
|
||||
|
||||
#if defined(ATmega328_168) || defined(ATmega32U4_16U4) || defined(ATtiny85_45_25) || defined(LGT8F328P)
|
||||
TIMER_INTERRUPT_DISABLE;
|
||||
TIMER_TCNT_CLEAR;
|
||||
#endif
|
||||
count_isr = 0;
|
||||
microsec = 0;
|
||||
millisec = 0;
|
||||
}
|
||||
|
||||
void Init() {
|
||||
#if defined(ATmega328_168) || defined(ATmega32U4_16U4) || defined(ATtiny85_45_25) || defined(LGT8F328P)
|
||||
TIMER_TCNT_CLEAR;
|
||||
SET_OCROA_DIV;
|
||||
SET_TIMER_TCCROA;
|
||||
SET_TIMER_TCCROB;
|
||||
#endif
|
||||
|
||||
#if defined(PATCH_SW) && defined(BIOS_PATCH)
|
||||
PIN_SWITCH_INPUT;
|
||||
PIN_SWITCH_SET;
|
||||
#endif
|
||||
|
||||
#ifdef LED_RUN
|
||||
PIN_LED_OUTPUT;
|
||||
#endif
|
||||
|
||||
GLOBAL_INTERRUPT_ENABLE;
|
||||
|
||||
PIN_SQCK_INPUT;
|
||||
PIN_SUBQ_INPUT;
|
||||
}
|
||||
|
||||
// borrowed from AttyNee. Bitmagic to get to the SCEX strings stored in flash (because Harvard architecture)
|
||||
// Read a specific bit from an array of bytes
|
||||
uint8_t readBit(uint8_t index, const uint8_t* ByteSet) {
|
||||
return !!(ByteSet[index / 8] & (1 << (index % 8))); // Return true if the specified bit is set in ByteSet[index]
|
||||
}
|
||||
|
||||
|
||||
// Static arrays storing SCEX data for different regions
|
||||
void inject_SCEX(const char region) {
|
||||
static const uint8_t SCEEData[] = {
|
||||
0b01011001,
|
||||
0b11001001,
|
||||
0b01001011,
|
||||
0b01011101,
|
||||
0b11101010,
|
||||
0b00000010
|
||||
};
|
||||
|
||||
static const uint8_t SCEAData[] = {
|
||||
0b01011001,
|
||||
0b11001001,
|
||||
0b01001011,
|
||||
0b01011101,
|
||||
0b11111010,
|
||||
0b00000010
|
||||
};
|
||||
|
||||
static const uint8_t SCEIData[] = {
|
||||
0b01011001,
|
||||
0b11001001,
|
||||
0b01001011,
|
||||
0b01011101,
|
||||
0b11011010,
|
||||
0b00000010
|
||||
};
|
||||
|
||||
// Iterate through 44 bits of SCEX data
|
||||
for (uint8_t bit_counter = 0; bit_counter < 44; bit_counter++) {
|
||||
// Check if the current bit is 0
|
||||
if (readBit(bit_counter, region == 'e' ? SCEEData : region == 'a' ? SCEAData : SCEIData) == 0) {
|
||||
PIN_DATA_OUTPUT;
|
||||
PIN_DATA_CLEAR;
|
||||
_delay_us(DELAY_BETWEEN_BITS); // Wait for specified delay between bits
|
||||
}
|
||||
else {
|
||||
// modulate DATA pin based on WFCK_READ
|
||||
if (wfck_mode) // If wfck_mode is true(pu22mode)
|
||||
{
|
||||
PIN_DATA_OUTPUT;
|
||||
Timer_Start();
|
||||
do {
|
||||
// read wfck pin
|
||||
if (PIN_WFCK_READ) {
|
||||
PIN_DATA_SET;
|
||||
}
|
||||
|
||||
else {
|
||||
PIN_DATA_CLEAR;
|
||||
}
|
||||
}
|
||||
while (microsec < DELAY_BETWEEN_BITS);
|
||||
Timer_Stop(); // Stop timer
|
||||
}
|
||||
// PU-18 or lower mode
|
||||
else {
|
||||
PIN_DATA_INPUT;
|
||||
_delay_us(DELAY_BETWEEN_BITS);
|
||||
}
|
||||
}
|
||||
}
|
||||
// After injecting SCEX data, set DATA pin as output and clear (low)
|
||||
PIN_DATA_OUTPUT;
|
||||
PIN_DATA_CLEAR;
|
||||
_delay_ms(DELAY_BETWEEN_INJECTIONS);
|
||||
}
|
||||
|
||||
int main() {
|
||||
uint8_t hysteresis = 0;
|
||||
uint8_t scbuf[12] = { 0 }; // SUBQ bit storage
|
||||
uint16_t timeout_clock_counter = 0;
|
||||
uint8_t bitbuf = 0;
|
||||
uint8_t bitpos = 0;
|
||||
uint8_t scpos = 0; // scbuf position
|
||||
uint16_t lows = 0;
|
||||
|
||||
Init();
|
||||
|
||||
#ifdef LED_RUN
|
||||
PIN_LED_ON;
|
||||
#endif
|
||||
|
||||
#if defined(BIOS_PATCH) && !defined(PATCH_SWICHE)
|
||||
Bios_Patching();
|
||||
#elif defined(BIOS_PATCH) && defined(PATCH_SWICHE)
|
||||
if (PIN_SWICHE_READ != 0) {
|
||||
Bios_Patching();
|
||||
} else {
|
||||
|
||||
while (PIN_SQCK_READ == 0)
|
||||
;
|
||||
while (PIN_WFCK_READ == 0)
|
||||
;
|
||||
}
|
||||
// wait for console power on and stable signals
|
||||
#else
|
||||
|
||||
while (PIN_SQCK_READ == 0)
|
||||
;
|
||||
while (PIN_WFCK_READ == 0)
|
||||
;
|
||||
#endif
|
||||
|
||||
Timer_Start();
|
||||
|
||||
// Board detection
|
||||
//
|
||||
// GATE: __----------------------- // this is a PU-7 .. PU-20 board!
|
||||
//
|
||||
// WFCK: __-_-_-_-_-_-_-_-_-_-_-_- // this is a PU-22 or newer board!
|
||||
// typical readouts PU-22: highs: 2449 lows: 2377
|
||||
do {
|
||||
if (PIN_WFCK_READ == 0) lows++; // good for ~5000 reads in 1s
|
||||
_delay_us(200);
|
||||
}
|
||||
while (millisec < 1000); // sample 1s
|
||||
|
||||
Timer_Stop();
|
||||
|
||||
if (lows > 100) {
|
||||
wfck_mode = 1; //flag pu22mode
|
||||
}
|
||||
|
||||
else {
|
||||
wfck_mode = 0; //flag oldmod
|
||||
}
|
||||
|
||||
#ifdef LED_RUN
|
||||
PIN_LED_OFF;
|
||||
#endif
|
||||
|
||||
while (1) {
|
||||
|
||||
_delay_ms(1); /* Start with a small delay, which can be necessary
|
||||
in cases where the MCU loops too quickly and picks up the laster SUBQ trailing end*/
|
||||
|
||||
GLOBAL_INTERRUPT_DISABLE; // start critical section
|
||||
|
||||
// Capture 8 bits for 12 runs > complete SUBQ transmission
|
||||
do {
|
||||
for (bitpos = 0; bitpos < 8; bitpos++) {
|
||||
while (PIN_SQCK_READ != 0) // wait for clock to go low
|
||||
{
|
||||
timeout_clock_counter++;
|
||||
// a timeout resets the 12 byte stream in case the PSX sends malformatted clock pulses, as happens on bootup
|
||||
if (timeout_clock_counter > 1000) {
|
||||
scpos = 0;
|
||||
timeout_clock_counter = 0;
|
||||
bitbuf = 0;
|
||||
bitpos = 0;
|
||||
continue;
|
||||
}
|
||||
}
|
||||
|
||||
// Wait for clock to go high
|
||||
while (PIN_SQCK_READ == 0);
|
||||
|
||||
if (PIN_SUBQ_READ) // If clock pin high
|
||||
{
|
||||
bitbuf |= 1 << bitpos; // Set the bit at position bitpos in the bitbuf to 1. Using OR combined with a bit shift
|
||||
}
|
||||
|
||||
timeout_clock_counter = 0; // no problem with this bit
|
||||
}
|
||||
|
||||
scbuf[scpos] = bitbuf; // One byte done
|
||||
scpos++;
|
||||
bitbuf = 0;
|
||||
}
|
||||
|
||||
while (scpos < 12); // Repeat for all 12 bytes
|
||||
|
||||
GLOBAL_INTERRUPT_ENABLE; // End critical section
|
||||
|
||||
/* Check if read head is in wobble area
|
||||
| We only want to unlock game discs (0x41) and only if the read head is in the outer TOC area.
|
||||
| We want to see a TOC sector repeatedly before injecting (helps with timing and marginal lasers).
|
||||
| All this logic is because we don't know if the HC-05 is actually processing a getSCEX() command.
|
||||
| Hysteresis is used because older drives exhibit more variation in read head positioning.
|
||||
| While the laser lens moves to correct for the error, they can pick up a few TOC sectors. */
|
||||
|
||||
//This variable initialization macro is to replace (0x41) with a filter that will check that only the three most significant bits are correct. 0x001xxxxx
|
||||
uint8_t isDataSector = (((scbuf[0] & 0x40) == 0x40) && (((scbuf[0] & 0x10) == 0) && ((scbuf[0] & 0x80) == 0)));
|
||||
|
||||
if (
|
||||
(isDataSector && scbuf[1] == 0x00 && scbuf[6] == 0x00) && // [0] = 41 means psx game disk. the other 2 checks are garbage protection
|
||||
(scbuf[2] == 0xA0 || scbuf[2] == 0xA1 || scbuf[2] == 0xA2 || // if [2] = A0, A1, A2 ..
|
||||
(scbuf[2] == 0x01 && (scbuf[3] >= 0x98 || scbuf[3] <= 0x02))) // .. or = 01 but then [3] is either > 98 or < 02
|
||||
) {
|
||||
hysteresis++;
|
||||
}
|
||||
|
||||
// This CD has the wobble into CD-DA space. (started at 0x41, then went into 0x01)
|
||||
else if (hysteresis > 0 && ((scbuf[0] == 0x01 || isDataSector) && (scbuf[1] == 0x00 /*|| scbuf[1] == 0x01*/) && scbuf[6] == 0x00)) {
|
||||
hysteresis++;
|
||||
}
|
||||
|
||||
// None of the above. Initial detection was noise. Decrease the counter.
|
||||
else if (hysteresis > 0) {
|
||||
hysteresis--;
|
||||
}
|
||||
|
||||
// hysteresis value "optimized" using very worn but working drive on ATmega328 @ 16Mhz
|
||||
// should be fine on other MCUs and speeds, as the PSX dictates SUBQ rate
|
||||
if (hysteresis >= HYSTERESIS_MAX) {
|
||||
// If the read head is still here after injection, resending should be quick.
|
||||
// Hysteresis naturally goes to 0 otherwise (the read head moved).
|
||||
hysteresis = 11;
|
||||
|
||||
#ifdef LED_RUN
|
||||
PIN_LED_ON;
|
||||
#endif
|
||||
|
||||
PIN_DATA_OUTPUT;
|
||||
PIN_DATA_CLEAR;
|
||||
|
||||
if (!wfck_mode) // If wfck_mode is fals (oldmode)
|
||||
{
|
||||
PIN_WFCK_OUTPUT;
|
||||
PIN_WFCK_CLEAR;
|
||||
}
|
||||
|
||||
_delay_ms(DELAY_BETWEEN_INJECTIONS); // HC-05 waits for a bit of silence (pin low) before it begins decoding.
|
||||
|
||||
// inject symbols now. 2 x 3 runs seems optimal to cover all boards
|
||||
for (uint8_t scex = 0; scex < 2; scex++) {
|
||||
inject_SCEX(region[scex]); //
|
||||
}
|
||||
|
||||
if (!wfck_mode) // Set WFCK pin input
|
||||
{
|
||||
PIN_WFCK_INPUT;
|
||||
}
|
||||
|
||||
PIN_DATA_INPUT;
|
||||
|
||||
#ifdef LED_RUN
|
||||
PIN_LED_OFF;
|
||||
#endif
|
||||
}
|
||||
}
|
||||
}
|
||||
135
PSNee_V8/PSNee_V8/settings.h
Normal file
135
PSNee_V8/PSNee_V8/settings.h
Normal file
@ -0,0 +1,135 @@
|
||||
#pragma once
|
||||
|
||||
/*
|
||||
The _delay_us function uses loops to generate an approximate delay for the specified number of microseconds.
|
||||
It calculates the number of clock cycles required to achieve the requested delay and loops the corresponding number of times.
|
||||
|
||||
The temporal precision of _delay_us depends on the microcontroller's clock frequency (F_CPU).
|
||||
For the ATmega328 operating at a typical frequency of 16 MHz, here are some details on the precision.
|
||||
|
||||
Clock Frequency: F_CPU must be defined correctly before using the function. For an ATmega328 operating at 16 MHz:
|
||||
1 clock cycle = 1 / 16,000,000 s ≈ 62.5 ns
|
||||
1 µs ≈ 16 clock cycles
|
||||
|
||||
HOLD _delay_us(2.75) = 44 clock cycles
|
||||
PATCHING _delay_us(0.2) = 3,2 clock cycles
|
||||
|
||||
|
||||
*/
|
||||
|
||||
|
||||
|
||||
#ifdef SCPH_xxx1
|
||||
#define SCEA
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_xxx2
|
||||
#define SCEE
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_103
|
||||
#define SCEI
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_102
|
||||
#define SCEE
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.75)
|
||||
#define PATCHING _delay_us(0.2)
|
||||
#define CHECKPOINT 83900
|
||||
#define TRIGGER 48
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_100
|
||||
#define SCEI
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.7)
|
||||
#define PATCHING _delay_us(0.2)
|
||||
#define CHECKPOINT 83900
|
||||
#define TRIGGER 48
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_7000_9000
|
||||
#define SCEI
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.85)
|
||||
#define PATCHING _delay_us(0.1)
|
||||
#define CHECKPOINT 75270
|
||||
#define TRIGGER 16
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_5500
|
||||
#define SCEI
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.85)
|
||||
#define PATCHING _delay_us(0.1)
|
||||
#define CHECKPOINT 76130
|
||||
#define TRIGGER 21
|
||||
#define LOW_TRIGGER
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_3500_5000
|
||||
#define SCEI
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.85)
|
||||
#define PATCHING _delay_us(0.1)
|
||||
#define CHECKPOINT 75260
|
||||
#define TRIGGER 21
|
||||
#define LOW_TRIGGER
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_3000
|
||||
#define SCEI
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.75)
|
||||
#define PATCHING _delay_us(0.1)
|
||||
#define CHECKPOINT 83000
|
||||
#define TRIGGER 60
|
||||
//#define DOUBLE_PATCH
|
||||
//#define LOW_TRIGGER2
|
||||
#define HIGH_PATCH
|
||||
#define HOLD2 _delay_us(2.88)
|
||||
#define PATCHING2 _delay_us(0.15)
|
||||
#define CHECKPOINT2 253300
|
||||
#define TRIGGER2 43
|
||||
#endif
|
||||
|
||||
#ifdef SCPH_1000
|
||||
#define SCEI
|
||||
#define BIOS_PATCH
|
||||
#define HOLD _delay_us(2.7)
|
||||
#define PATCHING _delay_us(0.1)
|
||||
#define CHECKPOINT 83000
|
||||
#define TRIGGER 92
|
||||
//#define DOUBLE_PATCH
|
||||
//#define LOW_TRIGGER2
|
||||
#define HIGH_PATCH
|
||||
#define HOLD2 _delay_us(2.88)
|
||||
#define PATCHING2 _delay_us(0.15)
|
||||
#define CHECKPOINT2 272800
|
||||
#define TRIGGER2 71
|
||||
#endif
|
||||
|
||||
#ifdef SCEA
|
||||
const char region[3] = {'a', 'a', 'a'};
|
||||
#endif
|
||||
|
||||
#ifdef SCEE
|
||||
const char region[3] = {'e', 'e', 'e'};
|
||||
#endif
|
||||
|
||||
#ifdef SCEI
|
||||
const char region[3] = {'i', 'i', 'i'};
|
||||
#endif
|
||||
|
||||
#if !defined(SCPH_xxx1) && !defined(SCPH_xxx2) && !defined(SCPH_103) && \
|
||||
!defined(SCPH_102) && !defined(SCPH_100) && !defined(SCPH_7000_9000) && \
|
||||
!defined(SCPH_5500) && !defined(SCPH_3500_5000) && !defined(SCPH_3000) && \
|
||||
!defined(SCPH_1000)
|
||||
#error "Console not selected! Please uncoment #define with SCPH model number."
|
||||
#elif !(defined(SCPH_xxx1) ^ defined(SCPH_xxx2) ^ defined(SCPH_103) ^ \
|
||||
defined(SCPH_102) ^ defined(SCPH_100) ^ defined(SCPH_7000_9000) ^ \
|
||||
defined(SCPH_5500) ^ defined(SCPH_3500_5000) ^ defined(SCPH_3000) ^ \
|
||||
defined(SCPH_1000))
|
||||
#error "May be selected only one console! Please check #define with SCPH model number."
|
||||
#endif
|
||||
213
PSNeecore/hardware/avr/1.0.0/boards.txt
Normal file
213
PSNeecore/hardware/avr/1.0.0/boards.txt
Normal file
@ -0,0 +1,213 @@
|
||||
# Menu options
|
||||
menu.variant=Variant
|
||||
menu.fuses=Fuses
|
||||
|
||||
##############################
|
||||
### ATiny25/45/85 ########
|
||||
##############################
|
||||
|
||||
# General
|
||||
|
||||
ATtinyX5.name=ATtiny25/45/85
|
||||
|
||||
ATtinyX5.upload.tool=arduino:avrdude
|
||||
|
||||
|
||||
ATtinyX5.program.tool=arduino:avrdude
|
||||
ATtinyX5.program.unlock_bits=0xff
|
||||
ATtinyX5.program.lock_bits=0xff
|
||||
|
||||
ATtinyX5.build.core=arduino:arduino
|
||||
ATtinyX5.build.board=attiny
|
||||
ATtinyX5.build.variant=tiny8
|
||||
ATtinyX5.build.f_cpu=8000000L
|
||||
|
||||
# Variants
|
||||
|
||||
ATtinyX5.menu.variant.attiny25=ATtiny25
|
||||
ATtinyX5.menu.variant.attiny25.upload.maximum_size=2048
|
||||
ATtinyX5.menu.variant.attiny25.upload.maximum_data_size=128
|
||||
ATtinyX5.menu.variant.attiny25.build.mcu=attiny25
|
||||
|
||||
|
||||
ATtinyX5.menu.variant.attiny45=ATtiny45
|
||||
ATtinyX5.menu.variant.attiny45.upload.maximum_size=4096
|
||||
ATtinyX5.menu.variant.attiny45.upload.maximum_data_size=256
|
||||
ATtinyX5.menu.variant.attiny45.build.mcu=attiny45
|
||||
|
||||
|
||||
ATtinyX5.menu.variant.attiny85=ATtiny85
|
||||
ATtinyX5.menu.variant.attiny85.upload.maximum_size=8192
|
||||
ATtinyX5.menu.variant.attiny85.upload.maximum_data_size=512
|
||||
ATtinyX5.menu.variant.attiny85.build.mcu=attiny85
|
||||
|
||||
|
||||
##############################
|
||||
### ATiny48/88 ########
|
||||
##############################
|
||||
|
||||
# General
|
||||
|
||||
ATtinyX8.name=ATtiny88/48
|
||||
|
||||
ATtinyX8.upload.tool=arduino:avrdude
|
||||
|
||||
ATtinyX8.program.tool=arduino:avrdude
|
||||
ATtinyX8.program.unlock_bits=0xff
|
||||
ATtinyX8.program.lock_bits=0xff
|
||||
|
||||
ATtinyX8.build.core=arduino:arduino
|
||||
ATtinyX8.build.board=AVR_ATTINYX8
|
||||
ATtinyX8.build.variant=tinyx8
|
||||
ATtinyX8.build.f_cpu=16000000L
|
||||
|
||||
|
||||
|
||||
ATtinyX8.menu.variant.attiny48=ATtiny48
|
||||
ATtinyX8.menu.variant.attiny48.upload.maximum_size=4096
|
||||
ATtinyX8.menu.variant.attiny48.upload.maximum_data_size=256
|
||||
ATtinyX8.menu.variant.attiny48.build.mcu=attiny48
|
||||
|
||||
ATtinyX8.menu.variant.attiny88=ATtiny88
|
||||
ATtinyX8.menu.variant.attiny88.upload.maximum_size=8192
|
||||
ATtinyX8.menu.variant.attiny88.upload.maximum_data_size=512
|
||||
ATtinyX8.menu.variant.attiny88.build.mcu=attiny88
|
||||
|
||||
ATtinyX8.menu.fuses.BIOSpatch=BIOS patch
|
||||
ATtinyX8.menu.fuses.BIOSpatch.upload.low_fuses=0xee
|
||||
|
||||
ATtinyX8.menu.fuses.NoBIOSpatch=No BIOS patch
|
||||
ATtinyX8.menu.fuses.NoBIOSpatch.upload.low_fuses=0xff
|
||||
|
||||
#############################
|
||||
#### ATmega328/A/P/PA/PB ####
|
||||
#############################
|
||||
|
||||
# General
|
||||
328.name=ATmega328
|
||||
|
||||
328.32u4.tool=arduino:avrdude
|
||||
328.upload.default_speed=57600
|
||||
328.upload.maximum_data_size=2048
|
||||
328.upload.maximum_size=30720
|
||||
|
||||
|
||||
328.build.core=arduino:arduino
|
||||
328.build.board=AVR_ATmega328
|
||||
328.build.f_cpu=16000000L
|
||||
|
||||
# Variants
|
||||
328.menu.variant.modelP=328P / 328PA
|
||||
328.menu.variant.modelP.build.variant=standard
|
||||
328.menu.variant.modelP.build.mcu=atmega328p
|
||||
|
||||
328.menu.variant.modelNonP=328 / 328A
|
||||
328.menu.variant.modelNonP.build.variant=standard
|
||||
328.menu.variant.modelNonP.build.mcu=atmega328
|
||||
|
||||
328.menu.variant.modelPB=328PB
|
||||
328.menu.variant.modelPB.build.variant=pb-variant
|
||||
328.menu.variant.modelPB.build.mcu=atmega328pb
|
||||
|
||||
328.menu.fuses.BIOSpatch=BIOS patch
|
||||
328.menu.fuses.BIOSpatch.upload.low_fuses=0xee
|
||||
|
||||
328.menu.fuses.NoBIOSpatch=No BIOS patch
|
||||
328.menu.fuses.NoBIOSpatch.upload.low_fuses=0xff
|
||||
|
||||
#############################
|
||||
#### ATmega168/A/P/PA/PB ####
|
||||
#############################
|
||||
|
||||
168.name=ATmega168
|
||||
|
||||
168.upload.tool=arduino:avrdude
|
||||
168.upload.default_speed=57600
|
||||
168.upload.maximum_size=15872
|
||||
168.upload.maximum_data_size=1024
|
||||
|
||||
168.build.core=arduino:arduino
|
||||
168.build.board=AVR_ATmega168
|
||||
168.build.f_cpu=16000000L
|
||||
|
||||
|
||||
# Variants
|
||||
168.menu.variant.modelP=168P / 168PA
|
||||
168.menu.variant.modelP.build.variant=standard
|
||||
168.menu.variant.modelP.build.mcu=atmega168p
|
||||
|
||||
168.menu.variant.modelNonP=168 / 168A
|
||||
168.menu.variant.modelNonP.build.variant=standard
|
||||
168.menu.variant.modelNonP.build.mcu=atmega168
|
||||
|
||||
168.menu.variant.modelPB=168PB
|
||||
168.menu.variant.modelPB.build.variant=pb-variant
|
||||
168.menu.variant.modelPB.build.mcu=atmega168pb
|
||||
|
||||
168.menu.fuses.BIOSpatch=BIOS patch
|
||||
168.menu.fuses.BIOSpatch.upload.low_fuses=0xee
|
||||
|
||||
168.menu.fuses.NoBIOSpatch=No BIOS patch
|
||||
168.menu.fuses.NoBIOSpatch.upload.low_fuses=0xff
|
||||
|
||||
#############################
|
||||
#### atmega32u4 ####
|
||||
#############################
|
||||
|
||||
32u4.name=ATmega32u4
|
||||
|
||||
32u4.vid.0=0x2341
|
||||
32u4.pid.0=0x0037
|
||||
32u4.vid.1=0x2341
|
||||
32u4.pid.1=0x8037
|
||||
32u4.vid.2=0x2A03
|
||||
32u4.pid.2=0x0037
|
||||
32u4.vid.3=0x2A03
|
||||
32u4.pid.3=0x8037
|
||||
32u4.vid.4=0x2341
|
||||
32u4.pid.4=0x0237
|
||||
32u4.vid.5=0x2341
|
||||
32u4.pid.5=0x8237
|
||||
32u4.upload_port.0.vid=0x2341
|
||||
32u4.upload_port.0.pid=0x0037
|
||||
32u4.upload_port.1.vid=0x2341
|
||||
32u4.upload_port.1.pid=0x8037
|
||||
32u4.upload_port.2.vid=0x2A03
|
||||
32u4.upload_port.2.pid=0x0037
|
||||
32u4.upload_port.3.vid=0x2A03
|
||||
32u4.upload_port.3.pid=0x8037
|
||||
32u4.upload_port.4.vid=0x2341
|
||||
32u4.upload_port.4.pid=0x0237
|
||||
32u4.upload_port.5.vid=0x2341
|
||||
32u4.upload_port.5.pid=0x8237
|
||||
32u4.upload_port.6.board=micro
|
||||
|
||||
32u4.upload.tool=arduino:avrdude
|
||||
32u4.upload.default_speed=57600
|
||||
32u4.upload.maximum_data_size=2048
|
||||
32u4.upload.maximum_size=30720
|
||||
32u4.upload.use_1200bps_touch=true
|
||||
32u4.upload.wait_for_upload_port=true
|
||||
|
||||
|
||||
|
||||
32u4.build.mcu=atmega32u4
|
||||
32u4.build.f_cpu=16000000L
|
||||
32u4.build.vid=0x2341
|
||||
32u4.build.pid=0x8037
|
||||
32u4.build.usb_product="Arduino Micro"
|
||||
32u4.build.board=AVR_MICRO
|
||||
32u4.build.core=arduino:arduino
|
||||
32u4.build.variant=micro
|
||||
32u4.build.extra_flags={build.usb_flags}
|
||||
|
||||
|
||||
32u4.vid.0=0x239A
|
||||
32u4.pid.0=0x800C
|
||||
|
||||
32u4.menu.fuses.BIOSpatch=BIOS patch
|
||||
32u4.menu.fuses.BIOSpatch.upload.low_fuses=0xee
|
||||
|
||||
32u4.menu.fuses.NoBIOSpatch=No BIOS patch
|
||||
32u4.menu.fuses.NoBIOSpatch.upload.low_fuses=0xff
|
||||
|
||||
1
PSNeecore/hardware/avr/1.0.0/bootloaders/bootloader.txt
Normal file
1
PSNeecore/hardware/avr/1.0.0/bootloaders/bootloader.txt
Normal file
@ -0,0 +1 @@
|
||||
|
||||
23
PSNeecore/hardware/avr/1.0.0/platform.txt
Normal file
23
PSNeecore/hardware/avr/1.0.0/platform.txt
Normal file
@ -0,0 +1,23 @@
|
||||
name=PSNee
|
||||
version=1.0.0
|
||||
|
||||
tools.avrdude.path={runtime.tools.avrdude.path}
|
||||
tools.avrdude.cmd.path={path}/bin/avrdude
|
||||
tools.avrdude.config.path={path}/etc/avrdude.conf
|
||||
|
||||
|
||||
tools.avrdude.program.params.verbose=-v
|
||||
tools.avrdude.program.params.quiet=-q -q
|
||||
# tools.avrdude.program.verify is needed for backwards compatibility with IDE 1.6.8 or older, IDE 1.6.9 or newer overrides this value
|
||||
tools.avrdude.program.verify=
|
||||
tools.avrdude.program.params.noverify=-V
|
||||
tools.avrdude.program.pattern="{cmd.path}" "-C{config.path}" {program.verbose} {program.verify} -p{build.mcu} -c{protocol} {program.extra_params} -Uefuse:w:0xff:m -Uhfuse:w:0xdf:m -Ulfuse:w:{upload.low_fuses}:m "-Uflash:w:{build.path}/{build.project_name}.hex:i"
|
||||
|
||||
tools.avrdude.erase.params.verbose=-v -v -v -v
|
||||
tools.avrdude.erase.params.quiet=-q -q
|
||||
tools.avrdude.erase.pattern="{cmd.path}" "-C{config.path}" {erase.verbose} -p{build.mcu} -c{protocol} {program.extra_params} -e -Uefuse:w:0xff:m -Uhfuse:w:0xdf:m -Ulfuse:w:{bootloader.low_fuses}:m
|
||||
|
||||
##tools.avrdude.bootloader.params.verbose=-v
|
||||
##tools.avrdude.bootloader.params.quiet=-q -q
|
||||
##tools.avrdude.bootloader.pattern="{cmd.path}" "-C{config.path}" {bootloader.verbose} -p{build.mcu} -c{protocol} {program.extra_params} "-Uflash:w:{runtime.platform.path}/bootloaders/{bootloader.file}:i" -Ulock:w:{bootloader.lock_bits}:m
|
||||
|
||||
391
PSNeecore/hardware/avr/1.0.0/variants/leonardo/pins_arduino.h
Normal file
391
PSNeecore/hardware/avr/1.0.0/variants/leonardo/pins_arduino.h
Normal file
@ -0,0 +1,391 @@
|
||||
/*
|
||||
pins_arduino.h - Pin definition functions for Arduino
|
||||
Part of Arduino - http://www.arduino.cc/
|
||||
|
||||
Copyright (c) 2007 David A. Mellis
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General
|
||||
Public License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
||||
Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
// Workaround for wrong definitions in "iom32u4.h".
|
||||
// This should be fixed in the AVR toolchain.
|
||||
#undef UHCON
|
||||
#undef UHINT
|
||||
#undef UHIEN
|
||||
#undef UHADDR
|
||||
#undef UHFNUM
|
||||
#undef UHFNUML
|
||||
#undef UHFNUMH
|
||||
#undef UHFLEN
|
||||
#undef UPINRQX
|
||||
#undef UPINTX
|
||||
#undef UPNUM
|
||||
#undef UPRST
|
||||
#undef UPCONX
|
||||
#undef UPCFG0X
|
||||
#undef UPCFG1X
|
||||
#undef UPSTAX
|
||||
#undef UPCFG2X
|
||||
#undef UPIENX
|
||||
#undef UPDATX
|
||||
#undef TCCR2A
|
||||
#undef WGM20
|
||||
#undef WGM21
|
||||
#undef COM2B0
|
||||
#undef COM2B1
|
||||
#undef COM2A0
|
||||
#undef COM2A1
|
||||
#undef TCCR2B
|
||||
#undef CS20
|
||||
#undef CS21
|
||||
#undef CS22
|
||||
#undef WGM22
|
||||
#undef FOC2B
|
||||
#undef FOC2A
|
||||
#undef TCNT2
|
||||
#undef TCNT2_0
|
||||
#undef TCNT2_1
|
||||
#undef TCNT2_2
|
||||
#undef TCNT2_3
|
||||
#undef TCNT2_4
|
||||
#undef TCNT2_5
|
||||
#undef TCNT2_6
|
||||
#undef TCNT2_7
|
||||
#undef OCR2A
|
||||
#undef OCR2_0
|
||||
#undef OCR2_1
|
||||
#undef OCR2_2
|
||||
#undef OCR2_3
|
||||
#undef OCR2_4
|
||||
#undef OCR2_5
|
||||
#undef OCR2_6
|
||||
#undef OCR2_7
|
||||
#undef OCR2B
|
||||
#undef OCR2_0
|
||||
#undef OCR2_1
|
||||
#undef OCR2_2
|
||||
#undef OCR2_3
|
||||
#undef OCR2_4
|
||||
#undef OCR2_5
|
||||
#undef OCR2_6
|
||||
#undef OCR2_7
|
||||
|
||||
#define NUM_DIGITAL_PINS 31
|
||||
#define NUM_ANALOG_INPUTS 12
|
||||
|
||||
#define TX_RX_LED_INIT DDRD |= (1<<5), DDRB |= (1<<0)
|
||||
#define TXLED0 PORTD |= (1<<5)
|
||||
#define TXLED1 PORTD &= ~(1<<5)
|
||||
#define RXLED0 PORTB |= (1<<0)
|
||||
#define RXLED1 PORTB &= ~(1<<0)
|
||||
|
||||
#define PIN_WIRE_SDA (2)
|
||||
#define PIN_WIRE_SCL (3)
|
||||
|
||||
static const uint8_t SDA = PIN_WIRE_SDA;
|
||||
static const uint8_t SCL = PIN_WIRE_SCL;
|
||||
|
||||
#define LED_BUILTIN 13
|
||||
#define LED_BUILTIN_RX 17
|
||||
#define LED_BUILTIN_TX 30
|
||||
|
||||
// Map SPI port to 'new' pins D14..D17
|
||||
#define PIN_SPI_SS (17)
|
||||
#define PIN_SPI_MOSI (16)
|
||||
#define PIN_SPI_MISO (14)
|
||||
#define PIN_SPI_SCK (15)
|
||||
|
||||
static const uint8_t SS = PIN_SPI_SS;
|
||||
static const uint8_t MOSI = PIN_SPI_MOSI;
|
||||
static const uint8_t MISO = PIN_SPI_MISO;
|
||||
static const uint8_t SCK = PIN_SPI_SCK;
|
||||
|
||||
// Mapping of analog pins as digital I/O
|
||||
// A6-A11 share with digital pins
|
||||
#define PIN_A0 (18)
|
||||
#define PIN_A1 (19)
|
||||
#define PIN_A2 (20)
|
||||
#define PIN_A3 (21)
|
||||
#define PIN_A4 (22)
|
||||
#define PIN_A5 (23)
|
||||
#define PIN_A6 (24)
|
||||
#define PIN_A7 (25)
|
||||
#define PIN_A8 (26)
|
||||
#define PIN_A9 (27)
|
||||
#define PIN_A10 (28)
|
||||
#define PIN_A11 (29)
|
||||
|
||||
static const uint8_t A0 = PIN_A0;
|
||||
static const uint8_t A1 = PIN_A1;
|
||||
static const uint8_t A2 = PIN_A2;
|
||||
static const uint8_t A3 = PIN_A3;
|
||||
static const uint8_t A4 = PIN_A4;
|
||||
static const uint8_t A5 = PIN_A5;
|
||||
static const uint8_t A6 = PIN_A6; // D4
|
||||
static const uint8_t A7 = PIN_A7; // D6
|
||||
static const uint8_t A8 = PIN_A8; // D8
|
||||
static const uint8_t A9 = PIN_A9; // D9
|
||||
static const uint8_t A10 = PIN_A10; // D10
|
||||
static const uint8_t A11 = PIN_A11; // D12
|
||||
|
||||
#define digitalPinToPCICR(p) ((((p) >= 8 && (p) <= 11) || ((p) >= 14 && (p) <= 17) || ((p) >= A8 && (p) <= A10)) ? (&PCICR) : ((uint8_t *)0))
|
||||
#define digitalPinToPCICRbit(p) 0
|
||||
#define digitalPinToPCMSK(p) ((((p) >= 8 && (p) <= 11) || ((p) >= 14 && (p) <= 17) || ((p) >= A8 && (p) <= A10)) ? (&PCMSK0) : ((uint8_t *)0))
|
||||
#define digitalPinToPCMSKbit(p) ( ((p) >= 8 && (p) <= 11) ? (p) - 4 : ((p) == 14 ? 3 : ((p) == 15 ? 1 : ((p) == 16 ? 2 : ((p) == 17 ? 0 : (p - A8 + 4))))))
|
||||
|
||||
// __AVR_ATmega32U4__ has an unusual mapping of pins to channels
|
||||
extern const uint8_t PROGMEM analog_pin_to_channel_PGM[];
|
||||
#define analogPinToChannel(P) ( pgm_read_byte( analog_pin_to_channel_PGM + (P) ) )
|
||||
|
||||
#define digitalPinHasPWM(p) ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11 || (p) == 13)
|
||||
|
||||
#define digitalPinToInterrupt(p) ((p) == 0 ? 2 : ((p) == 1 ? 3 : ((p) == 2 ? 1 : ((p) == 3 ? 0 : ((p) == 7 ? 4 : NOT_AN_INTERRUPT)))))
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
// On the Arduino board, digital pins are also used
|
||||
// for the analog output (software PWM). Analog input
|
||||
// pins are a separate set.
|
||||
|
||||
// ATMEL ATMEGA32U4 / ARDUINO LEONARDO
|
||||
//
|
||||
// D0 PD2 RXD1/INT2
|
||||
// D1 PD3 TXD1/INT3
|
||||
// D2 PD1 SDA SDA/INT1
|
||||
// D3# PD0 PWM8/SCL OC0B/SCL/INT0
|
||||
// D4 A6 PD4 ADC8
|
||||
// D5# PC6 ??? OC3A/#OC4A
|
||||
// D6# A7 PD7 FastPWM #OC4D/ADC10
|
||||
// D7 PE6 INT6/AIN0
|
||||
//
|
||||
// D8 A8 PB4 ADC11/PCINT4
|
||||
// D9# A9 PB5 PWM16 OC1A/#OC4B/ADC12/PCINT5
|
||||
// D10# A10 PB6 PWM16 OC1B/0c4B/ADC13/PCINT6
|
||||
// D11# PB7 PWM8/16 0C0A/OC1C/#RTS/PCINT7
|
||||
// D12 A11 PD6 T1/#OC4D/ADC9
|
||||
// D13# PC7 PWM10 CLK0/OC4A
|
||||
//
|
||||
// A0 D18 PF7 ADC7
|
||||
// A1 D19 PF6 ADC6
|
||||
// A2 D20 PF5 ADC5
|
||||
// A3 D21 PF4 ADC4
|
||||
// A4 D22 PF1 ADC1
|
||||
// A5 D23 PF0 ADC0
|
||||
//
|
||||
// New pins D14..D17 to map SPI port to digital pins
|
||||
//
|
||||
// MISO D14 PB3 MISO,PCINT3
|
||||
// SCK D15 PB1 SCK,PCINT1
|
||||
// MOSI D16 PB2 MOSI,PCINT2
|
||||
// SS D17 PB0 RXLED,SS/PCINT0
|
||||
//
|
||||
// TXLED D30 PD5 XCK1
|
||||
// RXLED D17 PB0
|
||||
// HWB PE2 HWB
|
||||
|
||||
// these arrays map port names (e.g. port B) to the
|
||||
// appropriate addresses for various functions (e.g. reading
|
||||
// and writing)
|
||||
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
(uint16_t) &DDRE,
|
||||
(uint16_t) &DDRF,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
(uint16_t) &PORTE,
|
||||
(uint16_t) &PORTF,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
(uint16_t) &PINE,
|
||||
(uint16_t) &PINF,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PD, // D0 - PD2
|
||||
PD, // D1 - PD3
|
||||
PD, // D2 - PD1
|
||||
PD, // D3 - PD0
|
||||
PD, // D4 - PD4
|
||||
PC, // D5 - PC6
|
||||
PD, // D6 - PD7
|
||||
PE, // D7 - PE6
|
||||
|
||||
PB, // D8 - PB4
|
||||
PB, // D9 - PB5
|
||||
PB, // D10 - PB6
|
||||
PB, // D11 - PB7
|
||||
PD, // D12 - PD6
|
||||
PC, // D13 - PC7
|
||||
|
||||
PB, // D14 - MISO - PB3
|
||||
PB, // D15 - SCK - PB1
|
||||
PB, // D16 - MOSI - PB2
|
||||
PB, // D17 - SS - PB0
|
||||
|
||||
PF, // D18 - A0 - PF7
|
||||
PF, // D19 - A1 - PF6
|
||||
PF, // D20 - A2 - PF5
|
||||
PF, // D21 - A3 - PF4
|
||||
PF, // D22 - A4 - PF1
|
||||
PF, // D23 - A5 - PF0
|
||||
|
||||
PD, // D24 / D4 - A6 - PD4
|
||||
PD, // D25 / D6 - A7 - PD7
|
||||
PB, // D26 / D8 - A8 - PB4
|
||||
PB, // D27 / D9 - A9 - PB5
|
||||
PB, // D28 / D10 - A10 - PB6
|
||||
PD, // D29 / D12 - A11 - PD6
|
||||
PD, // D30 / TX Led - PD5
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
_BV(2), // D0 - PD2
|
||||
_BV(3), // D1 - PD3
|
||||
_BV(1), // D2 - PD1
|
||||
_BV(0), // D3 - PD0
|
||||
_BV(4), // D4 - PD4
|
||||
_BV(6), // D5 - PC6
|
||||
_BV(7), // D6 - PD7
|
||||
_BV(6), // D7 - PE6
|
||||
|
||||
_BV(4), // D8 - PB4
|
||||
_BV(5), // D9 - PB5
|
||||
_BV(6), // D10 - PB6
|
||||
_BV(7), // D11 - PB7
|
||||
_BV(6), // D12 - PD6
|
||||
_BV(7), // D13 - PC7
|
||||
|
||||
_BV(3), // D14 - MISO - PB3
|
||||
_BV(1), // D15 - SCK - PB1
|
||||
_BV(2), // D16 - MOSI - PB2
|
||||
_BV(0), // D17 - SS - PB0
|
||||
|
||||
_BV(7), // D18 - A0 - PF7
|
||||
_BV(6), // D19 - A1 - PF6
|
||||
_BV(5), // D20 - A2 - PF5
|
||||
_BV(4), // D21 - A3 - PF4
|
||||
_BV(1), // D22 - A4 - PF1
|
||||
_BV(0), // D23 - A5 - PF0
|
||||
|
||||
_BV(4), // D24 / D4 - A6 - PD4
|
||||
_BV(7), // D25 / D6 - A7 - PD7
|
||||
_BV(4), // D26 / D8 - A8 - PB4
|
||||
_BV(5), // D27 / D9 - A9 - PB5
|
||||
_BV(6), // D28 / D10 - A10 - PB6
|
||||
_BV(6), // D29 / D12 - A11 - PD6
|
||||
_BV(5), // D30 / TX Led - PD5
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
TIMER0B, /* 3 */
|
||||
NOT_ON_TIMER,
|
||||
TIMER3A, /* 5 */
|
||||
TIMER4D, /* 6 */
|
||||
NOT_ON_TIMER,
|
||||
|
||||
NOT_ON_TIMER,
|
||||
TIMER1A, /* 9 */
|
||||
TIMER1B, /* 10 */
|
||||
TIMER0A, /* 11 */
|
||||
|
||||
NOT_ON_TIMER,
|
||||
TIMER4A, /* 13 */
|
||||
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM analog_pin_to_channel_PGM[] = {
|
||||
7, // A0 PF7 ADC7
|
||||
6, // A1 PF6 ADC6
|
||||
5, // A2 PF5 ADC5
|
||||
4, // A3 PF4 ADC4
|
||||
1, // A4 PF1 ADC1
|
||||
0, // A5 PF0 ADC0
|
||||
8, // A6 D4 PD4 ADC8
|
||||
10, // A7 D6 PD7 ADC10
|
||||
11, // A8 D8 PB4 ADC11
|
||||
12, // A9 D9 PB5 ADC12
|
||||
13, // A10 D10 PB6 ADC13
|
||||
9 // A11 D12 PD6 ADC9
|
||||
};
|
||||
|
||||
#endif /* ARDUINO_MAIN */
|
||||
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
//
|
||||
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||
//
|
||||
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||
//
|
||||
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||
//
|
||||
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||
// pins are NOT connected to anything by default.
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_USBVIRTUAL Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial1
|
||||
#define SERIAL_PORT_HARDWARE_OPEN Serial1
|
||||
|
||||
// Alias SerialUSB to Serial
|
||||
#define SerialUSB SERIAL_PORT_USBVIRTUAL
|
||||
|
||||
#endif /* Pins_Arduino_h */
|
||||
330
PSNeecore/hardware/avr/1.0.0/variants/micro/pins_arduino.h
Normal file
330
PSNeecore/hardware/avr/1.0.0/variants/micro/pins_arduino.h
Normal file
@ -0,0 +1,330 @@
|
||||
/*
|
||||
pins_arduino.h - Pin definition functions for Arduino
|
||||
Part of Arduino - http://www.arduino.cc/
|
||||
|
||||
Copyright (c) 2007 David A. Mellis
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General
|
||||
Public License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
||||
Boston, MA 02111-1307 USA
|
||||
|
||||
$Id: wiring.h 249 2007-02-03 16:52:51Z mellis $
|
||||
*/
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
// Workaround for wrong definitions in "iom32u4.h".
|
||||
// This should be fixed in the AVR toolchain.
|
||||
#undef UHCON
|
||||
#undef UHINT
|
||||
#undef UHIEN
|
||||
#undef UHADDR
|
||||
#undef UHFNUM
|
||||
#undef UHFNUML
|
||||
#undef UHFNUMH
|
||||
#undef UHFLEN
|
||||
#undef UPINRQX
|
||||
#undef UPINTX
|
||||
#undef UPNUM
|
||||
#undef UPRST
|
||||
#undef UPCONX
|
||||
#undef UPCFG0X
|
||||
#undef UPCFG1X
|
||||
#undef UPSTAX
|
||||
#undef UPCFG2X
|
||||
#undef UPIENX
|
||||
#undef UPDATX
|
||||
#undef TCCR2A
|
||||
#undef WGM20
|
||||
#undef WGM21
|
||||
#undef COM2B0
|
||||
#undef COM2B1
|
||||
#undef COM2A0
|
||||
#undef COM2A1
|
||||
#undef TCCR2B
|
||||
#undef CS20
|
||||
#undef CS21
|
||||
#undef CS22
|
||||
#undef WGM22
|
||||
#undef FOC2B
|
||||
#undef FOC2A
|
||||
#undef TCNT2
|
||||
#undef TCNT2_0
|
||||
#undef TCNT2_1
|
||||
#undef TCNT2_2
|
||||
#undef TCNT2_3
|
||||
#undef TCNT2_4
|
||||
#undef TCNT2_5
|
||||
#undef TCNT2_6
|
||||
#undef TCNT2_7
|
||||
#undef OCR2A
|
||||
#undef OCR2_0
|
||||
#undef OCR2_1
|
||||
#undef OCR2_2
|
||||
#undef OCR2_3
|
||||
#undef OCR2_4
|
||||
#undef OCR2_5
|
||||
#undef OCR2_6
|
||||
#undef OCR2_7
|
||||
#undef OCR2B
|
||||
#undef OCR2_0
|
||||
#undef OCR2_1
|
||||
#undef OCR2_2
|
||||
#undef OCR2_3
|
||||
#undef OCR2_4
|
||||
#undef OCR2_5
|
||||
#undef OCR2_6
|
||||
#undef OCR2_7
|
||||
|
||||
#define NUM_DIGITAL_PINS 31
|
||||
#define NUM_ANALOG_INPUTS 12
|
||||
|
||||
#define TXLED0 0
|
||||
#define TXLED1 0
|
||||
#define RXLED0 0
|
||||
#define RXLED1 0
|
||||
#define TX_RX_LED_INIT 0
|
||||
|
||||
static const uint8_t SDA = 2;
|
||||
static const uint8_t SCL = 3;
|
||||
#define LED_BUILTIN 13
|
||||
|
||||
// Map SPI port to 'new' pins D14..D17
|
||||
static const uint8_t SS = 17;
|
||||
static const uint8_t MOSI = 16;
|
||||
static const uint8_t MISO = 14;
|
||||
static const uint8_t SCK = 15;
|
||||
|
||||
// Mapping of analog pins as digital I/O
|
||||
// A6-A11 share with digital pins
|
||||
static const uint8_t A0 = 18;
|
||||
static const uint8_t A1 = 19;
|
||||
static const uint8_t A2 = 20;
|
||||
static const uint8_t A3 = 21;
|
||||
static const uint8_t A4 = 22;
|
||||
static const uint8_t A5 = 23;
|
||||
static const uint8_t A6 = 24; // D4
|
||||
static const uint8_t A7 = 25; // D6
|
||||
static const uint8_t A8 = 26; // D8
|
||||
static const uint8_t A9 = 27; // D9
|
||||
static const uint8_t A10 = 28; // D10
|
||||
static const uint8_t A11 = 29; // D12
|
||||
|
||||
#define digitalPinToPCICR(p) ((((p) >= 8 && (p) <= 11) || ((p) >= 14 && (p) <= 17) || ((p) >= A8 && (p) <= A10)) ? (&PCICR) : ((uint8_t *)0))
|
||||
#define digitalPinToPCICRbit(p) 0
|
||||
#define digitalPinToPCMSK(p) ((((p) >= 8 && (p) <= 11) || ((p) >= 14 && (p) <= 17) || ((p) >= A8 && (p) <= A10)) ? (&PCMSK0) : ((uint8_t *)0))
|
||||
#define digitalPinToPCMSKbit(p) ( ((p) >= 8 && (p) <= 11) ? (p) - 4 : ((p) == 14 ? 3 : ((p) == 15 ? 1 : ((p) == 16 ? 2 : ((p) == 17 ? 0 : (p - A8 + 4))))))
|
||||
|
||||
// __AVR_ATmega32U4__ has an unusual mapping of pins to channels
|
||||
extern const uint8_t PROGMEM analog_pin_to_channel_PGM[];
|
||||
#define analogPinToChannel(P) ( pgm_read_byte( analog_pin_to_channel_PGM + (P) ) )
|
||||
|
||||
#define digitalPinHasPWM(p) ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11 || (p) == 13)
|
||||
#define digitalPinToInterrupt(p) ((p) == 0 ? 2 : ((p) == 1 ? 3 : ((p) == 2 ? 1 : ((p) == 3 ? 0 : ((p) == 7 ? 4 : NOT_AN_INTERRUPT)))))
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
// On the Arduino board, digital pins are also used
|
||||
// for the analog output (software PWM). Analog input
|
||||
// pins are a separate set.
|
||||
|
||||
// ATMEL ATMEGA32U4 / ARDUINO LEONARDO / Flora
|
||||
//
|
||||
// D0 PD2 RXD1/INT2
|
||||
// D1 PD3 TXD1/INT3
|
||||
// D2 PD1 SDA SDA/INT1
|
||||
// D3# PD0 PWM8/SCL OC0B/SCL/INT0
|
||||
// D4 A6 PD4 ADC8
|
||||
// D5# PC6 ??? OC3A/#OC4A
|
||||
// D6# A7 PD7 FastPWM #OC4D/ADC10
|
||||
// D7 PE6 INT6/AIN0
|
||||
//
|
||||
// D8 A8 PB4 ADC11/PCINT4
|
||||
// D9# A9 PB5 PWM16 OC1A/#OC4B/ADC12/PCINT5
|
||||
// D10# A10 PB6 PWM16 OC1B/0c4B/ADC13/PCINT6
|
||||
// D11# PB7 PWM8/16 0C0A/OC1C/#RTS/PCINT7
|
||||
// D12 A11 PD6 T1/#OC4D/ADC9
|
||||
// D13# PC7 PWM10 CLK0/OC4A
|
||||
//
|
||||
// A0 D18 PF7 ADC7
|
||||
// A1 D19 PF6 ADC6
|
||||
// A2 D20 PF5 ADC5
|
||||
// A3 D21 PF4 ADC4
|
||||
// A4 D22 PF1 ADC1
|
||||
// A5 D23 PF0 ADC0
|
||||
//
|
||||
// New pins D14..D17 to map SPI port to digital pins
|
||||
//
|
||||
// MISO D14 PB3 MISO,PCINT3
|
||||
// SCK D15 PB1 SCK,PCINT1
|
||||
// MOSI D16 PB2 MOSI,PCINT2
|
||||
// SS D17 PB0 RXLED,SS/PCINT0
|
||||
//
|
||||
// TXLED PD5
|
||||
// RXLED PB0
|
||||
// HWB PE2 HWB
|
||||
|
||||
// these arrays map port names (e.g. port B) to the
|
||||
// appropriate addresses for various functions (e.g. reading
|
||||
// and writing)
|
||||
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
(uint16_t) &DDRE,
|
||||
(uint16_t) &DDRF,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
(uint16_t) &PORTE,
|
||||
(uint16_t) &PORTF,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
(uint16_t) &PINE,
|
||||
(uint16_t) &PINF,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[30] = {
|
||||
PD, // D0 - PD2
|
||||
PD, // D1 - PD3
|
||||
PD, // D2 - PD1
|
||||
PD, // D3 - PD0
|
||||
PD, // D4 - PD4
|
||||
PC, // D5 - PC6
|
||||
PD, // D6 - PD7
|
||||
PE, // D7 - PE6
|
||||
|
||||
PB, // D8 - PB4
|
||||
PB, // D9 - PB5
|
||||
PB, // D10 - PB6
|
||||
PB, // D11 - PB7
|
||||
PD, // D12 - PD6
|
||||
PC, // D13 - PC7
|
||||
|
||||
PB, // D14 - MISO - PB3
|
||||
PB, // D15 - SCK - PB1
|
||||
PB, // D16 - MOSI - PB2
|
||||
PB, // D17 - SS - PB0
|
||||
|
||||
PF, // D18 - A0 - PF7
|
||||
PF, // D19 - A1 - PF6
|
||||
PF, // D20 - A2 - PF5
|
||||
PF, // D21 - A3 - PF4
|
||||
PF, // D22 - A4 - PF1
|
||||
PF, // D23 - A5 - PF0
|
||||
|
||||
PD, // D24 / D4 - A6 - PD4
|
||||
PD, // D25 / D6 - A7 - PD7
|
||||
PB, // D26 / D8 - A8 - PB4
|
||||
PB, // D27 / D9 - A9 - PB5
|
||||
PB, // D28 / D10 - A10 - PB6
|
||||
PD, // D29 / D12 - A11 - PD6
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[30] = {
|
||||
_BV(2), // D0 - PD2
|
||||
_BV(3), // D1 - PD3
|
||||
_BV(1), // D2 - PD1
|
||||
_BV(0), // D3 - PD0
|
||||
_BV(4), // D4 - PD4
|
||||
_BV(6), // D5 - PC6
|
||||
_BV(7), // D6 - PD7
|
||||
_BV(6), // D7 - PE6
|
||||
|
||||
_BV(4), // D8 - PB4
|
||||
_BV(5), // D9 - PB5
|
||||
_BV(6), // D10 - PB6
|
||||
_BV(7), // D11 - PB7
|
||||
_BV(6), // D12 - PD6
|
||||
_BV(7), // D13 - PC7
|
||||
|
||||
_BV(3), // D14 - MISO - PB3
|
||||
_BV(1), // D15 - SCK - PB1
|
||||
_BV(2), // D16 - MOSI - PB2
|
||||
_BV(0), // D17 - SS - PB0
|
||||
|
||||
_BV(7), // D18 - A0 - PF7
|
||||
_BV(6), // D19 - A1 - PF6
|
||||
_BV(5), // D20 - A2 - PF5
|
||||
_BV(4), // D21 - A3 - PF4
|
||||
_BV(1), // D22 - A4 - PF1
|
||||
_BV(0), // D23 - A5 - PF0
|
||||
|
||||
_BV(4), // D24 / D4 - A6 - PD4
|
||||
_BV(7), // D25 / D6 - A7 - PD7
|
||||
_BV(4), // D26 / D8 - A8 - PB4
|
||||
_BV(5), // D27 / D9 - A9 - PB5
|
||||
_BV(6), // D28 / D10 - A10 - PB6
|
||||
_BV(6), // D29 / D12 - A11 - PD6
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[16] = {
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
TIMER0B, /* 3 */
|
||||
NOT_ON_TIMER,
|
||||
TIMER3A, /* 5 */
|
||||
TIMER4D, /* 6 */
|
||||
NOT_ON_TIMER,
|
||||
|
||||
NOT_ON_TIMER,
|
||||
TIMER1A, /* 9 */
|
||||
TIMER1B, /* 10 */
|
||||
TIMER0A, /* 11 */
|
||||
|
||||
NOT_ON_TIMER,
|
||||
TIMER4A, /* 13 */
|
||||
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM analog_pin_to_channel_PGM[12] = {
|
||||
7, // A0 PF7 ADC7
|
||||
6, // A1 PF6 ADC6
|
||||
5, // A2 PF5 ADC5
|
||||
4, // A3 PF4 ADC4
|
||||
1, // A4 PF1 ADC1
|
||||
0, // A5 PF0 ADC0
|
||||
8, // A6 D4 PD4 ADC8
|
||||
10, // A7 D6 PD7 ADC10
|
||||
11, // A8 D8 PB4 ADC11
|
||||
12, // A9 D9 PB5 ADC12
|
||||
13, // A10 D10 PB6 ADC13
|
||||
9 // A11 D12 PD6 ADC9
|
||||
};
|
||||
|
||||
#endif /* ARDUINO_MAIN */
|
||||
|
||||
|
||||
|
||||
|
||||
#endif /* Pins_Arduino_h */
|
||||
329
PSNeecore/hardware/avr/1.0.0/variants/pb-variant/pins_arduino.h
Normal file
329
PSNeecore/hardware/avr/1.0.0/variants/pb-variant/pins_arduino.h
Normal file
@ -0,0 +1,329 @@
|
||||
/*
|
||||
pins_arduino.h - Pin definition functions for Arduino
|
||||
Part of Arduino - http://www.arduino.cc/
|
||||
|
||||
Copyright (c) 2007 David A. Mellis
|
||||
ATmega*PB support jan 2018 by MCUdude
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General
|
||||
Public License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
||||
Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
#define MINICORE
|
||||
#define MCUDUDE_MINICORE
|
||||
|
||||
// Digital pins
|
||||
#define NUM_DIGITAL_PINS (27)
|
||||
|
||||
// PWM pins
|
||||
#if defined(__AVR_ATmega48PB__) || defined(__AVR_ATmega88PB__) || defined(__AVR_ATmega168PB__)
|
||||
#define digitalPinHasPWM(p) ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11)
|
||||
#elif defined(__AVR_ATmega328PB__)
|
||||
#define digitalPinHasPWM(p) ((p) == 0 || (p) == 1 || (p) == 2 ||(p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11)
|
||||
#endif
|
||||
|
||||
// Builtin LED
|
||||
#if !defined(LED_BUILTIN)
|
||||
#define LED_BUILTIN (13)
|
||||
#endif
|
||||
static const uint8_t LED = LED_BUILTIN;
|
||||
|
||||
// Analog pins
|
||||
#define PIN_A0 (14)
|
||||
#define PIN_A1 (15)
|
||||
#define PIN_A2 (16)
|
||||
#define PIN_A3 (17)
|
||||
#define PIN_A4 (18)
|
||||
#define PIN_A5 (19)
|
||||
#define PIN_A6 (25)
|
||||
#define PIN_A7 (26)
|
||||
static const uint8_t A0 = PIN_A0;
|
||||
static const uint8_t A1 = PIN_A1;
|
||||
static const uint8_t A2 = PIN_A2;
|
||||
static const uint8_t A3 = PIN_A3;
|
||||
static const uint8_t A4 = PIN_A4;
|
||||
static const uint8_t A5 = PIN_A5;
|
||||
static const uint8_t A6 = PIN_A6;
|
||||
static const uint8_t A7 = PIN_A7;
|
||||
#define NUM_ANALOG_INPUTS (8)
|
||||
#define analogInputToDigitalPin(p) (((p) < 6) ? ((p) + 14) : (((p) < 8) ? ((p) + 19) : -1))
|
||||
#define analogPinToChannel(p) ((p) < NUM_ANALOG_INPUTS ? (p) : ((p) >= 14 && (p) < 25) ? (p) - 14 : ((p) >= 25) ? (p) - 19 : -1)
|
||||
|
||||
// SPI
|
||||
#define PIN_SPI_SS (10)
|
||||
#define PIN_SPI_MOSI (11)
|
||||
#define PIN_SPI_MISO (12)
|
||||
#define PIN_SPI_SCK (13)
|
||||
static const uint8_t SS = PIN_SPI_SS;
|
||||
static const uint8_t MOSI = PIN_SPI_MOSI;
|
||||
static const uint8_t MISO = PIN_SPI_MISO;
|
||||
static const uint8_t SCK = PIN_SPI_SCK;
|
||||
#if defined(__AVR_ATmega328PB__)
|
||||
#define PIN_SPI_SS0 PIN_SPI_SS
|
||||
#define PIN_SPI_MOSI0 PIN_SPI_MOSI
|
||||
#define PIN_SPI_MISO0 PIN_SPI_MISO
|
||||
#define PIN_SPI_SCK0 PIN_SPI_SCK
|
||||
#define PIN_SPI_SS1 (25)
|
||||
#define PIN_SPI_MOSI1 (26)
|
||||
#define PIN_SPI_MISO1 (14)
|
||||
#define PIN_SPI_SCK1 (15)
|
||||
static const uint8_t SS0 = PIN_SPI_SS0;
|
||||
static const uint8_t MOSI0 = PIN_SPI_MOSI0;
|
||||
static const uint8_t MISO0 = PIN_SPI_MISO0;
|
||||
static const uint8_t SCK0 = PIN_SPI_SCK0;
|
||||
static const uint8_t SS1 = PIN_SPI_SS1;
|
||||
static const uint8_t MOSI1 = PIN_SPI_MOSI1;
|
||||
static const uint8_t MISO1 = PIN_SPI_MISO1;
|
||||
static const uint8_t SCK1 = PIN_SPI_SCK1;
|
||||
#endif
|
||||
|
||||
// i2c
|
||||
#define PIN_WIRE_SDA (18)
|
||||
#define PIN_WIRE_SCL (19)
|
||||
static const uint8_t SDA = PIN_WIRE_SDA;
|
||||
static const uint8_t SCL = PIN_WIRE_SCL;
|
||||
#if defined(__AVR_ATmega328PB__)
|
||||
#define WIRE_INTERFACES_COUNT (2)
|
||||
#define PIN_WIRE_SDA0 PIN_WIRE_SDA
|
||||
#define PIN_WIRE_SCL0 PIN_WIRE_SCL
|
||||
#define PIN_WIRE_SDA1 (23)
|
||||
#define PIN_WIRE_SCL1 (24)
|
||||
static const uint8_t SDA0 = PIN_WIRE_SDA0;
|
||||
static const uint8_t SCL0 = PIN_WIRE_SCL0;
|
||||
static const uint8_t SDA1 = PIN_WIRE_SDA1;
|
||||
static const uint8_t SCL1 = PIN_WIRE_SCL1;
|
||||
#endif
|
||||
|
||||
// Interrupts
|
||||
#define EXTERNAL_NUM_INTERRUPTS (2)
|
||||
#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT))
|
||||
|
||||
// PCINT
|
||||
#if defined(__AVR_ATmega48PB__) || defined(__AVR_ATmega88PB__) || defined(__AVR_ATmega168PB__)
|
||||
#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 22) ? (&PCICR) : ((uint8_t *)0))
|
||||
#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 13 || (p) == 20 || (p) == 21) ? 0 : 1))
|
||||
#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13 || (p) == 20 || (p) == 21) ? (&PCMSK0) : (((p) <= 22) ? (&PCMSK1) : ((uint8_t *)0))))
|
||||
#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : (((p) <= 13) ? ((p) - 8) : ((p) <= 21) ? ((p) - 14) : ((p) - 16)))
|
||||
#elif defined(__AVR_ATmega328PB__)
|
||||
#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 26) ? (&PCICR) : ((uint8_t *)0))
|
||||
#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 13 || (p) == 20 || (p) == 21) ? 0 : (((p) <= 22) ? 1 : 3)))
|
||||
#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13 || (p) == 20 || (p) == 21) ? (&PCMSK0) : (((p) <= 22) ? (&PCMSK1) : (((p) <= 26) ? (&PCMSK3) : ((uint8_t *)0)))))
|
||||
#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : (((p) <= 13) ? ((p) - 8) : ((p) <= 21) ? ((p) - 14) : ((p) == 22) ? ((p) - 16) : ((p) - 23)))
|
||||
#endif
|
||||
|
||||
#define PIN_PD0 0
|
||||
#define PIN_PD1 1
|
||||
#define PIN_PD2 2
|
||||
#define PIN_PD3 3
|
||||
#define PIN_PD4 4
|
||||
#define PIN_PD5 5
|
||||
#define PIN_PD6 6
|
||||
#define PIN_PD7 7
|
||||
#define PIN_PB0 8
|
||||
#define PIN_PB1 9
|
||||
#define PIN_PB2 10
|
||||
#define PIN_PB3 11
|
||||
#define PIN_PB4 12
|
||||
#define PIN_PB5 13
|
||||
#define PIN_PC0 14 // A0
|
||||
#define PIN_PC1 15 // A1
|
||||
#define PIN_PC2 16 // A2
|
||||
#define PIN_PC3 17 // A3
|
||||
#define PIN_PC4 18 // A4
|
||||
#define PIN_PC5 19 // A5
|
||||
#define PIN_PB6 20 // XTAL1
|
||||
#define PIN_PB7 21 // XTAL2
|
||||
#define PIN_PC6 22 // RESET
|
||||
#define PIN_PE0 23
|
||||
#define PIN_PE1 24
|
||||
#define PIN_PE2 25 // A6
|
||||
#define PIN_PE3 26 // A7
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
// These arrays map port names (e.g. port B) to the
|
||||
// appropriate addresses for various functions (e.g. reading
|
||||
// and writing)
|
||||
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
(uint16_t) &DDRE,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
(uint16_t) &PORTE,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
(uint16_t) &PINE,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PD, // PD0 - D0
|
||||
PD, // PD1 - D1
|
||||
PD, // PD2 - D2
|
||||
PD, // PD3 - D3
|
||||
PD, // PD4 - D4
|
||||
PD, // PD5 - D5
|
||||
PD, // PD6 - D6
|
||||
PD, // PD7 - D7
|
||||
PB, // PB0 - D8
|
||||
PB, // PB1 - D9
|
||||
PB, // PB2 - D10
|
||||
PB, // PB3 - D11
|
||||
PB, // PB4 - D12
|
||||
PB, // PB5 - D13
|
||||
PC, // PC0 - D14 / A0
|
||||
PC, // PC1 - D15 / A1
|
||||
PC, // PC2 - D16 / A2
|
||||
PC, // PC3 - D17 / A3
|
||||
PC, // PC4 - D18 / A4
|
||||
PC, // PC5 - D19 / A5
|
||||
PB, // PB6 - D20 / XTAL1
|
||||
PB, // PB7 - D21 / XTAL2
|
||||
PC, // PC6 - D22 / RESET
|
||||
PE, // PE0 - D23
|
||||
PE, // PE1 - D24
|
||||
PE, // PE2 - D25 / A6
|
||||
PE, // PE3 - D26 / A7
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
_BV(0), // PD0 - D0
|
||||
_BV(1), // PD1 - D1
|
||||
_BV(2), // PD2 - D2
|
||||
_BV(3), // PD3 - D3
|
||||
_BV(4), // PD4 - D4
|
||||
_BV(5), // PD5 - D5
|
||||
_BV(6), // PD6 - D6
|
||||
_BV(7), // PD7 - D7
|
||||
_BV(0), // PB0 - D8
|
||||
_BV(1), // PB1 - D9
|
||||
_BV(2), // PB2 - D10
|
||||
_BV(3), // PB3 - D11
|
||||
_BV(4), // PB4 - D12
|
||||
_BV(5), // PB5 - D13
|
||||
_BV(0), // PC0 - D14 / A0
|
||||
_BV(1), // PC1 - D15 / A1
|
||||
_BV(2), // PC2 - D16 / A2
|
||||
_BV(3), // PC3 - D17 / A3
|
||||
_BV(4), // PC4 - D18 / A4
|
||||
_BV(5), // PC5 - D19 / A5
|
||||
_BV(6), // PB6 - D20 / XTAL1
|
||||
_BV(7), // PB7 - D21 / XTAL2
|
||||
_BV(6), // PC6 - D22 / RESET
|
||||
_BV(0), // PE0 - D23
|
||||
_BV(1), // PE1 - D24
|
||||
_BV(2), // PE2 - D25 / A6
|
||||
_BV(3), // PE3 - D26 / A7
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
#if defined(__AVR_ATmega48PB__) || defined(__AVR_ATmega88PB__) || defined(__AVR_ATmega168PB__)
|
||||
NOT_ON_TIMER, // PD0 - D0
|
||||
NOT_ON_TIMER, // PD1 - D1
|
||||
NOT_ON_TIMER, // PD2 - D2
|
||||
#elif defined(__AVR_ATmega328PB__)
|
||||
TIMER3A, // PD0 - D0
|
||||
TIMER4A, // PD1 - D1
|
||||
TIMER4B, // PD2 - D2 -> TIMER3B is also an option
|
||||
#endif
|
||||
TIMER2B, // PD3 - D3
|
||||
NOT_ON_TIMER, // PD4 - D4
|
||||
TIMER0B, // PD5 - D5
|
||||
TIMER0A, // PD6 - D6
|
||||
NOT_ON_TIMER, // PD7 - D7
|
||||
NOT_ON_TIMER, // PB0 - D8
|
||||
TIMER1A, // PB1 - D9
|
||||
TIMER1B, // PB2 - D10
|
||||
TIMER2A, // PB3 - D11
|
||||
NOT_ON_TIMER, // PB4 - D12
|
||||
NOT_ON_TIMER, // PB5 - D13
|
||||
NOT_ON_TIMER, // PC0 - D14 / A0
|
||||
NOT_ON_TIMER, // PC1 - D15 / A1
|
||||
NOT_ON_TIMER, // PC2 - D16 / A2
|
||||
NOT_ON_TIMER, // PC3 - D17 / A3
|
||||
NOT_ON_TIMER, // PC4 - D18 / A4
|
||||
NOT_ON_TIMER, // PC5 - D19 / A5
|
||||
NOT_ON_TIMER, // PB6 - D20 / XTAL1
|
||||
NOT_ON_TIMER, // PB7 - D21 / XTAL2
|
||||
NOT_ON_TIMER, // PC6 - D22 / RESET
|
||||
NOT_ON_TIMER, // PE0 - D23
|
||||
NOT_ON_TIMER, // PE1 - D24
|
||||
NOT_ON_TIMER, // PE2 - D25 / A6
|
||||
NOT_ON_TIMER, // PE3 - D26 / A7
|
||||
};
|
||||
|
||||
#endif // ARDUINO_MAIN
|
||||
|
||||
// Make sure the ATmega328PB is backwards compatible with the 328 and 328P
|
||||
#if defined(__AVR_ATmega328PB__)
|
||||
// SPI
|
||||
#define SPCR SPCR0
|
||||
#define SPSR SPSR0
|
||||
#define SPDR SPDR0
|
||||
#define SPI_STC_vect SPI0_STC_vect
|
||||
#define SPI_STC_vect_num SPI0_STC_vect_num
|
||||
// I2C
|
||||
#define TWBR TWBR0
|
||||
#define TWSR TWSR0
|
||||
#define TWAR TWAR0
|
||||
#define TWDR TWDR0
|
||||
#define TWCR TWCR0
|
||||
#define TWAMR TWAMR0
|
||||
#define TWI_vect TWI0_vect
|
||||
#define TWI_vect_num TWI0_vect_num
|
||||
// UART
|
||||
#define USART_RX_vect USART0_RX_vect
|
||||
#define USART_RX_vect_num USART0_RX_vect_num
|
||||
#define USART_UDRE_vect USART0_UDRE_vect
|
||||
#define USART_UDRE_vect_num USART0_UDRE_vect_num
|
||||
#define USART_TX_vect USART0_TX_vect
|
||||
#define USART_TX_vect_num USART0_TX_vect_num
|
||||
#endif // 328PB defs
|
||||
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial
|
||||
#define SERIAL_PORT_HARDWARE_OPEN Serial
|
||||
|
||||
#if defined(__AVR_ATmega328PB__)
|
||||
#define SERIAL_PORT_HARDWARE1 Serial1
|
||||
#define SERIAL_PORT_HARDWARE_OPEN1 Serial1
|
||||
#endif
|
||||
|
||||
#endif // Pins_Arduino_h
|
||||
311
PSNeecore/hardware/avr/1.0.0/variants/standard/pins_arduino.h
Normal file
311
PSNeecore/hardware/avr/1.0.0/variants/standard/pins_arduino.h
Normal file
@ -0,0 +1,311 @@
|
||||
/*
|
||||
pins_arduino.h - Pin definition functions for Arduino
|
||||
Part of Arduino - http://www.arduino.cc/
|
||||
|
||||
Copyright (c) 2007 David A. Mellis
|
||||
Edited july 2016 by MCUdude
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General
|
||||
Public License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
||||
Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
#define MINICORE
|
||||
#define MCUDUDE_MINICORE
|
||||
|
||||
// Definitions to make sure all variants will be supported
|
||||
#if defined(__AVR_ATmega48__)
|
||||
#define __AVR_ATMEGA48A__
|
||||
#define __AVR_ATMEGA48P__
|
||||
#define __AVR_ATMEGA48PA__
|
||||
#elif defined(__AVR_ATmega48A__)
|
||||
#define __AVR_ATMEGA48__
|
||||
#define __AVR_ATMEGA48P__
|
||||
#define __AVR_ATMEGA48PA__
|
||||
#elif defined(__AVR_ATmega48P__)
|
||||
#define __AVR_ATMEGA48__
|
||||
#define __AVR_ATMEGA48A__
|
||||
#define __AVR_ATMEGA48PA__
|
||||
#elif defined(__AVR_ATmega48PA__)
|
||||
#define __AVR_ATMEGA48__
|
||||
#define __AVR_ATMEGA48A__
|
||||
#define __AVR_ATMEGA48P__
|
||||
|
||||
#elif defined(__AVR_ATmega8__)
|
||||
#define __AVR_ATMEGA8A__
|
||||
#elif defined(__AVR_ATmega8A__)
|
||||
#define __AVR_ATMEGA8__
|
||||
|
||||
#elif defined(__AVR_ATmega88__)
|
||||
#define __AVR_ATMEGA88A__
|
||||
#define __AVR_ATMEGA88P__
|
||||
#define __AVR_ATMEGA88PA__
|
||||
#elif defined(__AVR_ATmega88A__)
|
||||
#define __AVR_ATMEGA88__
|
||||
#define __AVR_ATMEGA88P__
|
||||
#define __AVR_ATMEGA88PA__
|
||||
#elif defined(__AVR_ATmega88P__)
|
||||
#define __AVR_ATMEGA88__
|
||||
#define __AVR_ATMEGA88A__
|
||||
#define __AVR_ATMEGA88PA__
|
||||
#elif defined(__AVR_ATmega88PA__)
|
||||
#define __AVR_ATMEGA88__
|
||||
#define __AVR_ATMEGA88A__
|
||||
#define __AVR_ATMEGA88P__
|
||||
|
||||
#elif defined(__AVR_ATmega168__)
|
||||
#define __AVR_ATMEGA168A__
|
||||
#define __AVR_ATMEGA168P__
|
||||
#define __AVR_ATMEGA168PA__
|
||||
#elif defined(__AVR_ATmega168A__)
|
||||
#define __AVR_ATMEGA168__
|
||||
#define __AVR_ATMEGA168P__
|
||||
#define __AVR_ATMEGA168PA__
|
||||
#elif defined(__AVR_ATmega168P__)
|
||||
#define __AVR_ATMEGA168__
|
||||
#define __AVR_ATMEGA168A__
|
||||
#define __AVR_ATMEGA168PA__
|
||||
#elif defined(__AVR_ATmega168PA__)
|
||||
#define __AVR_ATMEGA168__
|
||||
#define __AVR_ATMEGA168A__
|
||||
#define __AVR_ATMEGA168P__
|
||||
#endif
|
||||
|
||||
|
||||
// Digital pins
|
||||
#define NUM_DIGITAL_PINS (23)
|
||||
|
||||
// PWM pins
|
||||
#if defined(__AVR_ATmega8__)
|
||||
#define digitalPinHasPWM(p) ((p) == 9 || (p) == 10 || (p) == 11)
|
||||
#else
|
||||
#define digitalPinHasPWM(p) ((p) == 3 || (p) == 5 || (p) == 6 || (p) == 9 || (p) == 10 || (p) == 11)
|
||||
#endif
|
||||
|
||||
// Builtin LED
|
||||
#if !defined(LED_BUILTIN)
|
||||
#define LED_BUILTIN (13)
|
||||
#endif
|
||||
static const uint8_t LED = LED_BUILTIN;
|
||||
|
||||
// Analog pins
|
||||
#define PIN_A0 (14)
|
||||
#define PIN_A1 (15)
|
||||
#define PIN_A2 (16)
|
||||
#define PIN_A3 (17)
|
||||
#define PIN_A4 (18)
|
||||
#define PIN_A5 (19)
|
||||
#define PIN_A6 (6)
|
||||
#define PIN_A7 (7)
|
||||
static const uint8_t A0 = PIN_A0;
|
||||
static const uint8_t A1 = PIN_A1;
|
||||
static const uint8_t A2 = PIN_A2;
|
||||
static const uint8_t A3 = PIN_A3;
|
||||
static const uint8_t A4 = PIN_A4;
|
||||
static const uint8_t A5 = PIN_A5;
|
||||
static const uint8_t A6 = PIN_A6;
|
||||
static const uint8_t A7 = PIN_A7;
|
||||
#define NUM_ANALOG_INPUTS (8)
|
||||
#define analogInputToDigitalPin(p) ((p < 6) ? (p) + 14 : -1)
|
||||
#define analogPinToChannel(p) ((p) < NUM_ANALOG_INPUTS ? (p) : (p) >= 14 ? (p) - 14 : -1)
|
||||
|
||||
// SPI
|
||||
#define PIN_SPI_SS (10)
|
||||
#define PIN_SPI_MOSI (11)
|
||||
#define PIN_SPI_MISO (12)
|
||||
#define PIN_SPI_SCK (13)
|
||||
static const uint8_t SS = PIN_SPI_SS;
|
||||
static const uint8_t MOSI = PIN_SPI_MOSI;
|
||||
static const uint8_t MISO = PIN_SPI_MISO;
|
||||
static const uint8_t SCK = PIN_SPI_SCK;
|
||||
|
||||
// i2c
|
||||
#define PIN_WIRE_SDA (18)
|
||||
#define PIN_WIRE_SCL (19)
|
||||
static const uint8_t SDA = PIN_WIRE_SDA;
|
||||
static const uint8_t SCL = PIN_WIRE_SCL;
|
||||
|
||||
// Interrupts
|
||||
#define EXTERNAL_NUM_INTERRUPTS (2)
|
||||
#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1 : NOT_AN_INTERRUPT))
|
||||
|
||||
// PCINT
|
||||
#if !defined(__AVR_ATmega8__)
|
||||
#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 22) ? (&PCICR) : ((uint8_t *)0))
|
||||
#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 13) ? 0 : (((p) <= 19) ? 1 : (((p) <= 21) ? 0 : -1))))
|
||||
#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 13) ? (&PCMSK0) : (((p) <= 19) ? (&PCMSK1) : (((p) <= 21) ? (&PCMSK0) : (((p) <= 22) ? (&PCMSK1) : ((uint8_t *)0))))))
|
||||
#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : (((p) <= 13) ? ((p) - 8) : (((p) <= 21) ? ((p) - 14) : (((p) <= 22) ? ((p) - 16) : -1))))
|
||||
#endif
|
||||
|
||||
#define PIN_PD0 0
|
||||
#define PIN_PD1 1
|
||||
#define PIN_PD2 2
|
||||
#define PIN_PD3 3
|
||||
#define PIN_PD4 4
|
||||
#define PIN_PD5 5
|
||||
#define PIN_PD6 6
|
||||
#define PIN_PD7 7
|
||||
#define PIN_PB0 8
|
||||
#define PIN_PB1 9
|
||||
#define PIN_PB2 10
|
||||
#define PIN_PB3 11
|
||||
#define PIN_PB4 12
|
||||
#define PIN_PB5 13
|
||||
#define PIN_PC0 14 // A0
|
||||
#define PIN_PC1 15 // A1
|
||||
#define PIN_PC2 16 // A2
|
||||
#define PIN_PC3 17 // A3
|
||||
#define PIN_PC4 18 // A4
|
||||
#define PIN_PC5 19 // A5
|
||||
#define PIN_PB6 20 // XTAL1
|
||||
#define PIN_PB7 21 // XTAL2
|
||||
#define PIN_PC6 22 // RESET
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
// These arrays map port names (e.g. port B) to the
|
||||
// appropriate addresses for various functions (e.g. reading
|
||||
// and writing)
|
||||
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PD, // PD0 - D0
|
||||
PD, // PD1 - D1
|
||||
PD, // PD2 - D2
|
||||
PD, // PD3 - D3
|
||||
PD, // PD4 - D4
|
||||
PD, // PD5 - D5
|
||||
PD, // PD6 - D6
|
||||
PD, // PD7 - D7
|
||||
PB, // PB0 - D8
|
||||
PB, // PB1 - D9
|
||||
PB, // PB2 - D10
|
||||
PB, // PB3 - D11
|
||||
PB, // PB4 - D12
|
||||
PB, // PB5 - D13
|
||||
PC, // PC0 - D14 / A0
|
||||
PC, // PC1 - D15 / A1
|
||||
PC, // PC2 - D16 / A2
|
||||
PC, // PC3 - D17 / A3
|
||||
PC, // PC4 - D18 / A4
|
||||
PC, // PC5 - D19 / A5
|
||||
PB, // PB6 - D20 / XTAL1
|
||||
PB, // PB7 - D21 / XTAL2
|
||||
PC, // PC6 - D22 / RESET
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
_BV(0), // PD0 - D0
|
||||
_BV(1), // PD1 - D1
|
||||
_BV(2), // PD2 - D2
|
||||
_BV(3), // PD3 - D3
|
||||
_BV(4), // PD4 - D4
|
||||
_BV(5), // PD5 - D5
|
||||
_BV(6), // PD6 - D6
|
||||
_BV(7), // PD7 - D7
|
||||
_BV(0), // PB0 - D8
|
||||
_BV(1), // PB1 - D9
|
||||
_BV(2), // PB2 - D10
|
||||
_BV(3), // PB3 - D11
|
||||
_BV(4), // PB4 - D12
|
||||
_BV(5), // PB5 - D13
|
||||
_BV(0), // PC0 - D14 / A0
|
||||
_BV(1), // PC1 - D15 / A1
|
||||
_BV(2), // PC2 - D16 / A2
|
||||
_BV(3), // PC3 - D17 / A3
|
||||
_BV(4), // PC4 - D18 / A4
|
||||
_BV(5), // PC5 - D19 / A5
|
||||
_BV(6), // PB6 - D20 / XTAL1
|
||||
_BV(7), // PB7 - D21 / XTAL2
|
||||
_BV(6), // PC6 - D22 / RESET
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
NOT_ON_TIMER, /* 0 - port D */
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
#if defined(__AVR_ATmega8__)
|
||||
NOT_ON_TIMER,
|
||||
#else
|
||||
TIMER2B,
|
||||
#endif
|
||||
NOT_ON_TIMER,
|
||||
#if defined(__AVR_ATmega8__)
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
#else
|
||||
TIMER0B,
|
||||
TIMER0A,
|
||||
#endif
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER, /* 8 - port B */
|
||||
TIMER1A,
|
||||
TIMER1B,
|
||||
#if defined(__AVR_ATmega8__)
|
||||
TIMER2,
|
||||
#else
|
||||
TIMER2A,
|
||||
#endif
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER, /* 14 - port C */
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER, // PB6 - D20 / XTAL1
|
||||
NOT_ON_TIMER, // PB7 - D21 / XTAL2
|
||||
NOT_ON_TIMER, // PC6 - D22 / RESET
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
// These serial port names are intended to allow libraries and architecture-neutral
|
||||
// sketches to automatically default to the correct port name for a particular type
|
||||
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||
|
||||
#define SERIAL_PORT_MONITOR Serial
|
||||
#define SERIAL_PORT_HARDWARE Serial
|
||||
#define SERIAL_PORT_HARDWARE_OPEN Serial
|
||||
|
||||
#endif
|
||||
126
PSNeecore/hardware/avr/1.0.0/variants/tiny8/pins_arduino.h
Normal file
126
PSNeecore/hardware/avr/1.0.0/variants/tiny8/pins_arduino.h
Normal file
@ -0,0 +1,126 @@
|
||||
/*
|
||||
pins_arduino.c - pin definitions for the Arduino board
|
||||
Part of Arduino / Wiring Lite
|
||||
|
||||
Copyright (c) 2005 David A. Mellis
|
||||
|
||||
This library is free software; you can redistribute it and/or
|
||||
modify it under the terms of the GNU Lesser General Public
|
||||
License as published by the Free Software Foundation; either
|
||||
version 2.1 of the License, or (at your option) any later version.
|
||||
|
||||
This library is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
Lesser General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU Lesser General
|
||||
Public License along with this library; if not, write to the
|
||||
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
||||
Boston, MA 02111-1307 USA
|
||||
|
||||
$Id: pins_arduino.c 565 2009-03-25 10:50:00Z dmellis $
|
||||
|
||||
Modified 28-08-2009 for attiny84 R.Wiersma
|
||||
Modified 09-10-2009 for attiny45 A.Saporetti
|
||||
*/
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
// ATMEL ATTINY45 / ARDUINO
|
||||
//
|
||||
// +-\/-+
|
||||
// Ain0 (D 5) PB5 1| |8 Vcc
|
||||
// Ain3 (D 3) PB3 2| |7 PB2 (D 2) Ain1
|
||||
// Ain2 (D 4) PB4 3| |6 PB1 (D 1) pwm1
|
||||
// GND 4| |5 PB0 (D 0) pwm0
|
||||
// +----+
|
||||
|
||||
static const uint8_t A0 = 6;
|
||||
static const uint8_t A1 = 7;
|
||||
static const uint8_t A2 = 8;
|
||||
static const uint8_t A3 = 9;
|
||||
|
||||
#define digitalPinToPCICR(p) ( ((p) >= 0 && (p) <= 4) ? (&GIMSK) : ((uint8_t *)0) )
|
||||
#define digitalPinToPCICRbit(p) ( PCIE )
|
||||
#define digitalPinToPCMSK(p) ( ((p) <= 4) ? (&PCMSK) : ((uint8_t *)0) )
|
||||
#define digitalPinToPCMSKbit(p) ( (p) )
|
||||
|
||||
#define analogPinToChannel(p) ( (p) < 6 ? (p) : (p) - 6 )
|
||||
|
||||
#define TCCR1A GTCCR
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
void initVariant()
|
||||
{
|
||||
GTCCR |= (1 << PWM1B);
|
||||
}
|
||||
|
||||
// these arrays map port names (e.g. port B) to the
|
||||
// appropriate addresses for various functions (e.g. reading
|
||||
// and writing) tiny45 only port B
|
||||
const uint16_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRB,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTB,
|
||||
};
|
||||
|
||||
const uint16_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PIN,
|
||||
NOT_A_PIN,
|
||||
(uint16_t) &PINB,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PB, /* 0 */
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB, // 5
|
||||
PB, // A0
|
||||
PB,
|
||||
PB,
|
||||
PB, // A4
|
||||
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
_BV(0), /* 0, port B */
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3), /* 3 port B */
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
_BV(5),
|
||||
_BV(2),
|
||||
_BV(4),
|
||||
_BV(3),
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
TIMER0A, /* OC0A */
|
||||
TIMER0B,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
TIMER1B,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
384
PSNeecore/hardware/avr/1.0.0/variants/tinyx8/pins_arduino.h
Normal file
384
PSNeecore/hardware/avr/1.0.0/variants/tinyx8/pins_arduino.h
Normal file
@ -0,0 +1,384 @@
|
||||
/* pins_arduino.h - Pin definition functions for ATTinyCore
|
||||
Part of ATTinyCore - github.com/SpenceKonde/ATTinyCore
|
||||
Copyright (c) 2015~2021 Spence Konde, (c) 2007 David A. Mellis
|
||||
Free Software - LGPL 2.1, please see LICENCE.md for details */
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
/*===========================================================================
|
||||
* Microchip ATtiny88, ATtiny48
|
||||
*===========================================================================
|
||||
* ATTinyCore Standard Pin Mapping
|
||||
* Similar to Uno et. al. pin mapping, use this unless working with an
|
||||
* MH-ET/MH-Tiny board, which have a different numbering scheme.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#define ATTINYX8 1 // backwards compatibility
|
||||
#define __AVR_ATtinyX8__ // recommended
|
||||
|
||||
#define NUM_DIGITAL_PINS (28)
|
||||
#define NUM_ANALOG_INPUTS (8)
|
||||
|
||||
/* Basic Pin Numbering - PIN_Pxn notation is always recommended
|
||||
* as it is totally unambiguous, but numbers may be used too */
|
||||
#define PIN_PD0 ( 0)
|
||||
#define PIN_PD1 ( 1)
|
||||
#define PIN_PD2 ( 2)
|
||||
#define PIN_PD3 ( 3)
|
||||
#define PIN_PD4 ( 4)
|
||||
#define PIN_PD5 ( 5)
|
||||
#define PIN_PD6 ( 6)
|
||||
#define PIN_PD7 ( 7)
|
||||
#define PIN_PB0 ( 8)
|
||||
#define PIN_PB1 ( 9)
|
||||
#define PIN_PB2 (10)
|
||||
#define PIN_PB3 (11)
|
||||
#define PIN_PB4 (12)
|
||||
#define PIN_PB5 (13)
|
||||
#define PIN_PB6 (14)
|
||||
#define PIN_PB7 (15)
|
||||
#define PIN_PC7 (16)
|
||||
#define PIN_PC0 (17)
|
||||
#define PIN_PC1 (18)
|
||||
#define PIN_PC2 (19)
|
||||
#define PIN_PC3 (20)
|
||||
#define PIN_PC4 (21)
|
||||
#define PIN_PC5 (22)
|
||||
#define PIN_PA0 (23)
|
||||
#define PIN_PA1 (24)
|
||||
#define PIN_PA2 (25)
|
||||
#define PIN_PA3 (26)
|
||||
#define PIN_PC6 (27)
|
||||
|
||||
#ifndef LED_BUILTIN
|
||||
#define LED_BUILTIN (PIN_PB5)
|
||||
#endif
|
||||
|
||||
/* PIN_An is the digital pin with analog channel An on it. */
|
||||
#define PIN_A0 (PIN_PC0)
|
||||
#define PIN_A1 (PIN_PC1)
|
||||
#define PIN_A2 (PIN_PC2)
|
||||
#define PIN_A3 (PIN_PC3)
|
||||
#define PIN_A4 (PIN_PC4)
|
||||
#define PIN_A5 (PIN_PC5)
|
||||
#define PIN_A6 (PIN_PA0)
|
||||
#define PIN_A7 (PIN_PA1)
|
||||
|
||||
/* The "analog pins" of the form An, where n is a number map directly to
|
||||
* analog channels of the same number. Except on Digispark Pro pin mapping.
|
||||
*---------------------------------------------------------------------------*/
|
||||
static const uint8_t A0 = ADC_CH(0);
|
||||
static const uint8_t A1 = ADC_CH(1);
|
||||
static const uint8_t A2 = ADC_CH(2);
|
||||
static const uint8_t A3 = ADC_CH(3);
|
||||
static const uint8_t A4 = ADC_CH(4);
|
||||
static const uint8_t A5 = ADC_CH(5);
|
||||
static const uint8_t A6 = ADC_CH(6);
|
||||
static const uint8_t A7 = ADC_CH(7);
|
||||
|
||||
/* Interrupt macros to go from pin to PCMSK register and bit within it, and
|
||||
* the register to enable/disable banks of PCINTs, and bit within it PCICR
|
||||
* is almost always the same for all PCINTs; but must return null pointer
|
||||
* if the pin is invalid. The PCICRbit and PCMSK are almost always directly
|
||||
* mapped to port; particularly on ugly mappings like this, taking advantage
|
||||
* of this is more efficient and easier to write.
|
||||
* digitalPinToInterrupt gets the number of the "full service" pin interrupt
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#define digitalPinToPCICR(p) (((p) >= 0 && (p) <= 26) ? (&PCICR) : ((uint8_t *)0))
|
||||
#define digitalPinToPCICRbit(p) (((p) <= 7) ? 2 : (((p) <= 15) ? 0 : (((p) <= 22) ? 1 : 3)))
|
||||
#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 15) ? (&PCMSK0) : (((p) <= 22) ? (&PCMSK1) : (((p) <= 26) ? (&PCMSK3) : ((uint8_t *)0)))))
|
||||
#define digitalPinToPCMSKbit(p) (((p) <= 15) ? ((p)& 0x7) : (((p) == 16) ? (7) : (((p) <= 22) ? ((p) - 17) : ((p) - 23))))
|
||||
|
||||
#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p)==3?1: NOT_AN_INTERRUPT))
|
||||
|
||||
/* Analog Channel <-> Digital Pin macros */
|
||||
#define analogInputToDigitalPin(p) (((p) < 8) ? (p) + 17 : -1);
|
||||
#define digitalPinToAnalogInput(p) ((p) >= 16 && (p) <= 22) ? ((p)-17):NOT_A_PIN;
|
||||
|
||||
/* Which pins have PWM? */
|
||||
#define digitalPinHasPWM(p) ((p) == 9 || (p) == 10)
|
||||
|
||||
|
||||
#define PINMAPPING_NORMAL
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Core Configuration where these are not the defaults
|
||||
*---------------------------------------------------------------------------*/
|
||||
// Choosing not to initialise saves flash. 1 = initialise.
|
||||
// #define DEFAULT_INITIALIZE_ADC 1
|
||||
// #define DEFAULT_INITIALIZE_SECONDARY_TIMERS 1
|
||||
|
||||
/* Builtin Software Serial "Serial"
|
||||
* TX is on AIN0, RX is on AIN1. Comparator interrupt used so PCINTs remain
|
||||
* available for other uses. Comparator pins in Analog section below. */
|
||||
#define USE_SOFTWARE_SERIAL 1
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Chip Features - Timers amnd PWM
|
||||
*---------------------------------------------------------------------------
|
||||
* Basic PWM is covered elsewhere, but this lets you look up what pin is on
|
||||
* a given compare channel easily. Used to generate some pinmapping independent
|
||||
* defines for TimerOne library back in Arduino.h
|
||||
*
|
||||
* Functions of timers associated with pins have pins specified by macros of
|
||||
* the form PIN_TIMER_ followed by the function.
|
||||
*
|
||||
* PWM_CHANNEL_REMAPPING is defined and true where the PWM channels from timers
|
||||
* has additional non-standard behavior allowing the remapping of output from
|
||||
* otherwise normal pins (and interfering with naive code that enables them,
|
||||
* though if the code acts only on the timer registers, it will often work if
|
||||
* user code calls analogWrite() on the pin before letting the library use it.
|
||||
* Where this is not the case, it is not defined.
|
||||
*
|
||||
* TIMER0_TYPICAL is 1 if that timer is present, and is an 8-bit timer with or
|
||||
* without two output compare channels. PIN_TIMER_OC0A/OC0B will be defined if
|
||||
* it has them.
|
||||
*
|
||||
* TIMER1_TYPICAL is 1 if that timer is present, and is a 16-bit timer with PWM
|
||||
* as opposed to some bizarro one like the 85 and 861 have.
|
||||
*
|
||||
* TIMER2_TYPICAL is 1 if that timer is present, and is an 8-bit asynch timer,
|
||||
* like on classic ATmega parts. There is only one ATTinyCore part with a
|
||||
* Timer2, and this is false there, because that timer is instead like Timer1.
|
||||
*
|
||||
* We do not provide further macros to characterize the type of a timer in more
|
||||
* detail but the sheer variety of atypical timers on classic AVRs made it hard
|
||||
* to derive a quick test of whether the normal stuff will work.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Timer 0 - 8-bit timer without PWM */
|
||||
#define TIMER0_TYPICAL (1)
|
||||
#define PIN_TIMER_T0 (PIN_PD4)
|
||||
|
||||
/* Timer 1 - 16-bit timer with PWM */
|
||||
#define TIMER1_TYPICAL (1)
|
||||
#define PIN_TIMER_OC1A (PIN_PB1)
|
||||
#define PIN_TIMER_OC1B (PIN_PB2)
|
||||
#define PIN_TIMER_T1 (PIN_PD5)
|
||||
#define PIN_TIMER_ICP1 (PIN_PB0)
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Chip Features (or lack thereof) - Analog stuff
|
||||
*---------------------------------------------------------------------------
|
||||
* Analog reference constants are pre-shifted to their final position in the
|
||||
* registers to avoid leftshifting at runtime, which is surprisingly slow and
|
||||
* wasteful of flash.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#define ADC_REF(x) (x << 6)
|
||||
|
||||
/* Analog reference bit masks. */
|
||||
#define DEFAULT ADC_REF(1)
|
||||
#define INTERNAL1V1 ADC_REF(0)
|
||||
#define INTERNAL INTERNAL1V1 /* deprecated */
|
||||
/* Special Analog Channels */
|
||||
#define ADC_TEMPERATURE ADC_CH(0x08)
|
||||
#define ADC_INTERNAL1V1 ADC_CH(0x0E)
|
||||
#define ADC_GROUND ADC_CH(0x0F)
|
||||
|
||||
/* Not a differential ADC *
|
||||
* single ended channels only */
|
||||
|
||||
/* Analog Comparator - used for soft-serial*/
|
||||
#define ANALOG_COMP_DDR DDRD
|
||||
#define ANALOG_COMP_PORT PORTD
|
||||
#define ANALOG_COMP_PIN PIND
|
||||
#define ANALOG_COMP_AIN0_BIT (6)
|
||||
#define ANALOG_COMP_AIN1_BIT (7)
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Chip Features - SPI, I2C, USART, etc
|
||||
*---------------------------------------------------------------------------*/
|
||||
/* This part has a real SPI module and a real master/slave TWI module
|
||||
* You may not get decent on-chip peripherals, but you can at least effectively
|
||||
* talk to off-chip ones! Seems like it's meant to be a replacement for cost
|
||||
* optimizing designs that don't need any of the expensive features, which
|
||||
* covers a lot of use cases. Reimplementing something to use a USI instead of
|
||||
* a real SPI or TWI interface is not for the faint of heart. Nor really anyone
|
||||
* who isn't a digital masochist - unlike reimplementing things in assembly,
|
||||
* using the USI is never illuminating, but is every bit as annoying.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Hardware SPI */
|
||||
#define SS PIN_PB2
|
||||
#define MOSI PIN_PB3
|
||||
#define MISO PIN_PB4
|
||||
#define SCK PIN_PB5
|
||||
|
||||
/* Hardware TWI */
|
||||
#define SDA PIN_PC4
|
||||
#define SCL PIN_PC5
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* ATMEL ATTINY88/48 ATTinyCore Standard Pin Mapping
|
||||
*
|
||||
* +-\/-+
|
||||
* (27) PC6 1 | |28 PC5 (22)
|
||||
* ( 0) PD0 2 | |27 PC4 (21)
|
||||
* ( 1) PD1 3 | |26 PC3 (20)
|
||||
* ( 2) PD2 4 | |25 PC2 (19)
|
||||
* ( 3) PD3 5 | |24 PC1 (18)
|
||||
* ( 4) PD4 6 | |23 PC0 (17)
|
||||
* VCC 7 | |22 GND
|
||||
* GND 8 | |21 PC7 (16)
|
||||
* (14) PB6 9 | |20 AVCC
|
||||
* (15) PB7 10| |19 PB5 (13)
|
||||
* ( 5) PD5 11| |18 PB4 (12)
|
||||
* ( 6) PD6 12| |17 PB3 (11)
|
||||
* ( 7) PD7 13| |16 PB2 (10) PWM
|
||||
* ( 8) PB0 14| |15 PB1 ( 9) PWM
|
||||
* +----+
|
||||
*
|
||||
*
|
||||
* ( 2) ( 0) (22) (20)
|
||||
* (A5) (A3)
|
||||
* ( 1) (27) (21) (19)
|
||||
* (A4) (A2)
|
||||
* PD2 PD0 PC5 PC3
|
||||
* PD1 PC6 PC4 PC2
|
||||
* 32 30 28 26
|
||||
* 31 29 27 25
|
||||
* ┌ ─ ─ ─ ─ ─ ─ ─ ─ ┐
|
||||
* (3 ) PD3 1 |° | 24 PC1 (18/A1)
|
||||
* (4 ) PD4 2 | | 23 PC0 (17/A0)
|
||||
* (25) PA2 3 | ATtiny88 | 22 PA1 (24/A7)
|
||||
* VCC 4 | | 21 GND
|
||||
* GND 5 | | 20 PC7 (16)
|
||||
* (26) PA3 6 | | 19 PA0 (23/A6)
|
||||
* (14) PB6 7 | | 18 AVCC
|
||||
* (15) PB7 8 | | 17 PB5 (13)
|
||||
* └ ─ ─ ─ ─ ─ ─ ─ ─ ┘
|
||||
* 9 11 13 15
|
||||
* 10 12 14 16
|
||||
* PD5 PD7 PB1 PB3
|
||||
* PD6 PB0 PB2 PB4
|
||||
* ( 5) ( 7) ( 9) (11)
|
||||
* ( 6) ( 8) (10) (12)
|
||||
* PWM
|
||||
* PWM
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
const uint8_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint8_t)(uint16_t) &DDRA,
|
||||
(uint8_t)(uint16_t) &DDRB,
|
||||
(uint8_t)(uint16_t) &DDRC,
|
||||
(uint8_t)(uint16_t) &DDRD,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint8_t)(uint16_t) &PORTA,
|
||||
(uint8_t)(uint16_t) &PORTB,
|
||||
(uint8_t)(uint16_t) &PORTC,
|
||||
(uint8_t)(uint16_t) &PORTD,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint8_t)(uint16_t) &PINA,
|
||||
(uint8_t)(uint16_t) &PINB,
|
||||
(uint8_t)(uint16_t) &PINC,
|
||||
(uint8_t)(uint16_t) &PIND,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PD, /* 0 */
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PB, /* 8 */
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PC, /* 16 */
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PA, /* 23 */
|
||||
PA,
|
||||
PA,
|
||||
PA,
|
||||
PC
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
_BV(0), /* 0, port D */
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
_BV(6),
|
||||
_BV(7),
|
||||
_BV(0), /* 8, port B */
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
_BV(6),
|
||||
_BV(7),
|
||||
_BV(7), /* 16, port C */
|
||||
_BV(0),
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
_BV(0), /* 23, port A */
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(6)
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
NOT_ON_TIMER, /* 0 - port D */
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER, /* 8 - port B */
|
||||
TIMER1A,
|
||||
TIMER1B,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER, /* 16 - port C */
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER, /* 23 - port A */
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
372
PSNeecore/hardware/avr/1.0.0/variants/tinyx8_mh/pins_arduino.h
Normal file
372
PSNeecore/hardware/avr/1.0.0/variants/tinyx8_mh/pins_arduino.h
Normal file
@ -0,0 +1,372 @@
|
||||
/* pins_arduino.h - Pin definition functions for ATTinyCore
|
||||
Part of ATTinyCore - github.com/SpenceKonde/ATTinyCore
|
||||
Copyright (c) 2015~2021 Spence Konde, (c) 2007 David A. Mellis
|
||||
Free Software - LGPL 2.1, please see LICENCE.md for details */
|
||||
|
||||
#ifndef Pins_Arduino_h
|
||||
#define Pins_Arduino_h
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
/*===========================================================================
|
||||
* Microchip ATtiny88, ATtiny48
|
||||
*===========================================================================
|
||||
* MH-ET/MH-Tiny Pin Mapping
|
||||
* The MH-Tiny VUSB board based on the ATtiny88 uses an external 16 MHz clock
|
||||
* (so PB6 is out of the picture as far as I/O goes), numbers the pins up to
|
||||
* that the same way as an Uno or the standard Tiny88 mapping. After that
|
||||
* though, it's very different. Use this pinout if you're using one of those
|
||||
* boards, otherwise use standard.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#define ATTINYX8 1 // backwards compatibility
|
||||
#define __AVR_ATtinyX8__ // recommended
|
||||
|
||||
#define NUM_DIGITAL_PINS (27)
|
||||
#define NUM_ANALOG_INPUTS (8)
|
||||
|
||||
/* Basic Pin Numbering - PIN_Pxn notation is always recommended
|
||||
* as it is totally unambiguous, but numbers may be used too */
|
||||
#define PIN_PD0 ( 0)
|
||||
#define PIN_PD1 ( 1)
|
||||
#define PIN_PD2 ( 2)
|
||||
#define PIN_PD3 ( 3)
|
||||
#define PIN_PD4 ( 4)
|
||||
#define PIN_PD5 ( 5)
|
||||
#define PIN_PD6 ( 6)
|
||||
#define PIN_PD7 ( 7)
|
||||
#define PIN_PB0 ( 8)
|
||||
#define PIN_PB1 ( 9)
|
||||
#define PIN_PB2 (10)
|
||||
#define PIN_PB3 (11)
|
||||
#define PIN_PB4 (12)
|
||||
#define PIN_PB5 (13)
|
||||
// PIN_PB6 is the CLKI pin, which is not available on the MH-Tiny
|
||||
// because they use an external 16 MHz clock.
|
||||
#define PIN_PB7 (14)
|
||||
#define PIN_PA2 (15) /* Wait what? There's a reason */
|
||||
#define PIN_PA3 (16) /* PA0 and PA1 have ADC, and they */
|
||||
#define PIN_PA0 (17) /* wanted to keep the ADC pins together */
|
||||
#define PIN_PA1 (18) /* but also keep the ports together, so */
|
||||
#define PIN_PC0 (19) /* they didn't want to put PORTA after */
|
||||
#define PIN_PC1 (20) /* the first 6 PORTC pins, since PC7 */
|
||||
#define PIN_PC2 (21) /* would then be on the other side of it */
|
||||
#define PIN_PC3 (22)
|
||||
#define PIN_PC4 (23)
|
||||
#define PIN_PC5 (24)
|
||||
#define PIN_PC7 (25)
|
||||
#define PIN_PC6 (26) /* PC6 is reset; convention is to number reset last. */
|
||||
|
||||
/* The t88 removed a Vcc/Gnd pair and the dedicated AREF pin, as compaared to
|
||||
* the mega x8-series, and made the last two ADC channels into real pins
|
||||
* on a new port. The pins that replaced the Vcc/Gnd pair joined those two
|
||||
* in the newly created half-size PORTA, while the AREF pin became the
|
||||
* final bit of PORTC.
|
||||
*/
|
||||
|
||||
#ifndef LED_BUILTIN
|
||||
#define LED_BUILTIN (PIN_PD0)
|
||||
#endif
|
||||
|
||||
/* PIN_An is the digital pin with analog channel An on it. */
|
||||
#define PIN_A0 (PIN_PC0)
|
||||
#define PIN_A1 (PIN_PC1)
|
||||
#define PIN_A2 (PIN_PC2)
|
||||
#define PIN_A3 (PIN_PC3)
|
||||
#define PIN_A4 (PIN_PC4)
|
||||
#define PIN_A5 (PIN_PC5)
|
||||
#define PIN_A6 (PIN_PA0)
|
||||
#define PIN_A7 (PIN_PA1)
|
||||
|
||||
/* An "analog pins" these map directly to analog channels */
|
||||
static const uint8_t A0 = ADC_CH(0);
|
||||
static const uint8_t A1 = ADC_CH(1);
|
||||
static const uint8_t A2 = ADC_CH(2);
|
||||
static const uint8_t A3 = ADC_CH(3);
|
||||
static const uint8_t A4 = ADC_CH(4);
|
||||
static const uint8_t A5 = ADC_CH(5);
|
||||
static const uint8_t A6 = ADC_CH(6);
|
||||
static const uint8_t A7 = ADC_CH(7);
|
||||
|
||||
/* Interrupt macros to go from pin to PCMSK register and bit within it, and
|
||||
* the register to enable/disable banks of PCINTs, and bit within it PCICR
|
||||
* is almost always the same for all PCINTs; but must return null pointer
|
||||
* if the pin is invalid. The PCICRbit and PCMSK are almost always directly
|
||||
* mapped to port; particularly on ugly mappings like this, taking advantage
|
||||
* of this is more efficient and easier to write.
|
||||
* digitalPinToInterrupt gets the number of the "full service" pin interrupt
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
#define digitalPinToPCICR(p) (&PCICR)
|
||||
/* PORTD: PORTB (PB6 is osc, skipped in pin #'s PORTA - numbered PA2, PA3, PA0, PA1 see above note PORTC */
|
||||
#define digitalPinToPCICRbit(p) (((p) <= 7) ? PCIE2 : (((p) <= 14) ? PCIE0 : (((p) <= 18) ? PCIE3 : PCIE1)))
|
||||
#define digitalPinToPCMSK(p) (((p) <= 7) ? (&PCMSK2) : (((p) <= 14) ? (&PCMSK0) : (((p) <= 18) ? (&PCMSK3) : (&PCMSK1))))
|
||||
#define digitalPinToPCMSKbit(p) (((p) <= 7) ? (p) : (((p) <= 13) ? ((p) - 8) : (((p) == 14) ? 7 : (((p) <= 16) ? ((p) - 14) : (((p) <= 18) ? ((p) - 17) : (((p) == 25) ? 7 : ((p) - 19)))))))
|
||||
|
||||
#define digitalPinToInterrupt(p) ((p) == 2 ? 0 : ((p) == 3 ? 1: NOT_AN_INTERRUPT))
|
||||
|
||||
/* Analog Channel <-> Digital Pin macros */
|
||||
#define analogInputToDigitalPin(p) (((p) < 8) ? (((p) < 6) ? (p) + 11 :(p) + 19 ): NOT_A_PIN)
|
||||
#define digitalPinToAnalogInput(p) ((p) < 25 ? (((p) > 18) ? ((p) - 19) : (((p) > 16) ? ((p) - 11) : NOT_A_PIN)) : NOT_A_PIN)
|
||||
/* Which pins have PWM? */
|
||||
#define digitalPinHasPWM(p) ((p) == 9 || (p) == 10)
|
||||
|
||||
#define PINMAPPING_MHTINY
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Core Configuration where these are not the defaults
|
||||
*---------------------------------------------------------------------------*/
|
||||
// Choosing not to initialise saves flash. 1 = initialise.
|
||||
// #define DEFAULT_INITIALIZE_ADC 1
|
||||
// #define DEFAULT_INITIALIZE_SECONDARY_TIMERS 1
|
||||
|
||||
/* Builtin Software Serial "Serial"
|
||||
* TX is on AIN0, RX is on AIN1. Comparator interrupt used so PCINTs remain
|
||||
* available for other uses. Comparator pins in Analog section below. */
|
||||
#define USE_SOFTWARE_SERIAL 1
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Chip Features - Timers amnd PWM
|
||||
*---------------------------------------------------------------------------
|
||||
* Basic PWM is covered elsewhere, but this lets you look up what pin is on
|
||||
* a given compare channel easily. Used to generate some pinmapping independent
|
||||
* defines for TimerOne library back in Arduino.h
|
||||
*
|
||||
* Functions of timers associated with pins have pins specified by macros of
|
||||
* the form PIN_TIMER_ followed by the function.
|
||||
*
|
||||
* PWM_CHANNEL_REMAPPING is defined and true where the PWM channels from timers
|
||||
* has additional non-standard behavior allowing the remapping of output from
|
||||
* otherwise normal pins (and interfering with naive code that enables them,
|
||||
* though if the code acts only on the timer registers, it will often work if
|
||||
* user code calls analogWrite() on the pin before letting the library use it.
|
||||
* Where this is not the case, it is not defined.
|
||||
*
|
||||
* TIMER0_TYPICAL is 1 if that timer is present, and is an 8-bit timer with or
|
||||
* without two output compare channels. PIN_TIMER_OC0A/OC0B will be defined if
|
||||
* it has them.
|
||||
*
|
||||
* TIMER1_TYPICAL is 1 if that timer is present, and is a 16-bit timer with PWM
|
||||
* as opposed to some bizarro one like the 85 and 861 have.
|
||||
*
|
||||
* TIMER2_TYPICAL is 1 if that timer is present, and is an 8-bit asynch timer,
|
||||
* like on classic ATmega parts. There is only one ATTinyCore part with a
|
||||
* Timer2, and this is false there, because that timer is instead like Timer1.
|
||||
*
|
||||
* We do not provide further macros to characterize the type of a timer in more
|
||||
* detail but the sheer variety of atypical timers on classic AVRs made it hard
|
||||
* to derive a quick test of whether the normal stuff will work.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Timer 0 - 8-bit timer without PWM */
|
||||
#define TIMER0_TYPICAL (1)
|
||||
#define PIN_TIMER_T0 (PIN_PD4)
|
||||
|
||||
/* Timer 1 - 16-bit timer with PWM */
|
||||
#define TIMER1_TYPICAL (1)
|
||||
#define PIN_TIMER_OC1A (PIN_PB1)
|
||||
#define PIN_TIMER_OC1B (PIN_PB2)
|
||||
#define PIN_TIMER_T1 (PIN_PD5)
|
||||
#define PIN_TIMER_ICP1 (PIN_PB0)
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Chip Features (or lack thereof) - Analog stuff
|
||||
*---------------------------------------------------------------------------
|
||||
* Analog reference constants are pre-shifted to their final position in the
|
||||
* registers to avoid leftshifting at runtime, which is surprisingly slow and
|
||||
* wasteful of flash.
|
||||
*---------------------------------------------------------------------------*/
|
||||
#define ADC_REF(x) (x << 6)
|
||||
|
||||
/* Analog reference bit masks. */
|
||||
#define DEFAULT ADC_REF(1)
|
||||
#define INTERNAL1V1 ADC_REF(0)
|
||||
#define INTERNAL INTERNAL1V1 /* deprecated */
|
||||
/* Special Analog Channels */
|
||||
#define ADC_TEMPERATURE ADC_CH(0x08)
|
||||
#define ADC_INTERNAL1V1 ADC_CH(0x0E)
|
||||
#define ADC_GROUND ADC_CH(0x0F)
|
||||
|
||||
/* Not a differential ADC */
|
||||
|
||||
/* Analog Comparator - used for soft-serial*/
|
||||
#define ANALOG_COMP_DDR DDRD
|
||||
#define ANALOG_COMP_PORT PORTD
|
||||
#define ANALOG_COMP_PIN PIND
|
||||
#define ANALOG_COMP_AIN0_BIT (6)
|
||||
#define ANALOG_COMP_AIN1_BIT (7)
|
||||
|
||||
/*---------------------------------------------------------------------------
|
||||
* Chip Features - SPI, I2C, USART, etc
|
||||
*---------------------------------------------------------------------------*/
|
||||
/* This part has a real SPI module and a real master/slave TWI module
|
||||
* You may not get decent on-chip peripherals, but you can at least effectively
|
||||
* talk to off-chip ones! Seems like it's meant to be a replacement for cost
|
||||
* optimizing designs that don't need any of the expensive features, which
|
||||
* covers a lot of use cases. Reimplementing something to use a USI instead of
|
||||
* a real SPI or TWI interface is not for the faint of heart. Nor really anyone
|
||||
* who isn't a digital masochist - unlike reimplementing things in assembly,
|
||||
* using the USI is never illuminating, but is every bit as annoying.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
/* Hardware SPI */
|
||||
#define SS PIN_PB2
|
||||
#define MOSI PIN_PB3
|
||||
#define MISO PIN_PB4
|
||||
#define SCK PIN_PB5
|
||||
|
||||
/* Hardware TWI */
|
||||
#define SDA PIN_PC4
|
||||
#define SCL PIN_PC5
|
||||
|
||||
#ifdef ARDUINO_MAIN
|
||||
/*---------------------------------------------------------------------------
|
||||
* ATMEL ATTINY88 MH-ET / MH-Tiny Pin Mapping
|
||||
*
|
||||
* ( 2) ( 0) (24/ (22/
|
||||
* /A5) /A3)
|
||||
* ( 1) (26) (23/ (21/
|
||||
* /RST /A4) /A2)
|
||||
* PD2 PD0 PC5 PC3
|
||||
* PD1 PC6 PC4 PC2
|
||||
* 32 30 28 26
|
||||
* 31 29 27 25
|
||||
* ┌ ─ ─ ─ ─ ─ ─ ─ ─ ┐
|
||||
* ( 3) PD3 1 |° | 24 PC1 (20/A1)
|
||||
* ( 4) PD4 2 | | 23 PC0 (19/A0)
|
||||
* (17) PA2 3 | ATtiny88 | 22 PA1 (16/A7)
|
||||
* VCC 4 | on | 21 GND
|
||||
* GND 5 | "MH-ET" or "MH-tiny" | 20 PC7 (25)
|
||||
* (18) PA3 6 | board | 19 PA0 (15/A6)
|
||||
* CLKIN PB6 7 | | 18 AVCC
|
||||
* (14) PB7 8 | | 17 PB5 (13)
|
||||
* └ ─ ─ ─ ─ ─ ─ ─ ─ ┘
|
||||
* 9 11 13 15
|
||||
* 10 12 14 16
|
||||
* PD5 PD7 PB1 PB3
|
||||
* PD6 PB0 PB2 PB4
|
||||
* ( 5) ( 7) ( 9) (11)
|
||||
* ( 6) ( 8) (10) (12)
|
||||
*
|
||||
* PWM on pins 9 and 10 only.
|
||||
*---------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
const uint8_t PROGMEM port_to_mode_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &DDRA,
|
||||
(uint16_t) &DDRB,
|
||||
(uint16_t) &DDRC,
|
||||
(uint16_t) &DDRD,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM port_to_output_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PORTA,
|
||||
(uint16_t) &PORTB,
|
||||
(uint16_t) &PORTC,
|
||||
(uint16_t) &PORTD,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM port_to_input_PGM[] = {
|
||||
NOT_A_PORT,
|
||||
(uint16_t) &PINA,
|
||||
(uint16_t) &PINB,
|
||||
(uint16_t) &PINC,
|
||||
(uint16_t) &PIND,
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
|
||||
PD, /* 0 */
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PD,
|
||||
PB, /* 8 */
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
PB,
|
||||
// /* no PB6 */
|
||||
PB,
|
||||
PA, /* 15 */
|
||||
PA,
|
||||
PA,
|
||||
PA,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC,
|
||||
PC
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] = {
|
||||
_BV(0), /* 0, port D */
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
_BV(6),
|
||||
_BV(7),
|
||||
_BV(0), /* 8, port B */
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
// /* no PB6 */
|
||||
_BV(7),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(0),
|
||||
_BV(1),
|
||||
_BV(0),
|
||||
_BV(1),
|
||||
_BV(2),
|
||||
_BV(3),
|
||||
_BV(4),
|
||||
_BV(5),
|
||||
_BV(7),
|
||||
_BV(6)
|
||||
};
|
||||
|
||||
const uint8_t PROGMEM digital_pin_to_timer_PGM[] = {
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
TIMER1A,
|
||||
TIMER1B,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER,
|
||||
NOT_ON_TIMER
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
Binary file not shown.
153
README.md
153
README.md
@ -1,153 +0,0 @@
|
||||
# PsNee
|
||||
|
||||
PsNee, an open source stealth modchip for the Sony Playstation 1
|
||||
|
||||
PPPPPPPPPPPPPPPP P P
|
||||
P P PP P
|
||||
P P P P P
|
||||
P P P P P
|
||||
P P P P P
|
||||
P P P P P
|
||||
P P P P P
|
||||
PPPPPPPPPPPPPPPP PPPPPPPPPPP P P P PPPPPPPPPPP PPPPPPPPPPP
|
||||
P P P P P P P
|
||||
P P P P P P P
|
||||
P P P P P P P
|
||||
P P P P P P P
|
||||
P PPPPPPPPPPPPPP P PP PPPPPPP PPPPPPP
|
||||
P P P P P P
|
||||
P P P P P P
|
||||
P P P P P P
|
||||
P P P P P P
|
||||
P P P P P P
|
||||
P P P P P P
|
||||
P PPPPPPPPPPPP P P PPPPPPPPPPP PPPPPPPPPPP
|
||||
|
||||
---------------------------------------
|
||||
This version is from
|
||||
http://www.psxdev.net/forum/viewtopic.php?f=47&t=1262&start=40
|
||||
Is developed by the psxdev team
|
||||
|
||||
|
||||
-------------------------------------------------
|
||||
|
||||
This PsNee version is meant for Arduino boards.
|
||||
|
||||
|
||||
- Arduino Pro Mini @8Mhz and @16Mhz (supported, tested)
|
||||
- Arduino Uno @8Mhz and @16Mhz (supported, tested)
|
||||
|
||||
- Pro Micro @8Mhz and @16Mhz (supported, tested)
|
||||
- Arduino Leonardo @8Mhz and @16Mhz: Should work the same as Pro Micro, but two pins are on the ICSP header (supported, untested)
|
||||
|
||||
- ATtiny85: Should work the same as ATtiny45 (supported, untested)
|
||||
- ATtiny45: LFUSE 0xE2 HFUSE 0xDF > internal oscillator, full 8Mhz speed (supported, tested)
|
||||
- ATtiny25: Should work the same as ATtiny45 but doesn't have enough Flash nor RAM for PSNEEDEBUG (supported, untested)
|
||||
|
||||
---------------------------------------------------------------------------
|
||||
|
||||
Be sure to use the 3.5V / 3.3V PSX power supply, * AND NOT THE 5V! * for your PsNee. (The ps chipset works in 3.3v, and their injected 5v is not good.) The installation pictures include an example.
|
||||
|
||||
-----------------------------------------------------------------------------
|
||||
|
||||
Some extra libraries might be required, depending on the board / chip used.
|
||||
This code defaults to multi-region, meaning it will unlock PAL, NTSC-U and NTSC-J machines.
|
||||
You can optimize boot times for your console further. See "// inject symbols now" in the main loop.
|
||||
|
||||
----------------------------------------------------------------------
|
||||
|
||||
BIOS patch for PM-41
|
||||
|
||||
For now it only supports Arduino boards (ATmega chips).
|
||||
Also, the Arduino must either be powered on first or have no bootloader present (flashed using SPI) since I expect a signal ~1 second after power on.
|
||||
8Mhz boards are also supported.
|
||||
|
||||
-------------------------------------------------------------------
|
||||
|
||||
Choose your hardware!
|
||||
You must uncomment the line that corresponds to your chips.
|
||||
|
||||
2 main branches are available:
|
||||
- ATmega based: easy to use, fast and nice features for development
|
||||
- ATtiny based: fewer features, internal clock has 10% variation
|
||||
|
||||
This code is multi-region, meaning it will unlock PAL, NTSC-U and NTSC-J machines.
|
||||
|
||||
-------------------------------------------------------------------------------------
|
||||
|
||||
pin equivalent tableau
|
||||
|
||||
PSNee name in Arduino board or Attiny PlayStation
|
||||
|
||||
board name Uno Leonardo
|
||||
Nano Micro
|
||||
Mini Pro Micro
|
||||
Pro Mini
|
||||
|
||||
name in code ATTINY_X5 ARDUINO_328_BOARD ARDUINO_32UX_BOARD
|
||||
|
||||
microcontroller ATtiny*5 ATmega328** ATmega32U*
|
||||
ic pin name track name in schematic
|
||||
VCC 5V 5v 3.5V supply
|
||||
debugtx 3
|
||||
gate_wfck 4 9 9 IC732.Pin-5 WFCK
|
||||
data 2 8 8 IC732.Pin-42 CEO
|
||||
pin name subq 1 7 6 IC304.Pin-24 SUBQ
|
||||
sqck 0 6 4 IC304.Pin-26 SQCK
|
||||
BIOS D2 5 3 IC102.Pin-15 D2
|
||||
BIOS A18 4 2 Ic102.Pin-31 A18
|
||||
GND GND GND GND GND
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
## General Info
|
||||
|
||||
### The PlayStation 1 security, how does it work?
|
||||
|
||||
To protect its precious PlayStation from running unauthorized software, Sony implemented a copy protection mechanism based on a simple ASCII string of text that is read from a part of an original PlayStation disc that cannot be reproduced by an ordinary PC CD burner (in theory).
|
||||
|
||||
Basically, a CD is made from a really long spiral of pits and lands that represent the data stored on the disc. Inside the Optical Pickup Unit (OPU), a laser diode emits infrared light that goes through lenses and mirrors, hits the disc, bounces back and shines on a sensor made from at least 4 photodiodes. These photodiodes receive different amounts of light depending on pits and lands' reflectivity allowing to recover the data but they are also used to perform self-adjustment to keep the track aligned and in focus.
|
||||
This is done by comparing photodiodes outputs in a way to create the Tracking Error (TE) and Focus Error (FE) signals and then send them to the CD controller to move the lens head horizontally for the tracking and vertically for the focus.
|
||||
|
||||
On a CD-ROM (read-only disc pressed inside a CD factory), the spiral is a simple rolled up line. However, on a blank CD-R, the spiral i.e. the pregroove is wobbling on all over the disc and the CD controller follows it. This wobble picked up by the TE signal actually carries data known as the Absolute Time In Pregroove (ATIP) and is frequency-modulated at 22kHz (1x read speed). The ATIP contains information about the disc characteristics and time codes but is useful only for burning.
|
||||
|
||||
Now, what is the relation between these explanations and the PlayStation security?
|
||||
|
||||
As CD-ROMs do not have the wobble nor the ATIP, Sony engineers surely thought:
|
||||
|
||||
Why not reuse the wobble that burners can't reproduce to encode some sort of information that will provide copy protection?
|
||||
|
||||
And that's what they did! In the lead-in area of a PlayStation disc (negative sectors), the spiral is wobbling at the same 22kHz carrier frequency like a CD-R but instead of storing the ATIP, they stored a 250bps amplitude-modulated serial bitstream also known as SCEx signal (with 1 start bit and 2 stop bits) that repeats until sector 0 (end of lead-in).
|
||||
|
||||
The important thing to understand is the bitstream is not part of the game data which is encoded using pits and lands' length. Instead, it is made by slightly shifting the track i.e. pits and lands' position in a sinusoidal way. The self-adjusting system simply follows this wobbling track creating a modulated TE signal that needs to be demodulated using a 22kHz filter. Then, it goes to the PlayStation sub-CPU for decoding.
|
||||
|
||||
The bitstream in plain ASCII says "SCEA" (Sony Computer Entertainment of America), "SCEE" (Sony Computer Entertainment of Europe) or "SCEI" (Sony Computer Entertainment Inc. (i.e. Japan)), depending on the region of the disc.
|
||||
The security thus functions not only as copy protection, but also as region protection.
|
||||
|
||||
The text string from the disc is compared with the one that is embedded in the PlayStation sub-CPU. If these text strings are the same, the disc is interpreted to be authentic and from the correct region. Bingo!
|
||||
|
||||
### The master branch is completely redesigned!
|
||||
|
||||
The original code doesn't have a mechanism to turn the injections off. It bases everything on a timer.
|
||||
After power on, it will start sending injections for some time, then turns off.
|
||||
It also doesn't know when it's required to turn on again (except for after a reset), so it gets detected by anti-mod games.
|
||||
|
||||
### The mechanism to know when to inject and when to turn it off.
|
||||
|
||||
This is the 2 wires for SUBQ / SQCK. The PSX transmits the current subchannel Q data on this bus. It tells the console where on the disc the read head is. We know that the protection symbols only exist on the earliest sectors, and that anti-mod games exploit this by looking for the symbols elsewhere on the disk. If they get those symbols, a modchip must be generating them!
|
||||
|
||||
So with that information, my code knows when the PSX wants to see the unlock symbols, and when it's "fake" / anti-mod. The chip is continously looking at that subcode bus, so you don't need the reset wire or any other timing hints that other modchips use. That makes it compatible and fully functional with all revisions of the PSX, not just the later ones. Also with this method, the chip knows more about the current CD. This allows it to not send unlock symbols for a music CD, which means the BIOS starts right into the CD player, instead of after a long delay with other modchips.
|
||||
|
||||
This has some drawbacks, though:
|
||||
* It's more logic / code. More things to go wrong. The testing done so far suggests it's working fine though.
|
||||
* It's not a good example anymore to demonstrate PSX security, and how modchips work in general.
|
||||
BIN
images/Nano.png
Normal file
BIN
images/Nano.png
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|
After Width: | Height: | Size: 3.7 MiB |
BIN
images/PSNee_V8_logo.png
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images/PSNee_V8_logo.png
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|
After Width: | Height: | Size: 757 KiB |
BIN
images/PSNee_V8_pinout.png
Normal file
BIN
images/PSNee_V8_pinout.png
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|
After Width: | Height: | Size: 112 KiB |
BIN
images/console.png
Normal file
BIN
images/console.png
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|
After Width: | Height: | Size: 132 KiB |
BIN
images/example.png
Normal file
BIN
images/example.png
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Binary file not shown.
|
After Width: | Height: | Size: 6.6 KiB |
BIN
images/model_tested.png
Normal file
BIN
images/model_tested.png
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|
After Width: | Height: | Size: 39 KiB |
Loading…
x
Reference in New Issue
Block a user