From c9b76ed3253623cae2e03e00a09003f504e988d4 Mon Sep 17 00:00:00 2001 From: kalymos Date: Fri, 20 Feb 2026 21:45:08 +0100 Subject: [PATCH] BIOS patche neo SCPH-3000 SCPH-1000 I finally completed the value conversion for the BIOS patch without IRS --- PSNee/BIOS_patching.h | 77 ++++++++++++++++++++++++++++++++++++------- PSNee/PSNee.ino | 4 +-- PSNee/settings.h | 63 +++++++++++++++++++++++++++-------- 3 files changed, 117 insertions(+), 27 deletions(-) diff --git a/PSNee/BIOS_patching.h b/PSNee/BIOS_patching.h index ff1914a..6b87ec2 100644 --- a/PSNee/BIOS_patching.h +++ b/PSNee/BIOS_patching.h @@ -110,18 +110,20 @@ _delay_ms(BOOT_OFFSET); PIN_LED_ON; + while (! PIN_AX_READ); _delay_us(BIT_OFFSET); - + PIN_DX_SET; PIN_DX_OUTPUT; // Force line (Low/High-Z override) - _delay_us(OVERRIDE); + _delay_us(OVERRIDE); + PIN_DX_CLEAR; PIN_DX_INPUT; // Release bus immediately PIN_LED_OFF; sei(); // Restore global interrupts - while (patch_done != 1); + PIN_LED_OFF; - while (PIN_AY_READ != 0); + _delay_ms(FOLLOWUP_OFFSET); @@ -132,7 +134,56 @@ } #endif - + +#ifdef HIGH_PATCH_B + + + + + void Bios_Patching(){ + PIN_DX_INPUT; + cli(); // Disable interrupts for timing integrity + + if (PIN_AX_READ != 0) + { + while (PIN_AX_READ != 0); + while (PIN_AX_READ == 0); + } + else + { + while (PIN_AX_READ == 0); + } + + + _delay_ms(BOOT_OFFSET); + //PIN_LED_ON; + while (! PIN_AX_READ); + _delay_us(BIT_OFFSET); + PIN_DX_SET; + PIN_DX_OUTPUT; // Force line (Low/High-Z override) + _delay_us(OVERRIDE); + PIN_DX_CLEAR; + PIN_DX_INPUT; // Release bus immediately + PIN_LED_OFF; + sei(); // Restore global interrupts + + + + //PIN_LED_OFF; + PIN_LED_ON; + while (PIN_AY_READ != 0); + _delay_ms(FOLLOWUP_OFFSET); + + while (PIN_AY_READ); + _delay_us (BIT_OFFSET_2); + PIN_DX_OUTPUT; + _delay_us (OVERRIDE_2); + PIN_DX_INPUT; + PIN_LED_OFF; + + } + + #endif #ifdef INTERRUPT_RISING_HIGH_PATCH @@ -181,22 +232,24 @@ _delay_ms(BOOT_OFFSET); - PIN_LED_ON; + PIN_AX_INTERRUPT_RISING; PIN_AX_INTERRUPT_ENABLE; - + while (patch_done != 1); - PIN_LED_OFF; - while (PIN_AY_READ != 0); + + while (PIN_AY_READ != 0); + _delay_ms(FOLLOWUP_OFFSET); - + PIN_LED_ON; PIN_AY_INTERRUPT_RISING; - PIN_AY_INTERRUPT_ENABLE; + PIN_AY_INTERRUPT_ENABLE; + while (patch_done != 2); - +PIN_LED_OFF; } #endif diff --git a/PSNee/PSNee.ino b/PSNee/PSNee.ino index 63a4c8c..3435401 100644 --- a/PSNee/PSNee.ino +++ b/PSNee/PSNee.ino @@ -50,8 +50,8 @@ XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX //#define SCPH_5500 // DX - D0 | AX - A5 | | 3.0j - CRC FF3EEB8C //#define SCPH_5000 // DX - D0 | AX - A5 | AX - A4 | 2.2j - CRC 24FC7E17 //#define SCPH_3500 // DX - D0 | AX - A5 | AX - A4 | 2.1j - CRC BC190209 -#define SCPH_3000 // DX - D5 | AX - A7, AY - A8 | AX - A6, AY - A7 | 1.1j - CRC 3539DEF6 -//#define SCPH_1000 // DX - D5 | AX - A7, AY - A8 | AX - A6, AY - A7 | 1.0j - CRC 3B601FC8 +//#define SCPH_3000 // DX - D5 | AX - A7, AY - A8 | AX - A6, AY - A7 | 1.1j - CRC 3539DEF6 +#define SCPH_1000 // DX - D5 | AX - A7, AY - A8 | AX - A6, AY - A7 | 1.0j - CRC 3B601FC8 /*------------------------------------------------------------------------------------------------ Options diff --git a/PSNee/settings.h b/PSNee/settings.h index daec0ea..a984432 100644 --- a/PSNee/settings.h +++ b/PSNee/settings.h @@ -105,7 +105,7 @@ // #define BIOS_PATCH // #define HIGH_PATCH_A // #define BOOT_OFFSET 82.9 //82.65 - 83.26 -// #define BIT_OFFSET 278.65 +// #define BIT_OFFSET 283.25 // #define OVERRIDE 0.15 // #define HIGH_PATCH // #define FOLLOWUP_OFFSET 253.3 @@ -116,29 +116,66 @@ #ifdef SCPH_3000 #define BIOS_PATCH -#define INTERRUPT_RISING_HIGH_PATCH -#define BOOT_OFFSET 82.9 //82.65 - 83.26 -#define PULSE_COUNT 60 -#define BIT_OFFSET 2.7 //2.58 - 2.8 +#define HIGH_PATCH_B +#define BOOT_OFFSET 82.9 //82.65 - 83.26 +#define BIT_OFFSET 283.25 #define OVERRIDE 0.15 #define HIGH_PATCH -#define FOLLOWUP_OFFSET 253.3 -#define PULSE_COUNT_2 43 -#define BIT_OFFSET_2 2.88 +#define FOLLOWUP_OFFSET 253.3 +#define BIT_OFFSET_2 201.8 #define OVERRIDE_2 0.15 #endif +// #ifdef SCPH_3000 +// #define BIOS_PATCH +// #define INTERRUPT_RISING_HIGH_PATCH +// #define BOOT_OFFSET 82.9 //82.65 - 83.26 +// #define PULSE_COUNT 60 +// #define BIT_OFFSET 2.7 //2.58 - 2.8 +// #define OVERRIDE 0.15 +// #define HIGH_PATCH +// #define FOLLOWUP_OFFSET 253.3 +// #define PULSE_COUNT_2 43 +// #define BIT_OFFSET_2 2.88 +// #define OVERRIDE_2 0.15 +// #endif + +// #ifdef SCPH_1000 +// #define BIOS_PATCH +// #define INTERRUPT_RISING_HIGH_PATCH +// #define BOOT_OFFSET 82.9 // 82.63 - 83.26 +// #define PULSE_COUNT 92 +// #define BIT_OFFSET 2.65 // 2.58 - 2.75 +// #define OVERRIDE 0.15 +// #define HIGH_PATCH +// #define FOLLOWUP_OFFSET 272.8 +// #define PULSE_COUNT_2 71 +// #define BIT_OFFSET_2 2.88 +// #define OVERRIDE_2 0.15 +// #endif + +// #ifdef SCPH_1000 +// #define BIOS_PATCH +// #define HIGH_PATCH_A +// #define BOOT_OFFSET 82.9 // 82.63 - 83.26 +// #define BIT_OFFSET 437.1 // 2.58 - 2.75 +// #define OVERRIDE 0.15 +// #define HIGH_PATCH +// #define FOLLOWUP_OFFSET 272.8 +// #define PULSE_COUNT_2 71 +// #define BIT_OFFSET_2 2.88 +// #define OVERRIDE_2 0.15 +// #endif + #ifdef SCPH_1000 #define BIOS_PATCH -#define INTERRUPT_RISING_HIGH_PATCH +#define HIGH_PATCH_B #define BOOT_OFFSET 82.9 // 82.63 - 83.26 -#define PULSE_COUNT 92 -#define BIT_OFFSET 2.65 // 2.58 - 2.75 +#define BIT_OFFSET 437.1 // 2.58 - 2.75 #define OVERRIDE 0.15 #define HIGH_PATCH #define FOLLOWUP_OFFSET 272.8 -#define PULSE_COUNT_2 71 -#define BIT_OFFSET_2 2.88 +#define BIT_OFFSET_2 336.05 #define OVERRIDE_2 0.15 #endif