diff --git a/pli/ide/pli_ide.c b/pli/ide/pli_ide.c index f30222e..bcf4baf 100644 --- a/pli/ide/pli_ide.c +++ b/pli/ide/pli_ide.c @@ -44,7 +44,7 @@ static struct state_s { int fifo_rd; int fifo_wr; int fifo_depth; - unsigned short fifo[256 * 64]; + unsigned short fifo[256 * 128]; int file_inited; int file_fd; @@ -120,7 +120,7 @@ do_ide_read(struct state_s *s) ((s->reg_cyllow & 0xff) << 8) | (s->reg_secnum & 0xff); - vpi_printf("pli_ide: lba %08x (%d), seccnt %d\n", + vpi_printf("pli_ide: lba %08x (%d), seccnt %d (read)\n", s->lba, s->lba*512,s->reg_seccnt); ret = lseek(s->file_fd, (off_t)s->lba*512, SEEK_SET); @@ -135,6 +135,40 @@ do_ide_read(struct state_s *s) s->status = (1<lba = + ((s->reg_drvhead & 0x0f) << 24) | + ((s->reg_cylhigh & 0xff) << 16) | + ((s->reg_cyllow & 0xff) << 8) | + (s->reg_secnum & 0xff); + + vpi_printf("pli_ide: write prep\n"); + + s->fifo_depth = (512 * s->reg_seccnt) / 2; + s->fifo_rd = 0; + s->fifo_wr = 0; + + s->status = (1<lba, s->lba*512, s->reg_seccnt); + + ret = lseek(s->file_fd, (off_t)s->lba*512, SEEK_SET); + ret = write(s->file_fd, (char *)s->fifo, 512 * s->reg_seccnt); + if (ret < 0) + perror("write"); + + s->status = (1<fifo[s->fifo_wr] = bus; + + if (0) vpi_printf("pli_ide: write data [%d/%d] %o\n", + s->fifo_wr, s->fifo_depth, bus); + + if (s->fifo_wr < s->fifo_depth) + s->fifo_wr++; + + if (s->fifo_wr >= s->fifo_depth) { + do_ide_write_done(s); + } break; case ATA_COMMAND: - vpi_printf("pli_ide: command %04x %s\n", bus, bus_bits); + vpi_printf("pli_ide: command %04x\n", bus); switch (bus) { case 0x0020: vpi_printf("pli_ide: XXX READ\n"); @@ -292,6 +336,7 @@ PLI_INT32 pli_ide(void) break; case 0x0030: vpi_printf("pli_ide: XXX WRITE\n"); + do_ide_write(s); break; } break; diff --git a/pli/rf/pli_ram.c b/pli/rf/pli_ram.c index 554e929..d9e507e 100644 --- a/pli/rf/pli_ram.c +++ b/pli/rf/pli_ram.c @@ -21,16 +21,21 @@ typedef unsigned short u16; -static char last_ce_bit; -static char last_we_bit; +static char last_rd_bit; +static char last_wr_bit; static unsigned last_addr; +static int rom_enabled; +static int rom_disabling; static vpiHandle do_aref; static int mem_init; u16 *M; +/* static char *instnam_tab[10]; static int last_evh; +*/ +extern int running_cver; void do_mem_preload(char *fn) { @@ -51,7 +56,7 @@ void do_mem_init(void) vpi_printf("pli_ram: allocate memory array\n"); - M = (u16 *)malloc(1024*32); + M = (u16 *)malloc(1024*32*2); mem_init = 1; for (i = 0; i < 32768; i++) @@ -60,6 +65,7 @@ void do_mem_init(void) if (0) do_mem_preload("test1.mem"); } +#if 0 static int getadd_inst_id(vpiHandle mhref) { register int i; @@ -80,21 +86,24 @@ static int getadd_inst_id(vpiHandle mhref) return(last_evh); } +#endif PLI_INT32 pli_ram(void) { - vpiHandle href, iter, mhref; - vpiHandle clkref, resetref, aref, diref, doref, ceref, weref; + vpiHandle href, iter/*, mhref*/; + vpiHandle resetref, aref, diref, doref, rdref, wrref; s_vpi_value tmpval, outval; int numargs, inst_id; - char clk_bit, reset_bit; + char reset_bit; char di_bits[17], do_bits[17]; - char ce_bit, we_bit; + char rd_bit, wr_bit; unsigned int a, datai; int read_start, read_stop, write_start, write_stop, addr_change; + if (0) vpi_printf("pli_ram: entry\n"); + if (M == 0/*!mem_init*/) { do_mem_init(); } @@ -125,35 +134,31 @@ PLI_INT32 pli_ram(void) numargs = vpi_get(vpiSize, iter); - /* clk, reset, a, di, do, ce, we */ - clkref = vpi_scan(iter); + /* reset, a, di, do, rd, wr */ resetref = vpi_scan(iter); aref = vpi_scan(iter); diref = vpi_scan(iter); doref = vpi_scan(iter); - ceref = vpi_scan(iter); - weref = vpi_scan(iter); + rdref = vpi_scan(iter); + wrref = vpi_scan(iter); - vpi_free_object(iter); +// vpi_free_object(iter); vpi_free_object(href); - if (clkref == NULL || resetref == NULL || aref == NULL || - diref == NULL || doref == NULL || ceref == NULL || - weref == NULL) + if (resetref == NULL || aref == NULL || + diref == NULL || doref == NULL || rdref == NULL || + wrref == NULL) { vpi_printf("**ERR: $pli_ram bad args\n"); return(0); } /* */ - tmpval.format = vpiBinStrVal; - vpi_get_value(clkref, &tmpval); - clk_bit = tmpval.value.str[0]; - tmpval.format = vpiBinStrVal; vpi_get_value(resetref, &tmpval); reset_bit = tmpval.value.str[0]; + memset(&tmpval, 0, sizeof(tmpval)); tmpval.format = vpiIntVal; vpi_get_value(aref, &tmpval); a = tmpval.value.integer; @@ -170,13 +175,15 @@ PLI_INT32 pli_ram(void) vpi_get_value(doref, &tmpval); strcpy(do_bits, tmpval.value.str); + memset(&tmpval, 0, sizeof(tmpval)); tmpval.format = vpiBinStrVal; - vpi_get_value(ceref, &tmpval); - ce_bit = tmpval.value.str[0]; + vpi_get_value(rdref, &tmpval); + rd_bit = tmpval.value.str[0]; + memset(&tmpval, 0, sizeof(tmpval)); tmpval.format = vpiBinStrVal; - vpi_get_value(weref, &tmpval); - we_bit = tmpval.value.str[0]; + vpi_get_value(wrref, &tmpval); + wr_bit = tmpval.value.str[0]; /* */ read_start = 0; @@ -188,23 +195,27 @@ PLI_INT32 pli_ram(void) if (a != last_addr) addr_change = 1; - if (we_bit != last_we_bit || addr_change) { - if (we_bit == '0') write_start = 1; - if (we_bit == '1') write_stop = 1; + if (wr_bit != last_wr_bit || addr_change) { + if (wr_bit == '1') write_start = 1; + if (wr_bit == '0') write_stop = 1; } - if (ce_bit != last_ce_bit || write_stop || addr_change) { - if (ce_bit == '0') read_start = 1; - if (ce_bit == '1') read_stop = 1; + if (rd_bit != last_rd_bit || write_stop || addr_change) { + if (rd_bit == '1') read_start = 1; + if (rd_bit == '0') read_stop = 1; } - last_ce_bit = ce_bit; - last_we_bit = we_bit; + last_rd_bit = rd_bit; + last_wr_bit = wr_bit; last_addr = a; - if (0) vpi_printf("pli_ram: clk %c ce %c we %c\n", clk_bit, ce_bit, we_bit); + if (0) vpi_printf("pli_ram: rd %c wr %c\n", rd_bit, wr_bit); - if (reset_bit == '1') vpi_printf("pli_ram: reset\n"); + if (reset_bit == '1') { + vpi_printf("pli_ram: reset\n"); + rom_enabled = 1; + rom_disabling = 0; + } if (0) { if (read_start) vpi_printf("pli_ram: read start\n"); @@ -215,10 +226,10 @@ PLI_INT32 pli_ram(void) /* */ if (write_start) { - //vpi_printf("pli_ram: write %o <- %o\n", a, datai); + if (1) vpi_printf("pli_ram: write %o <- %o\n", a, datai); if (a > 1024*1024) { - vpi_printf("pli_ram: write, address error %x\n", a); + vpi_printf("pli_ram: write, address error %o\n", a); while (1); } @@ -233,16 +244,57 @@ PLI_INT32 pli_ram(void) while (1); } - value = M[a]; +#if 1 + if (rom_enabled) { + switch (a) { + // copy tss8 bootstrap to ram and jump to it + // (see ../rom/rom.pal) + case 07400: value = 07240; break; + case 07401: value = 01224; break; + case 07402: value = 03010; break; + case 07403: value = 01217; break; + case 07404: value = 03410; break; + case 07405: value = 01220; break; + case 07406: value = 03410; break; + case 07407: value = 01221; break; + case 07410: value = 03410; break; + case 07411: value = 01222; break; + case 07412: value = 03410; break; + case 07413: value = 01223; break; + case 07414: value = 03410; break; + case 07415: value = 07300; break; + case 07416: value = 05624; break; + case 07417: value = 07600; break; + case 07420: value = 06603; break; + case 07421: value = 06622; break; + case 07422: value = 05352; break; + case 07423: value = 05752; break; + case 07424: value = 07750; break; + default: value = M[a]; break; + } - //vpi_printf("pli_ram: read %o -> %o\n", a, value); + if (a == 07416) + rom_disabling = 1; -#ifdef __CVER__ - if (do_aref == 0) - do_aref = vpi_put_value(doref, NULL, NULL, vpiAddDriver); -#else - do_aref = doref; + if (rom_disabling) + rom_disabling++; + + if (rom_disabling == 3) { + rom_enabled = 0; + } + } else #endif + { + value = M[a]; + } + + if (1) vpi_printf("pli_ram: read %o -> %o\n", a, value); + +// if (running_cver) { +// if (do_aref == 0) +// do_aref = vpi_put_value(doref, NULL, NULL, vpiAddDriver); +// } else + do_aref = doref; outval.format = vpiIntVal; outval.value.integer = value; @@ -250,23 +302,27 @@ PLI_INT32 pli_ram(void) vpi_put_value(do_aref, &outval, NULL, vpiNoDelay); } - if (read_stop) { - outval.format = vpiBinStrVal; -// outval.value.str = "16'bzzzzzzzzzzzzzzzz"; - outval.value.str = "16'b0000000000000000"; - if (do_aref) - vpi_put_value(do_aref, &outval, NULL, vpiNoDelay); - } +// if (read_stop) { +// outval.format = vpiBinStrVal; +// outval.value.str = "16'b0000000000000000"; +// if (do_aref) +// vpi_put_value(do_aref, &outval, NULL, vpiNoDelay); +// } - vpi_free_object(clkref); +#if 0 vpi_free_object(resetref); vpi_free_object(aref); vpi_free_object(diref); vpi_free_object(doref); - vpi_free_object(ceref); - vpi_free_object(weref); + vpi_free_object(rdref); + vpi_free_object(wrref); +#endif - return(0); + vpi_free_object(iter); + + if (0) vpi_printf("pli_ram: exit\n"); + + return 0; } diff --git a/pli/rf/pli_rf.c b/pli/rf/pli_rf.c index a042a29..9a4f147 100644 --- a/pli/rf/pli_rf.c +++ b/pli/rf/pli_rf.c @@ -28,110 +28,47 @@ #include "veriuser.h" #endif -#define USE_DMA - -//typedef int int32; typedef unsigned short u16; typedef unsigned int u22; extern PLI_INT32 pli_ram(void); -PLI_INT32 pli_rk(void); +PLI_INT32 pli_rf(void); -static char *instnam_tab[10]; +/* +static char *instnam_tab[10]; static int last_evh; +*/ +int running_cver; -static char last_iopr_bit; -static char last_iopw_bit; -static char last_dma_ack_bit; +static char last_iot_bit; +static char last_clk_bit; -static int io_rk_debug = 0; -static int rk_debug = 0; +static int io_rf_debug = 0; +static int rf_debug = 0; -static struct rk_context_s { - u16 rkds; - u16 rkcs; - u16 rkda; - u16 rkwc; - u16 rkba; - u16 rker; +static struct rf_context_s { + int DMA; + int EMA; + int DCF; + int PEF; + int CIE, EIE, NXD, PIE, WLS; + int MEX; + int ADC, PCA, DRE, DRL, PER; - int rk_write_prot; - int rk_func; - int rk_fd; - - int track; - int sect; - int cyl; - int rkintq; + int is_read; + int is_write; + int dma_start; + int dma_done; + unsigned int disk_addr; + int rf_fd; int has_init; + int size; + u16 buffer[256*1024]; +} rf_context[10]; - int dma_cycle; - int dma_write; - int dma_read; - int dma_wc; - u22 dma_addr; - int dma_index; - - u16 rkxb[256*256]; - -} rk_context[10]; - -#ifndef CSR_GO -#define CSR_GO (1 << 0) -#define CSR_IE (1 << 6) -#define CSR_DONE (1 << 7) -#define CSR_BUSY (1 << 11) -#endif - -/* RKDS */ - -#define RKDS_SC 0000017 /* sector counter */ -#define RKDS_ON_SC 0000020 /* on sector */ -#define RKDS_WLK 0000040 /* write locked */ -#define RKDS_RWS 0000100 /* rd/wr/seek ready */ -#define RKDS_RDY 0000200 /* drive ready */ -#define RKDS_SC_OK 0000400 /* SC valid */ -#define RKDS_INC 0001000 /* seek incomplete */ -#define RKDS_UNSAFE 0002000 /* unsafe */ -#define RKDS_RK05 0004000 /* RK05 */ -#define RKDS_PWR 0010000 /* power low */ -#define RKDS_ID 0160000 /* drive ID */ - - -#define RKER_WCE 0000001 /* write check */ -#define RKER_CSE 0000002 /* checksum */ -#define RKER_NXS 0000040 /* nx sector */ -#define RKER_NXC 0000100 /* nx cylinder */ -#define RKER_NXD 0000200 /* nx drive */ -#define RKER_TE 0000400 /* timing error */ -#define RKER_DLT 0001000 /* data late */ -#define RKER_NXM 0002000 /* nx memory */ -#define RKER_PGE 0004000 /* programming error */ -#define RKER_SKE 0010000 /* seek error */ -#define RKER_WLK 0020000 /* write lock */ -#define RKER_OVR 0040000 /* overrun */ -#define RKER_DRE 0100000 /* drive error */ - -#define RKER_SOFT (RKER_WCE+RKER_CSE) /* soft errors */ -#define RKER_HARD 0177740 /* hard errors */ - -#define RKCS_CTLRESET 0 -#define RKCS_WRITE 1 -#define RKCS_READ 2 -#define RKCS_WCHK 3 -#define RKCS_SEEK 4 -#define RKCS_RCHK 5 -#define RKCS_DRVRESET 6 -#define RKCS_WLK 7 -#define RKCS_MEX 0000060 /* memory extension */ -#define RKCS_SSE 0000400 /* stop on soft err */ -#define RKCS_FMT 0002000 /* format */ -#define RKCS_INH 0004000 /* inhibit increment */ -#define RKCS_SCP 0020000 /* search complete */ -#define RKCS_HERR 0040000 /* hard error */ -#define RKCS_ERR 0100000 /* error */ -#define RKCS_RW 0006576 /* read/write */ +#define WC_ADDR 07750 +#define CA_ADDR 07751 static struct { int ord; @@ -144,74 +81,59 @@ static struct { } argl[] = { { 1, "clk", 0 }, { 2, "reset", 0 }, - { 3, "iopage_addr", 0 }, - { 4, "data_in", 0 }, - { 5, "data_out", 1 }, - { 6, "decode", 1 }, - { 7, "iopage_rd", 0 }, - { 8, "iopage_wr", 0 }, - { 9, "iopage_byte_op", 0 }, - { 10, "interrupt", 1 }, - { 11, "int_ack", 0 }, - { 12, "vector", 1 }, - { 13, "ide_data_bus", 1 }, - { 14, "ide_dior", 1 }, - { 15, "ide_diow", 1 }, - { 16, "ide_cs", 1 }, - { 17, "ide_da", 1 }, - { 18, "dma_req", 1 }, - { 19, "dma_ack", 0 }, - { 20, "dma_addr", 1 }, - { 21, "dma_data_in", 1 }, - { 22, "dma_data_out", 0 }, - { 23, "dma_rd", 1 }, - { 24, "dma_wr", 1 }, + { 3, "iot", 0 }, + { 4, "state", 0 }, + { 5, "mb", 0 }, + { 6, "io_data_in", 0 }, + + { 7, "io_select", 0 }, + { 8, "io_selected", 1 }, + { 9, "io_data_out", 0 }, + { 10, "io_data_avail", 1 }, + + { 11, "io_interrupt", 0 }, + { 12, "io_skip", 0 }, + { 13, "io_clear_ac", 0 }, { 0, NULL, 0 } }; +#define A_CLK (1-1) #define A_RESET (2-1) -#define A_IOPAGE_ADDR (3-1) -#define A_DATA_IN (4-1) -#define A_DATA_OUT (5-1) -#define A_DECODE (6-1) -#define A_IOPAGE_RD (7-1) -#define A_IOPAGE_WR (8-1) -#define A_IOPAGE_BYTE_OP (9-1) -#define A_INTERRUPT (10-1) -#define A_INT_ACK (11-1) -#define A_VECTOR (12-1) -#define A_DMA_REQ (18-1) -#define A_DMA_ACK (19-1) -#define A_DMA_ADDR (20-1) -#define A_DMA_DATA_IN (21-1) -#define A_DMA_DATA_OUT (22-1) -#define A_DMA_RD (23-1) -#define A_DMA_WR (24-1) +#define A_IOT (3-1) +#define A_STATE (4-1) +#define A_MB (5-1) +#define A_IO_DATA_IN (6-1) +#define A_IO_SELECT (7-1) +#define A_IO_SELECTED (8-1) +#define A_IO_DATA_OUT (9-1) +#define A_IO_DATA_AVAIL (10-1) +#define A_IO_INTERRUPT (11-1) +#define A_IO_SKIP (12-1) +#define A_IO_CLEAR_AC (13-1) /* ----------------- */ -void rk_raw_write_memory(struct rk_context_s *rk, int ma, u16 data) +void rf_raw_write_memory(struct rf_context_s *rf, int ma, u16 data) { extern u16 *M; - vpi_printf("dma %06o <- %06o\n", ma, data); if (ma > 1024*1024) { - vpi_printf("pli_rk: dma write, address error %x\n", ma); + vpi_printf("pli_rf: dma write, address error %x\n", ma); while (1); } - M[ma >> 1] = data; + M[ma] = data; } -u16 rk_raw_read_memory(struct rk_context_s *rk, int ma) +u16 rf_raw_read_memory(struct rf_context_s *rf, int ma) { extern u16 *M; if (ma > 1024*1024) { - vpi_printf("pli_rk: dma read, address error %x\n", ma); + vpi_printf("pli_rf: dma read, address error %x\n", ma); while (1); } - return M[ma >> 1]; + return M[ma]; } /* ----------------- */ @@ -220,12 +142,11 @@ static void set_output_str(int ord, char *str) { s_vpi_value outval; -#ifdef __CVER__ - if (argl[ord].aref == 0) - argl[ord].aref = vpi_put_value(argl[ord].ref, NULL, NULL, vpiAddDriver); -#else - argl[ord].aref = argl[ord].ref; -#endif +// if (running_cver) { +// if (argl[ord].aref == 0) +// argl[ord].aref = vpi_put_value(argl[ord].ref, NULL, NULL, vpiAddDriver); +// } else + argl[ord].aref = argl[ord].ref; outval.format = vpiBinStrVal; outval.value.str = str; @@ -239,12 +160,11 @@ static void set_output_int(int ord, int val) { s_vpi_value outval; -#ifdef __CVER__ - if (argl[ord].aref == 0) - argl[ord].aref = vpi_put_value(argl[ord].ref, NULL, NULL, vpiAddDriver); -#else - argl[ord].aref = argl[ord].ref; -#endif +// if (running_cver) { +// if (argl[ord].aref == 0) +// argl[ord].aref = vpi_put_value(argl[ord].ref, NULL, NULL, vpiAddDriver); +// } else + argl[ord].aref = argl[ord].ref; outval.format = vpiIntVal; outval.value.integer = val; @@ -254,521 +174,288 @@ static void set_output_int(int ord, int val) vpi_put_value(argl[ord].aref, &outval, NULL, vpiNoDelay); } -#ifdef USE_DMA -static void dma_start_write(struct rk_context_s *rk, - unsigned int ma, unsigned int wc) -{ - vpi_printf("rk: dma start write ma=%o, wc=%o\n", ma, wc); - rk->dma_cycle++; - rk->dma_addr = ma; - rk->dma_write = 1; - rk->dma_wc = wc; - rk->dma_index = 0; - - set_output_int(A_DMA_DATA_OUT, rk->rkxb[rk->dma_index]); - set_output_int(A_DMA_ADDR, rk->dma_addr); - set_output_str(A_DMA_WR, "1"); - set_output_str(A_DMA_REQ, "1"); -} - -static void dma_start_read(struct rk_context_s *rk, - unsigned int ma, unsigned int wc) -{ - vpi_printf("rk: dma start read ma=%o, wc=%o\n", ma, wc); - rk->dma_cycle++; - rk->dma_addr = ma; - rk->dma_read = 1; - rk->dma_wc = wc; - - set_output_int(A_DMA_ADDR, rk->dma_addr); - set_output_str(A_DMA_RD, "1"); - set_output_str(A_DMA_REQ, "1"); -} - -static void dma_next(struct rk_context_s *rk) -{ - if (rk_debug > 1) - vpi_printf("rk: dma next dma_addr=%o, dma_wc=%o\n", - rk->dma_addr, rk->dma_wc); - - if (!(rk->rkcs & RKCS_INH)) - rk->dma_addr += 2; - - if (rk->dma_read) { - if (rk->rk_func == RKCS_WCHK) { - if (rk->rkxb[rk->dma_index] != argl[A_DMA_DATA_IN].value) { - rk->rker |= 1; - } - } else { - rk->rkxb[rk->dma_index] = argl[A_DMA_DATA_IN].value; - } - } - - rk->dma_wc--; - rk->dma_index++; - - if (rk->dma_write) { - set_output_int(A_DMA_DATA_OUT, rk->rkxb[rk->dma_index]); - } - - set_output_int(A_DMA_ADDR, rk->dma_addr); - - if (rk->dma_read) { - set_output_str(A_DMA_RD, "1"); - } - if (rk->dma_write) { - set_output_str(A_DMA_WR, "1"); - } - - set_output_str(A_DMA_REQ, "1"); -} - -static void rk_set_done(struct rk_context_s *rk, int error); - -static void dma_done(struct rk_context_s *rk) -{ - int wc, track, sector, da; - - vpi_printf("rk: XXX dma done\n"); - - wc = 0200000 - rk->rkwc; - - track = (rk->rkda >> 4) & 0777; - sector = rk->rkda & 017; - da = ((track * 12) + sector) * 256; - - rk->rkwc = 0; - rk->rkba = rk->dma_addr & 0xffff; - rk->rkcs = (rk->rkcs & ~RKCS_MEX) | ((rk->dma_addr >> (16 - 4)) & RKCS_MEX); - - if ((rk->rk_func == RKCS_READ) && (rk->rkcs & RKCS_FMT)) - da = da + (wc * 256); - else - da = da + wc + (256 - 1); - - rk->track = (da / 256) / 12; - rk->sect = (da / 256) % 12; - - rk->rkda = (rk->track << 4) | rk->sect; - - rk_set_done(rk, 0); - - rk->dma_cycle = 0; - rk->dma_read = 0; - rk->dma_write = 0; - set_output_str(A_DMA_REQ, "0"); -} -#endif - void -io_rk_reset(struct rk_context_s *rk) +io_rf_reset(struct rf_context_s *rf) { - rk->rkcs = CSR_DONE; + rf->EMA = 0; + rf->DMA = 0; + rf->MEX = 0; + rf->PEF = 0; + rf->CIE = 0; + rf->PIE = 0; + rf->EIE = 0; + rf->DCF = 1; + rf->NXD = 0; - if (rk->rk_fd) { - close(rk->rk_fd); - rk->rk_fd = 0; - } + rf->DRL = 0; + rf->PER = 0; + rf->WLS = 0; - vpi_printf("io_rk_reset() opening file\n"); - - rk->rk_fd = open("rk.dsk", O_RDONLY); - rk->has_init = 1; -} - -void io_rk_cpu_int_set(struct rk_context_s *rk) -{ - vpi_printf("io_rk_cpu_int_set() intset seek\n"); - - set_output_str(A_INTERRUPT, "1"); - set_output_int(A_VECTOR, 0220); -} - -void io_rk_cpu_int_clear(struct rk_context_s *rk) -{ - vpi_printf("io_rk_cpu_int_clear() intset seek\n"); - - set_output_str(A_INTERRUPT, "0"); - set_output_int(A_VECTOR, 0); -} - -u16 _io_rk_read(struct rk_context_s *rk, u22 addr) -{ - if (io_rk_debug) - vpi_printf("io_rk_read %o decode %o\n", addr, ((addr >> 1) & 07)); - - switch ((addr >> 1) & 07) { /* decode PA<3:1> */ - - case 0: /* RKDS: read only */ - rk->rkds = (rk->rkds & RKDS_ID) | RKDS_RK05 | RKDS_SC_OK; - return rk->rkds; - - case 1: /* RKER: read only */ - return rk->rker; - - case 2: /* RKCS */ - if (rk->rker) rk->rkcs |= RKCS_ERR; - if (rk->rker & RKER_HARD) rk->rkcs |= RKCS_HERR; - return rk->rkcs; - - case 3: /* RKWC */ - return rk->rkwc; - - case 4: /* RKBA */ - return rk->rkba; - - case 5: /* RKDA */ - return rk->rkda; - - default: - return 0; - } -} - -static void rk_set_done(struct rk_context_s *rk, int error) -{ - if (1) vpi_printf("rk: done; error %o seek\n", error); - - rk->rkcs |= CSR_DONE; - if (error != 0) { - rk->rker |= error; - if (rk->rker) - rk->rkcs |= RKCS_ERR; - if (rk->rker & RKER_HARD) - rk->rkcs |= RKCS_HERR; - } - - if (rk->rkcs & CSR_IE) { - rk->rkintq |= 1; - io_rk_cpu_int_set(rk); - } else { - rk->rkintq = 0; - io_rk_cpu_int_clear(rk); - } -} - -static void rk_clr_done(struct rk_context_s *rk) -{ - if (rk_debug > 1) vpi_printf("rk: not done\n"); - - rk->rkcs &= ~CSR_DONE; - rk->rkintq &= ~1; - io_rk_cpu_int_clear(rk); -} - -void rk_service(struct rk_context_s *rk) -{ - int i, err, wc, cda; - int da, cyl, track, sector; - unsigned int ma; - -#ifndef USE_DMA - int awc, cma, ret; - unsigned short comp; -#endif - - vpi_printf("rk_service; func %o\n", rk->rk_func); - - if (rk->rk_func == RKCS_SEEK) { - rk->rkcs |= RKCS_SCP; - if (rk->rkcs & CSR_IE) { - rk->rkintq |= 2; - if (rk->rkcs & CSR_DONE) - io_rk_cpu_int_set(rk); - } else { - rk->rkintq = 0; - io_rk_cpu_int_clear(rk); + if (!rf->has_init) { + if (rf->rf_fd) { + close(rf->rf_fd); + rf->rf_fd = 0; } - return; + vpi_printf("io_rf_reset() opening file\n"); + + rf->rf_fd = open("rf.dsk", O_RDONLY); + if (rf->rf_fd >= 0) { + rf->size = read(rf->rf_fd, rf->buffer, sizeof(rf->buffer)); + rf->has_init = 1; + vpi_printf("io_rf_reset() read %d bytes\n", rf->size); + } } +} - cyl = (rk->rkda >> 5) & 0377; - track = (rk->rkda >> 4) & 0777; - sector = rk->rkda & 017; +void io_rf_cpu_int_set(struct rf_context_s *rf) +{ + vpi_printf("io_rf_cpu_int_set() intset seek\n"); - ma = ((rk->rkcs & RKCS_MEX) << (16 - 4)) | rk->rkba; +// set_output_str(A_INTERRUPT, "1"); +// set_output_int(A_VECTOR, 0220); +} - if (sector >= 12) { - rk_set_done(rk, RKER_NXS); - return; - } +void io_rf_cpu_int_clear(struct rf_context_s *rf) +{ + vpi_printf("io_rf_cpu_int_clear() intset seek\n"); - if (cyl >= 203) { - rk_set_done(rk, RKER_NXC); - return; - } +// set_output_str(A_INTERRUPT, "0"); +// set_output_int(A_VECTOR, 0); +} - da = ((track * 12) + sector) * 256; - wc = 0200000 - rk->rkwc; - vpi_printf("rk: seek %d (read %d)\n", da * sizeof(short), wc*2); +/* ------------------------------------------------------ */ - err = lseek(rk->rk_fd, da * sizeof(short), SEEK_SET); - if (wc && (err >= 0)) { - err = 0; +void io_rf_service(struct rf_context_s *rf) +{ + u16 wc, ca; + unsigned int pa; - switch (rk->rk_func) { + if (rf->dma_start) { - case RKCS_READ: - if (rk->rkcs & RKCS_FMT) { - for (i = 0, cda = da; i < wc; i++) { - rk->rkxb[i] = (cda / 256) / (2 * 12); - cda = cda + 256; - } - } else { - vpi_printf("rk: read() wc %d\n", wc); - i = read(rk->rk_fd, rk->rkxb, sizeof(short)*wc); + rf->disk_addr = (rf->EMA << 12) | rf->DMA; - vpi_printf("rk: read() ret %d\n", i); - if (i >= 0 && i < sizeof(short)*wc) { - i /= 2; - for (; i < wc; i++) - rk->rkxb[i] = 0; - } + vpi_printf("rf: %s dma to %o%o, count %o; disk_addr %o (%d) EMA %o DMA %o\n", + rf->is_read ? "read" : "write", + rf->MEX, rf_raw_read_memory(rf, CA_ADDR), + rf_raw_read_memory(rf, WC_ADDR), + rf->disk_addr, rf->disk_addr, + rf->EMA, rf->DMA); + + do { + wc = rf_raw_read_memory(rf, WC_ADDR); + wc = (wc + 1) & 07777; + rf_raw_write_memory(rf, WC_ADDR, wc); + + ca = rf_raw_read_memory(rf, CA_ADDR); + ca = (ca + 1) & 07777; + rf_raw_write_memory(rf, CA_ADDR, ca); + + pa = (rf->MEX << 12) | ca; + + if (rf->is_read) { + rf_raw_write_memory(rf, pa, rf->buffer[rf->disk_addr]); + if (0) vpi_printf("dma %06o <- %06o\n", pa, rf->buffer[rf->disk_addr]); } -#ifdef USE_DMA - vpi_printf("rk: read(), dma ma=%o, wc=%d\n", ma, wc); - vpi_printf("rk: buffer %06o %06o %06o %06o\n", - rk->rkxb[0], rk->rkxb[1], rk->rkxb[2], rk->rkxb[3]); - dma_start_write(rk, ma, wc); - return; -#else - if (rk->rkcs & RKCS_INH) { - rk_raw_write_memory(rk, ma, rk->rkxb[wc - 1]); - } else { - //int oldma = ma; - vpi_printf("rk: read(), dma wc=%d, ma=%o\n", wc, ma); - vpi_printf("rk: buffer %06o %06o %06o %06o\n", - rk->rkxb[0], rk->rkxb[1], rk->rkxb[2], rk->rkxb[3]); - for (i = 0; i < wc; i++) { - rk_raw_write_memory(rk, ma, rk->rkxb[i]); - ma += 2; - } - //show(oldma); + if (rf->is_write) { + rf->buffer[rf->disk_addr] = rf_raw_read_memory(rf, pa); + if (0) vpi_printf("dma %06o -> %06o\n", pa, rf->buffer[rf->disk_addr]); + } + + rf->disk_addr = (rf->disk_addr + 1) & 03777777; + + } while (wc != 0); + + rf->dma_done = 1; + + vpi_printf("rf: dma done\n"); + } + + rf->dma_start = 0; +} + +void io_rf_iot(struct rf_context_s *rf, + unsigned state, unsigned io_select, unsigned mb, unsigned io_data_in, + unsigned *pio_data_out, unsigned *pio_clear_ac, unsigned *pio_skip) +{ + *pio_clear_ac = 0; + *pio_skip = 0; + + if (state == 1) + switch (io_select) { + case 060: + switch (mb & 7) { + case 3: // DMAR + *pio_data_out = 0; + *pio_clear_ac = 1; + rf->dma_start = 1; + case 5: // DMAW + *pio_data_out = 0; + *pio_clear_ac = 1; + rf->dma_start = 1; + } + break; + case 061: + switch (mb & 7) { + case 2: // DSAC + if (rf->ADC) { + *pio_skip = 1; + *pio_data_out = 0; + *pio_clear_ac = 1; } -#endif break; - - case RKCS_WRITE: -#ifdef USE_DMA - if (rk->rkcs & RKCS_INH) { - dma_start_read(rk, ma, 1); - } else { - dma_start_read(rk, ma, wc); - } - return; -#else - if (rk->rkcs & RKCS_INH) { - comp = rk_raw_read_memory(rk, ma); - for (i = 0; i < wc; i++) - rk->rkxb[i] = comp; - } else { - for (i = 0; i < wc; i++) { - rk->rkxb[i] = rk_raw_read_memory(rk, ma); - ma += 2; - } - } - - awc = (wc + (256 - 1)) & ~(256 - 1); - vpi_printf("rk: write(), wc=%d\n", awc*2); - ret = write(rk->rk_fd, rk->rkxb, awc*2); -#endif + case 6: // DIMA + *pio_data_out = + (rf->PCA << 11) | + (rf->DRE << 10) | + (rf->WLS << 9) | + (rf->EIE << 8) | + (rf->PIE << 7) | + (rf->CIE << 6) | + (rf->MEX << 3) | + (rf->DRL << 2) | + (rf->NXD << 1) | + (rf->PER << 0); break; + case 5: // DIML + *pio_data_out = 0; + *pio_clear_ac = 1; + break; + } + break; + case 062: + switch (mb & 7) { + case 1: // DFSE + if (rf->DRL || rf->PER || rf->WLS || rf->NXD) + *pio_skip = 1; + break; + case 2: // ? + if (rf->DCF) + *pio_skip = 1; + break; + case 3: // DISK + if (rf->DRL || rf->PER || rf->WLS || rf->NXD || rf->DCF) { + if (0) vpi_printf("rf: DISK %d %d %d %d %d\n", + rf->DRL, rf->PER, rf->WLS, rf->NXD, rf->DCF); + *pio_skip = 1; + } + break; + case 6: // DMAC + *pio_data_out = rf->DMA & 07777; + break; + } + break; + case 064: + switch (mb & 7) { + case 3: // DXAL + *pio_data_out = 0; + *pio_clear_ac = 1; + break; + case 5: // DXAC + *pio_data_out = rf->EMA & 07777; + break; + } + break; + } - case RKCS_WCHK: - i = read(rk->rk_fd, rk->rkxb, sizeof(short)*wc); - if (i < 0) { - wc = 0; + switch (state) { + case 0: + switch (io_select) { + case 060: + if ((mb & 7) == 1) { + vpi_printf("rf: DCMA\n"); + rf->DMA = 0; + rf->PEF = 0; + rf->NXD = 0; + rf->DCF = 0; + } + break; + case 061: + switch (mb & 7) { + case 1: // DCIM + vpi_printf("rf: DCIM\n"); + rf->EIE = 0; + rf->PIE = 0; + rf->CIE = 0; + rf->MEX = 0; + break; + case 2: // DSAC + break; + case 3: // DIML break; } - - if (i >= 0 && i < sizeof(short)*wc) { - i /= 2; - for (; i < wc; i++) - rk->rkxb[i] = 0; - } - -#ifdef USE_DMA - dma_start_read(rk, 0, wc); - return; -#else - awc = wc; - for (wc = 0, cma = ma; wc < awc; wc++) { - comp = rk_raw_read_memory(rk, cma); - if (comp != rk->rkxb[wc]) { - rk->rker |= rk->rker; - if (rk->rkcs & RKCS_SSE) - break; - } - if (!(rk->rkcs & RKCS_INH)) - cma += 2; - } -#endif - break; - - default: break; } - } - - rk->rkwc = (rk->rkwc + wc) & 0177777; - if (!(rk->rkcs & RKCS_INH)) - ma = ma + (wc << 1); - - rk->rkba = ma & 0xffff; - rk->rkcs = (rk->rkcs & ~RKCS_MEX) | ((ma >> (16 - 4)) & RKCS_MEX); - - if ((rk->rk_func == RKCS_READ) && (rk->rkcs & RKCS_FMT)) - da = da + (wc * 256); - else - da = da + wc + (256 - 1); - - rk->track = (da / 256) / 12; - rk->sect = (da / 256) % 12; - - rk->rkda = (rk->track << 4) | rk->sect; - rk_set_done(rk, 0); - - if (err != 0) { - vpi_printf("RK I/O error\n"); - } -} - -static void rk_go(struct rk_context_s *rk) -{ - if (rk_debug > 1) vpi_printf("rk_go!\n"); - - rk->rk_func = (rk->rkcs >> 1) & 7; - if (rk->rk_func == RKCS_CTLRESET) { - rk->rker = 0; - rk->rkda = 0; - rk->rkba = 0; - rk->rkcs = CSR_DONE; - rk->rkintq = 0; - io_rk_cpu_int_clear(rk); - return; - } - - rk->rker &= ~RKER_SOFT; - if (rk->rker == 0) - rk->rkcs &= ~RKCS_ERR; - - rk->rkcs &= ~RKCS_SCP; - rk_clr_done(rk); - - if ((rk->rkcs & RKCS_FMT) && - (rk->rk_func != RKCS_READ) && (rk->rk_func != RKCS_WRITE)) { - rk_set_done(rk, RKER_PGE); - return; - } - - if ((rk->rk_func == RKCS_WRITE) && rk->rk_write_prot) { - rk_set_done(rk, RKER_WLK); - return; - } - - if (rk->rk_func == RKCS_WLK) { - rk_set_done(rk, 0); - return; - } - - if (rk->rk_func == RKCS_DRVRESET) { - rk->cyl = 0; - rk->sect = 0; - rk->rk_func = RKCS_SEEK; - } else { - rk->sect = rk->rkda & 017; - rk->cyl = (rk->rkda >> 5) & 0377; - } - - if (rk->sect >= 12) { - rk_set_done(rk, RKER_NXS); - return; - } - - if (rk->cyl >= 203) { - rk_set_done(rk, RKER_NXC); - return; - } - - if (rk->rk_func == RKCS_SEEK) { - rk_set_done(rk, 0); - } - - rk_service(rk); -} - -void _io_rk_write(struct rk_context_s *rk, u22 addr, u16 data, int writeb) -{ - if (0) vpi_printf("_io_rk_write %o %d decode %o\n", - addr, writeb, ((addr >> 1) & 07)); - - switch ((addr >> 1) & 07) { /* decode PA<3:1> */ - - case 2: /* RKCS */ - vpi_printf("rk: rkcs <- %o\n", data); - if (writeb) { - data = (addr & 1)? (rk->rkcs & 0377) | - (data << 8): (rk->rkcs & ~0377) | data; - } - if ((data & CSR_IE) == 0) { /* int disable? */ - rk->rkintq = 0; /* clr int queue */ - io_rk_cpu_int_clear(rk); - } else - if ((rk->rkcs & (CSR_DONE | CSR_IE)) == CSR_DONE) { - rk->rkintq |= 1; - io_rk_cpu_int_set(rk); + break; + case 1: + switch (io_select) { + case 060: + switch (mb & 7) { + case 3: // DMAR + rf->DMA = io_data_in & 07777; + rf->is_read = 1; + rf->DCF = 0; + vpi_printf("rf: DMAR ac %o\n", io_data_in); + break; + case 5: // DMAW + rf->DMA = io_data_in & 07777; + rf->is_write = 1; + rf->DCF = 0; + vpi_printf("rf: DMAW ac %o\n", io_data_in); + break; } - - rk->rkcs = (rk->rkcs & ~RKCS_RW) | (data & RKCS_RW); - vpi_printf("rk: rkcs %o\n", rk->rkcs); - - if ((rk->rkcs & CSR_DONE) && (data & CSR_GO)) - rk_go(rk); - return; - - case 3: /* RKWC */ - if (writeb) { - data = (addr & 1) ? - (rk->rkwc & 0377) | (data << 8) : - (rk->rkwc & ~0377) | data; + break; + case 061: + switch (mb & 7) { + case 5: // DIML + rf->EIE = (io_data_in>>8) & 1; + rf->PIE = (io_data_in>>7) & 1 ; + rf->CIE = (io_data_in>>6) & 1; + rf->MEX = (io_data_in>>3) & 7; + vpi_printf("rf: DIML %o\n", io_data_in); + break; + } + break; + case 064: + switch (mb & 7) { + case 1: // DCXA + rf->EMA = 0; + break; + case 3: // DXAL + rf->EMA = io_data_in & 0377; + break; + } + break; } - rk->rkwc = data; - vpi_printf("rk: rkwc <- %o\n", rk->rkwc); - return; + break; - case 4: /* RKBA */ - if (writeb) { - data = (addr & 1)? - (rk->rkba & 0377) | (data << 8) : - (rk->rkba & ~0377) | data; + case 2: + break; + + case 3: + io_rf_service(rf); + + if (rf->dma_done) { + rf->EMA = (rf->disk_addr >> 12) & 0377; + rf->DMA = rf->disk_addr & 07777; + rf->is_read = 0; + rf->is_write = 0; + vpi_printf("rf: set DCF (CIE %d)\n", rf->CIE); + rf->DCF = 1; + + rf->dma_start = 0; + rf->dma_done = 0; } - rk->rkba = data; - vpi_printf("rk: rkba <- %o\n", rk->rkba); - return; - - case 5: /* RKDA */ - if ((rk->rkcs & CSR_DONE) == 0) - return; - if (writeb) { - data = (addr & 1) ? - (rk->rkda & 0377) | (data << 8) : - (rk->rkda & ~0377) | data; - } - rk->rkda = data; - vpi_printf("rk: XXX rkda <- %o\n", rk->rkda); - return; - - default: - vpi_printf("rk: ??\n"); - return; + break; } + } /* ------------------------------------------------------ */ +#if 0 static int getadd_inst_id(vpiHandle mhref) { register int i; @@ -781,35 +468,35 @@ static int getadd_inst_id(vpiHandle mhref) return(i); } - vpi_printf("pli_rk: adding instance %d, %s\n", last_evh+1, chp); + vpi_printf("pli_rf: adding instance %d, %s\n", last_evh+1, chp); instnam_tab[++last_evh] = malloc(strlen(chp) + 1); strcpy(instnam_tab[last_evh], chp); return(last_evh); } +#endif /* * */ -PLI_INT32 pli_rk(void) +PLI_INT32 pli_rf(void) { - vpiHandle href, iter, mhref; + vpiHandle href, iter/*, mhref*/; int numargs, inst_id; s_vpi_value tmpval; int i, badarg; - char iopr_bit, iopw_bit, dma_ack_bit; - struct rk_context_s *rk; - unsigned int addr, decode; + char iot_bit, iot, clk_bit; + struct rf_context_s *rf; + unsigned int state, mb, decode, io_decode, io_select, data; + int iot_start, iot_stop; + int clk_start, clk_stop; - int read_start, read_stop, write_start, write_stop; - int dma_ack_start, dma_ack_stop; - - //vpi_printf("pli_rk:\n"); + if (0) vpi_printf("pli_rf: entry\n"); href = vpi_handle(vpiSysTfCall, NULL); if (href == NULL) { - vpi_printf("** ERR: $pli_rk PLI 2.0 can't get systf call handle\n"); + vpi_printf("** ERR: $pli_rf PLI 2.0 can't get systf call handle\n"); return(0); } @@ -826,9 +513,9 @@ PLI_INT32 pli_rk(void) #else inst_id = 1; #endif - rk = &rk_context[inst_id]; + rf = &rf_context[inst_id]; - //vpi_printf("pli_rk: inst_id %d\n", inst_id); + //vpi_printf("pli_rf: inst_id %d\n", inst_id); iter = vpi_iterate(vpiArgument, href); @@ -850,158 +537,121 @@ PLI_INT32 pli_rk(void) } } - vpi_free_object(iter); +// vpi_free_object(iter); vpi_free_object(href); if (badarg) { - vpi_printf("**ERR: $pli_rk bad args\n"); + vpi_printf("**ERR: $pli_rf bad args\n"); return(0); } - if (!rk->has_init) { - io_rk_reset(rk); + if (!rf->has_init) { + io_rf_reset(rf); for (i = 0; argl[i].ord; i++) { if (argl[i].preset) { - if (0) vpi_printf("pli_rk: preset %s\n", argl[i].name); + if (0) vpi_printf("pli_rf: preset %s\n", argl[i].name); set_output_str(i, "0"); } } } /* */ - read_start = 0; - read_stop = 0; - write_start = 0; - write_stop = 0; - dma_ack_start = 0; - dma_ack_stop = 0; + iot_start = 0; + iot_stop = 0; - iopr_bit = argl[A_IOPAGE_RD].bits[0]; - iopw_bit = argl[A_IOPAGE_WR].bits[0]; - dma_ack_bit = argl[A_DMA_ACK].bits[0]; + iot_bit = argl[A_IOT].bits[0]; + clk_bit = argl[A_CLK].bits[0]; - if (iopr_bit != last_iopr_bit) { - if (iopr_bit == '1') read_start = 1; - if (iopr_bit == '0') read_stop = 1; + if (iot_bit != last_iot_bit) { + if (iot_bit == '1') iot_start = 1; + if (iot_bit == '0') iot_stop = 1; } - if (iopw_bit != last_iopw_bit) { - if (iopw_bit == '1') write_start = 1; - if (iopw_bit == '0') write_stop = 1; + if (clk_bit != last_clk_bit) { + if (clk_bit == '1') clk_start = 1; + if (clk_bit == '0') clk_stop = 1; } - if (dma_ack_bit != last_dma_ack_bit) { - if (dma_ack_bit == '1') dma_ack_start = 1; - if (dma_ack_bit == '0') dma_ack_stop = 1; - } + last_iot_bit = iot_bit; + last_clk_bit = clk_bit; - last_iopr_bit = iopr_bit; - last_iopw_bit = iopw_bit; - last_dma_ack_bit = dma_ack_bit; + iot = argl[A_IOT].value; + state = argl[A_STATE].value; + io_select = argl[A_IO_SELECT].value; + mb = argl[A_MB].value; + data = argl[A_IO_DATA_IN].value; - addr = argl[A_IOPAGE_ADDR].value; - decode = 017400 <= addr && addr <= 017412; - if (0) vpi_printf("pli_rk: decode %o %d\n", addr, decode); + io_decode = iot && (io_select == 060 || + io_select == 061 || + io_select == 062 || + io_select == 064); + + decode = (state == 1) && io_decode; + + if (0) + vpi_printf("pli_rf: state %d iot %d mb %o decode %d\n", state, iot, mb, decode); if (0) { - if (read_start) vpi_printf("pli_rk: read start\n"); - if (read_stop) vpi_printf("pli_rk: read stop\n"); - if (write_start) vpi_printf("pli_rk: write start\n"); - if (write_stop) vpi_printf("pli_rk: write stop\n"); - if (dma_ack_start) vpi_printf("pli_rk: dma_ack start\n"); - if (dma_ack_stop) vpi_printf("pli_rk: dma_ack stop\n"); + if (iot_start) vpi_printf("pli_rf: iot start\n"); + if (iot_stop) vpi_printf("pli_rf: iot stop\n"); } /* */ if (argl[A_RESET].value == 1) { - vpi_printf("pli_rk: reset\n"); - io_rk_reset(rk); + vpi_printf("pli_rf: reset\n"); + io_rf_reset(rf); } - if (argl[A_INT_ACK].value == 1) { - vpi_printf("pli_rk: intack\n"); - io_rk_cpu_int_clear(rk); + set_output_int(A_IO_SELECTED, decode ? 1 : 0); + +// if ((iot_start && decode) || state <= 3) + if (clk_stop && io_decode) + { + unsigned io_data_out, io_clear_ac, io_skip; + + if (0) vpi_printf("pli_rf: iot %o data %o\n", iot, data); + + io_data_out = argl[A_IO_DATA_IN].value; + + io_rf_iot(rf, state, io_select, mb, data, &io_data_out, &io_clear_ac, &io_skip); + + set_output_int(A_IO_DATA_OUT, io_data_out); + set_output_int(A_IO_CLEAR_AC, io_clear_ac); + set_output_int(A_IO_SKIP, io_skip); + + if ((rf->CIE & rf->DCF) || + (rf->PIE & rf->PCA) || + (rf->EIE & (rf->WLS | rf->DRL | rf->NXD | rf->PER))) + { + vpi_printf("pli_rf: set interrupt\n"); + set_output_int(A_IO_INTERRUPT, 1); + } else + set_output_int(A_IO_INTERRUPT, 0); } -#ifdef USE_DMA - if (!dma_ack_start && !dma_ack_stop) { - if (0) vpi_printf("pli_rk: dma waiting\n"); - } + set_output_int(A_IO_DATA_AVAIL, 1); - if (dma_ack_stop) { - if (rk_debug > 1) - vpi_printf("pli_rk: dma ack stop (func=%o)\n", rk->rk_func); - - if (rk->dma_read) { - - switch (rk->rk_func) { - case RKCS_WRITE: - dma_next(rk); - - if (rk->dma_wc == 0) { - int wc, awc, ret; - wc = 0200000 - rk->rkwc; - awc = (wc + (256 - 1)) & ~(256 - 1); - vpi_printf("rk: XXX wc=0, write() %d\n", awc*2); - ret = write(rk->rk_fd, rk->rkxb, awc*2); - } - break; - - case RKCS_WCHK: - dma_next(rk); - break; - } - } - - if (rk->dma_write) { - dma_next(rk); - } - - if (rk->dma_wc == 0) { - dma_done(rk); - } - } -#endif - - set_output_str(A_DECODE, decode ? "1" : "0"); - - if (write_start && decode) { - unsigned data, writeb; - - data = argl[A_DATA_IN].value; - writeb = argl[A_IOPAGE_BYTE_OP].value; - - vpi_printf("pli_rk: write %o <- %o (b%d)\n", addr, data, writeb); - - _io_rk_write(rk, addr, data, writeb); - } - - if (read_start && decode) { - unsigned value; - - addr = argl[A_IOPAGE_ADDR].value; - - if (rk_debug > 1) vpi_printf("pli_rk: read %o\n", addr); - - value = _io_rk_read(rk, addr); - - set_output_int(A_DATA_OUT, value); - } - - if (read_stop && decode) { -// set_output_str(A_DATA_OUT, "16'bzzzzzzzzzzzzzzzz"); - set_output_str(A_DATA_OUT, "16'b0000000000000000"); - } +// if (iot_stop && decode) { +// set_output_str(A_IO_DATA_OUT, "16'b0000000000000000"); +// } +#if 0 /* free argument handles */ for (i = 0; argl[i].ord; i++) { if (argl[i].ref != NULL) vpi_free_object(argl[i].ref); + if (argl[i].aref != NULL && argl[i].aref != argl[i].ref) + vpi_free_object(argl[i].aref); argl[i].ref = NULL; argl[i].aref = NULL; } +#endif + + vpi_free_object(iter); + + if (0) vpi_printf("pli_rf: exit\n"); return(0); } @@ -1015,7 +665,7 @@ static void register_my_systfs(void) /* use predefined table form - could fill systf_data_list dynamically */ static s_vpi_systf_data systf_data_list[] = { - { vpiSysTask, 0, "$pli_rk", pli_rk, NULL, NULL, NULL }, + { vpiSysTask, 0, "$pli_rf", pli_rf, NULL, NULL, NULL }, { vpiSysTask, 0, "$pli_ram", pli_ram, NULL, NULL, NULL }, { 0, 0, NULL, NULL, NULL, NULL, NULL } }; @@ -1030,7 +680,7 @@ static void register_my_systfs(void) /* all routines are called to register system tasks */ /* called just after all PLI 1.0 tf_ veriusertfs table routines are set up */ /* before source is read */ -static void (*rk_vlog_startup_routines[]) () = +static void (*rf_vlog_startup_routines[]) () = { register_my_systfs, 0 @@ -1038,23 +688,24 @@ static void (*rk_vlog_startup_routines[]) () = /* dummy +loadvpi= boostrap routine - mimics old style exec all routines */ /* in standard PLI vlog_startup_routines table */ -void rk_vpi_compat_bootstrap(void) +void rf_vpi_compat_bootstrap(void) { int i; - io_rk_debug = 0; - rk_debug = 1; + io_rf_debug = 0; + rf_debug = 1; for (i = 0;; i++) { - if (rk_vlog_startup_routines[i] == NULL) + if (rf_vlog_startup_routines[i] == NULL) break; - rk_vlog_startup_routines[i](); + rf_vlog_startup_routines[i](); } } void vpi_compat_bootstrap(void) { - rk_vpi_compat_bootstrap(); + running_cver = 1; + rf_vpi_compat_bootstrap(); } #ifndef BUILD_ALL