diff --git a/Contralto/CPU/UCodeMemory.cs b/Contralto/CPU/UCodeMemory.cs index 3826ba0..1b25a29 100644 --- a/Contralto/CPU/UCodeMemory.cs +++ b/Contralto/CPU/UCodeMemory.cs @@ -189,9 +189,6 @@ namespace Contralto.CPU break; case MicrocodeBank.RAM0: - _microcodeBank[(int)task] = (nextAddress & 0x80) == 0 ? MicrocodeBank.ROM0 : MicrocodeBank.RAM2; - break; - case MicrocodeBank.RAM1: _microcodeBank[(int)task] = (nextAddress & 0x80) == 0 ? MicrocodeBank.ROM0 : MicrocodeBank.RAM2; break; @@ -210,15 +207,12 @@ namespace Contralto.CPU break; case MicrocodeBank.RAM0: - _microcodeBank[(int)task] = (nextAddress & 0x80) == 0 ? MicrocodeBank.RAM1 : MicrocodeBank.RAM1; + _microcodeBank[(int)task] = MicrocodeBank.RAM1; break; case MicrocodeBank.RAM1: - _microcodeBank[(int)task] = (nextAddress & 0x80) == 0 ? MicrocodeBank.RAM0 : MicrocodeBank.RAM0; - break; - case MicrocodeBank.RAM2: - _microcodeBank[(int)task] = (nextAddress & 0x80) == 0 ? MicrocodeBank.RAM0 : MicrocodeBank.RAM0; + _microcodeBank[(int)task] = MicrocodeBank.RAM0; break; } } diff --git a/Contralto/Memory/MemoryBus.cs b/Contralto/Memory/MemoryBus.cs index e385566..5316f65 100644 --- a/Contralto/Memory/MemoryBus.cs +++ b/Contralto/Memory/MemoryBus.cs @@ -62,14 +62,14 @@ namespace Contralto.Memory else { _bus.Add(addr, dev); - - if (dev is Memory) - { - _mainMemory = (Memory)dev; - } } } } + + if (dev is Memory) + { + _mainMemory = (Memory)dev; + } } public void Reset()