diff --git a/Contralto.sln b/Contralto.sln index cadf749..06a43cd 100644 --- a/Contralto.sln +++ b/Contralto.sln @@ -5,6 +5,8 @@ VisualStudioVersion = 14.0.23107.0 MinimumVisualStudioVersion = 10.0.40219.1 Project("{FAE04EC0-301F-11D3-BF4B-00C04F79EFBC}") = "Contralto", "Contralto\Contralto.csproj", "{CC6D96B3-8099-4497-8AD8-B0795A3353EA}" EndProject +Project("{930C7802-8A8C-48F9-8165-68863BCCD9DD}") = "ContraltoSetup", "ContraltoSetup\ContraltoSetup.wixproj", "{47BBC195-80C5-43F3-B691-7D27B0803B84}" +EndProject Global GlobalSection(Performance) = preSolution HasPerformanceSessions = true @@ -28,6 +30,14 @@ Global {CC6D96B3-8099-4497-8AD8-B0795A3353EA}.Release|Any CPU.Build.0 = Release|Any CPU {CC6D96B3-8099-4497-8AD8-B0795A3353EA}.Release|x64.ActiveCfg = Release|x64 {CC6D96B3-8099-4497-8AD8-B0795A3353EA}.Release|x86.ActiveCfg = Release|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Debug|Any CPU.ActiveCfg = Debug|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Debug|x64.ActiveCfg = Debug|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Debug|x86.ActiveCfg = Debug|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Debug|x86.Build.0 = Debug|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Release|Any CPU.ActiveCfg = Release|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Release|x64.ActiveCfg = Release|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Release|x86.ActiveCfg = Release|x86 + {47BBC195-80C5-43F3-B691-7D27B0803B84}.Release|x86.Build.0 = Release|x86 EndGlobalSection GlobalSection(SolutionProperties) = preSolution HideSolutionNode = FALSE diff --git a/Contralto/CPU/Tasks/Task.cs b/Contralto/CPU/Tasks/Task.cs index 53beb52..e609d24 100644 --- a/Contralto/CPU/Tasks/Task.cs +++ b/Contralto/CPU/Tasks/Task.cs @@ -79,6 +79,9 @@ namespace Contralto.CPU _rdRam = false; _rb = 0; _firstInstructionAfterSwitch = false; + + _swMode = false; + _wrtRam = false; } public virtual void SoftReset() @@ -545,7 +548,7 @@ namespace Contralto.CPU protected bool _rdRam; // Whether to load uCode RAM onto the bus during the next cycle. protected bool _wrtRam; // Whether to write uCode RAM from M and ALU outputs during the next cycle. protected bool _swMode; // Whether to switch uCode banks during the next cycle. - protected bool _softReset; // Whether this instruction caused a soft reset (so MPC should not come from instruction's NEXT field) + protected bool _softReset; // Whether this instruction caused a soft reset (so MPC should not come from instruction's NEXT field) // diff --git a/Contralto/CPU/UCodeMemory.cs b/Contralto/CPU/UCodeMemory.cs index a17722b..a937021 100644 --- a/Contralto/CPU/UCodeMemory.cs +++ b/Contralto/CPU/UCodeMemory.cs @@ -126,8 +126,9 @@ namespace Contralto.CPU /// /// public static void SwitchMode(ushort nextAddress, TaskType task) - { - Log.Write(Logging.LogComponent.Microcode, "SWMODE: Current Bank {0}", _microcodeBank[(int)task]); + { + + // Log.Write(Logging.LogComponent.Microcode, "SWMODE: Current Bank {0}", _microcodeBank[(int)task]); switch (Configuration.SystemType) { @@ -198,7 +199,7 @@ namespace Contralto.CPU break; } - Log.Write(Logging.LogComponent.Microcode, "SWMODE: New Bank {0} for Task {1}", _microcodeBank[(int)task], task); + // Log.Write(Logging.LogComponent.Microcode, "SWMODE: New Bank {0} for Task {1}", _microcodeBank[(int)task], task); } public static ushort ReadRAM() diff --git a/Contralto/Contralto.csproj b/Contralto/Contralto.csproj index d3fcb2a..9842186 100644 --- a/Contralto/Contralto.csproj +++ b/Contralto/Contralto.csproj @@ -11,6 +11,21 @@ Contralto v4.5 512 + publish\ + true + Disk + false + Foreground + 7 + Days + false + false + true + 0 + 1.0.0.%2a + false + false + true AnyCPU @@ -225,7 +240,10 @@ Always - + + PreserveNewest + + PreserveNewest @@ -383,9 +401,22 @@ + + + + False + Microsoft .NET Framework 4.5 %28x86 and x64%29 + true + + + False + .NET Framework 3.5 SP1 + false + + + \ No newline at end of file diff --git a/ContraltoSetup/Product.wxs b/ContraltoSetup/Product.wxs new file mode 100644 index 0000000..81f2953 --- /dev/null +++ b/ContraltoSetup/Product.wxs @@ -0,0 +1,110 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file