Josh Dersch
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cbcfd2b47e
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Minor bugfixes, introduced a new timing infrastructure and moved DiskController over to it. Minor performance improvements; now running at 110% speed. Display timing is still too slow.
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2015-11-17 16:09:50 -08:00 |
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Josh Dersch
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c0f23685b1
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Fixed instruction register decoding SFs for Emulator Task; first stab at handling (most) DNS<- operations including setting SKIP and CARRY flip flops. BLT now succeeds, Nova code in bootstrap is running.
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2015-10-29 17:02:22 -07:00 |
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Josh Dersch
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2918ede7ce
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Some fixes to emulator task dispatch functions, added Nova disassembler, nova instruction single-step and nova instruction breakpoint support. Penciled in DNS (Nova Shift) support in emulator task. Added skeleton for Logging.
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2015-10-28 14:11:04 -07:00 |
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Josh Dersch
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ee7c7fb035
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Implemented more Disk functionality, fixed bug in ACSOURCE dispatch in Emulator task.
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2015-09-16 16:27:16 -07:00 |
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Josh Dersch
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59d98d1909
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Refinement to CPU, implemented very rough diassembler and began annotation of official Xerox ucode sources with PROM addresses.
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2015-08-28 18:07:59 -07:00 |
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Josh Dersch
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f1ffcb0547
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Implemented ALU, most of Memory state machine.
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2015-08-20 18:02:01 -07:00 |
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Josh Dersch
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3b77ba875d
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Sketching in the rest of the CPU
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2015-08-19 16:50:40 -07:00 |
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