Josh Dersch e9a13529c1 Implemented extended memory and fixed issues with S register 0 (which loads M).

2015-11-05 17:29:41 -08:00

..

Tasks

Implemented extended memory and fixed issues with S register 0 (which loads M).

2015-11-05 17:29:41 -08:00

ALU.cs

Fixed instruction register decoding SFs for Emulator Task; first stab at handling (most) DNS<- operations including setting SKIP and CARRY flip flops. BLT now succeeds, Nova code in bootstrap is running.

2015-10-29 17:02:22 -07:00

ConstantMemory.cs

Fixed instruction register decoding SFs for Emulator Task; first stab at handling (most) DNS<- operations including setting SKIP and CARRY flip flops. BLT now succeeds, Nova code in bootstrap is running.

2015-10-29 17:02:22 -07:00

CPU.cs

A few fixes to DNS<- behavior and some tweaks to the disk controller. Boot code is progressing further.

2015-11-03 16:21:12 -08:00

MicroInstruction.cs

Work begun on Disk controller, stubs for keyboard and a few bugfixes and tweaks.

2015-09-04 18:03:47 -07:00

NovaDisassembler.cs

Fixed remaining disk issues; KSTAT bits 4-7 must always be "1," and head select change must reload current sector. Boot now loads in complete boot program and control is transferred to it.

2015-11-05 13:49:32 -08:00

Shifter.cs

A few fixes to DNS<- behavior and some tweaks to the disk controller. Boot code is progressing further.

2015-11-03 16:21:12 -08:00

UCodeDisassembler.cs

Fixed remaining disk issues; KSTAT bits 4-7 must always be "1," and head select change must reload current sector. Boot now loads in complete boot program and control is transferred to it.

2015-11-05 13:49:32 -08:00

UCodeMemory.cs

Sketching in the rest of the CPU

2015-08-19 16:50:40 -07:00