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livingcomputermuseum.Darkstar/D/CP/Source/BandBLTBBSubs.mc,v
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head 1.1;
branch 1.1.1;
access ;
symbols start:1.1.1.1 Xerox:1.1.1;
locks ; strict;
comment @# @;
1.1
date 2001.08.12.22.22.18; author freier; state Exp;
branches 1.1.1.1;
next ;
1.1.1.1
date 2001.08.12.22.22.18; author freier; state Exp;
branches ;
next ;
desc
@@
1.1
log
@Initial revision
@
text
@{
File name BandBLTBBSubs.mc
Description: Bit Transfer support subroutines for BandBLT op-code
Author: CrF CRF
Created: June 2, 1982 6:08 PM
LOG
July 6, 1982 3:50 PM CRF Created file (adapted from BBSubs.mc of 12-Jan-82 16:19:53).
1-Sep-84 19:15:20 DEG Add copyright notice
}
{ Copyright (C) 1982 by Xerox Corporation. All rights reserved.}
{
dT SUBROUTINE
first cycle = c* , one cycle long
This subroutine is used to aid in loading a link register.
REGISTERS
rL value to place in link register
Lx link register to be loaded
CALLING SEQUENCE
To load a link register
[] ¬ rL, YDisp ,c2;
[] ¬ retnum, Lx ¬ 0, XDisp, DISP4[dT] ,c3;
{rtn here} Noop ,c2, at[retnum,10,dTrets];
RETURNS THRU
dTRets
}
dT:
{0} RET[dTRets] ,c*, at[0,10,dT];
{1} RET[dTRets] ,c*, at[1,10,dT];
{2} RET[dTRets] ,c*, at[2,10,dT];
{3} RET[dTRets] ,c*, at[3,10,dT];
{4} RET[dTRets] ,c*, at[4,10,dT];
{5} RET[dTRets] ,c*, at[5,10,dT];
{6} RET[dTRets] ,c*, at[6,10,dT];
{7} RET[dTRets] ,c*, at[7,10,dT];
{8} RET[dTRets] ,c*, at[8,10,dT];
{9} RET[dTRets] ,c*, at[9,10,dT];
{0A} RET[dTRets] ,c*, at[0A,10,dT];
{0B} RET[dTRets] ,c*, at[0B,10,dT];
{0C} RET[dTRets] ,c*, at[0C,10,dT];
{0D} RET[dTRets] ,c*, at[0D,10,dT];
{0E} RET[dTRets] ,c*, at[0E,10,dT];
{0F} RET[dTRets] ,c*, at[0F,10,dT];
{
MoverhVToStkandRestore SUBROUTINE
length = 3 clicks
This subroutine is used to move the rhV registers into the stack.
USES
L0 caller
MOVES
Rbb1 to UDstBit
Q to USrcBit
EXITS TO RestoreRandRHRegs SUBROUTINE
}
MoverhVToStkandRestore:
rhL ¬ UrhLsave, GOTO[RestoreBlockRegsC3], ,c*{c1}, at[3,8,MoverhVToStkandRestore];
{
RestoreRandRHRegs SUBROUTINE
length = 2 1/3 clicks
This subroutine is used to restore the R registers and rh registers which were saved at the entry into BitBlt.
USES
L0 caller
RESTORES
L from ULsave
G from UGsave
PC from UPCsave
rhMDS from UrhMDSsave
rhPC from UrhPCsave
rhG from UrhGsave
rhL from UrhLsave
RETURNS THRU
RestoreCallers
RestoreBlockRegs entries are used by Block.mc in order to end up on the right cycle.
Block.mc saves all registers but does not use them all.
}
RestoreRandRHRegs:
rhL ¬ UrhLsave ,c*{c1}, at[2,8, LSEPReturn];
RestoreBlockRegsC3:
rhPC ¬ UrhPCsave ,c*{c2};
RestoreBlockRegsC2:
rhMDS ¬ UrhMDSsave ,c*{c3};
RestoreBlockRegsC1:
rhG ¬ UrhGsave ,c*{c1};
RestoreBlockRegsC3Initial:
{This entry can be used from Block only if rhG has not yet been modified.}
PC ¬ UPCsave ,c*{c2};
G ¬ UGsave, L0Disp ,c*{c3};
L ¬ ULsave, RET[RestoreCallers] ,c*{c1};
{
SrcLRemap SUBROUTINE
first cycle = c1 , last cycle = c3
This subroutine is used to remap the source virtual address.
CALLING ARGUMENTS
rhRet caller
USrcVALo virtual source page
rhVS virtual source rh
always UPDATES
SrcA real source page and word
rhSrcA real source rh
USES
UQSave saved value of Q
UVSsave saved contents of VS
uT saved contents or rhVS
RETURNS THRU
SrcRemapReturn
}
SrcLRemap: UQSave ¬ Q ,c1;
UXsave ¬ VS ,c2;
VS ¬ USrcVALoSav, dirDisp ,c3;
Q ¬ 0FF + 1, dirDISP[SrcInc] ,c1;
SLRFor: VS ¬ VS + Q, CarryBr ,c2, at[dir.forward,dirM,SrcInc];
Q ¬ rhVS + 1, LOOPHOLE[byteTiming], BRANCH[nofixSRhP,fixSRhP] ,c3;
fixSRhP: rhVS ¬ Q LRot0 ,c1;
fixRSh: Noop ,c2;
Noop ,c3;
nofixSRhP: Map ¬ USrcVALoSav ¬ [rhVS, VS], GOTO[mpS1] ,c1;
SLRBack: VS ¬ VS - Q, CarryBr ,c2, at[dir.backwards,dirM,SrcInc];
Q ¬ rhVS - 1, LOOPHOLE[byteTiming], BRANCH[fixSRhN,nofixSRhN] ,c3;
fixSRhN: rhVS ¬ Q LRot0, GOTO[fixRSh] ,c1;
nofixSRhN: Map ¬ USrcVALoSav ¬ [rhVS, VS], GOTO[mpS1] ,c1;
mpS1: Q ¬ SrcA and 0FF ,c2;
SrcA ¬ MD, rhSrcA ¬ MD, XRefBr ,c3;
Noop, BRANCH[fixSMap, nofixSMap] ,c1;
nofixSMap: SrcA ¬ SrcA and ~0FF ,c2;
SrcA ¬ SrcA or Q ,c3;
mfsR: Q ¬ UQSave ,c1;
[] ¬ rhRet, XDisp ,c2;
VS ¬ UXsave, RET[SrcRemapReturn] ,c3;
fixSMap: Noop ,c2;
[] ¬ SrcA LRot0, XwdDisp ,c3;
Map ¬ [rhVS, VS], DISP2[mapSFixes] ,c1;
mapSFixes:
MDR ¬ SrcA or 10, GOTO[mfS1] ,c2, at[0,4,mapSFixes];
MDR ¬ SrcA or 10, GOTO[mfS1] ,c2, at[1,4,mapSFixes];
MDR ¬ SrcA or 10, GOTO[mfS1] ,c2, at[2,4,mapSFixes];
GOTO[mfS1] ,c2, at[3,4,mapSFixes];
mfS1: SrcA ¬ SrcA and ~0FF ,c3;
SrcA ¬ SrcA or Q ,c1;
Noop ,c2;
GOTO[mfsR] ,c3;
{
DstMap SUBROUTINE
first cycle = c3 , last cycle = c3
Timing: 2 1/3 clicks, + 1 if fix map flags
This subroutine is used to map the destination virtual address.
CALLING ARGUMENTS
rhRet caller
UDstVALo virtual destination
rhVD virtual destination rh
always UPDATES
DstA real destination page and word
rhDstA real destination rh
UDstVALoSav virtual destination
uses as a temp
Q real destination page and word
RETURNS THRU
DstMapRet
}
DstMap: VD ¬ UDstVALoSav ,c3;
DstMapSpec: Map ¬ [rhVD, VD] ,c1;
UDstVALoSav ¬ VD ,c2;
DstA ¬ MD, rhDstA ¬ MD, XDirtyDisp ,c3;
DMapRef: MAR ¬ Q ¬ [rhDstA, VD + 0], BRANCH[upDMap, DMapOK, 1] ,c1;
DMapOK: [] ¬ rhRet, XDisp ,c2;
DstA ¬ Q, DISP2{RET}[DstMapRet] ,c3;
upDMap: Noop ,c2;
[] ¬ DstA LRot0, XwdDisp ,c3;
Map ¬ [rhVD, VD], DISP2[upDMapHere] ,c1;
upDMapHere:
MDR ¬ DstA or 0B0, GOTO[mapD] ,c2, at[0,4,upDMapHere];
MDR ¬ DstA or 0B0, GOTO[mapD] ,c2, at[1,4,upDMapHere];
Q ¬ qWriteProtect, GOTO[DFault] ,c2, at[2,4,upDMapHere];
Q ¬ qPageFault, GOTO[DFault] ,c2, at[3,4,upDMapHere];
mapD: Xbus ¬ 2, XDisp, GOTO[DMapRef] ,c3;
{
SrcMap SUBROUTINE
first cycle = c3 , last cycle = c3
Timing: 2 1/3 clicks, + 1 if fix map flags
This subroutine is used to map the source virtual address.
CALLING ARGUMENTS
rhRet caller
USrcVALo virtual source
rhVS virtual source rh
always UPDATES
SrcA real source page and word
rhSrcA real source rh
USrcVALoSav virtual destination
uses as a temp
Q real destination page and word
RETURNS THRU
SrcMapRet
}
SrcMap: VS ¬ USrcVALoSav ,c3;
SrcMapSpec: Map ¬ [rhVS, VS] ,c1;
USrcVALoSav ¬ VS ,c2;
SrcA ¬ MD, rhSrcA ¬ MD, XRefBr ,c3;
SMapRef: MAR ¬ Q ¬ [rhSrcA, VS + 0], BRANCH[upSMap, SMapOK] ,c1;
SMapOK: [] ¬ rhRet, XDisp ,c2;
SrcA ¬ Q, DISP3{RET}[SrcMapRet] ,c3;
upSMap: Noop ,c2;
[] ¬ SrcA LRot0, XwdDisp ,c3;
Map ¬ [rhVS, VS], DISP2[upSMapHere] ,c1;
upSMapHere: MDR ¬ SrcA or 10, GOTO[mapS] ,c2, at[0,4,upSMapHere];
MDR ¬ SrcA or 10, GOTO[mapS] ,c2, at[1,4,upSMapHere];
MDR ¬ SrcA or 10, GOTO[mapS] ,c2, at[2,4,upSMapHere];
Q ¬ qPageFault, GOTO[SFault] ,c2, at[3,4,upSMapHere];
mapS: [] ¬ 0, ZeroBr, GOTO[SMapRef] ,c3;
{
SavebbRegs SUBROUTINE
length = 2 2/3 clicks
This subroutine is used to move the rh registers in U.
Note that the caller MUST save L before calling.
MOVES
TOS STK
G to UGsave
rhG UrhGsave
PC to UPCsave
rhPC UrhPCsave
L UrhLsave
rhL UrhLsave
rhMDS UrhMDSsave
EXITS TO SavebbRegsRet
}
SavebbRegs:
L ¬ rhL ,c*{c2}, at[0,10,SavebbRegs];
SaveBlockRegs::
PC ¬ PC - 1 ,c*{c3};
SaveBlockRegsx: {Radr same as Ublock containing following Uregs}
UPCsave ¬ PC ,c*{c1};
{the following Uregs are at "xB" to allow "¬ rh"}
UGsave ¬ G ,c*{c2};
UrhLsave ¬ L, G ¬ rhG ,c*{c3};
UrhGsave ¬ G, PC ¬ rhPC ,c*{c1};
UrhPCsave ¬ PC, TOS ¬ rhMDS, pRet2, ,c*{c2};
UrhMDSsave ¬ TOS, RET[SavebbRegsRet], ,c*{c3};
{END}
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