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39 lines
7.1 KiB
Plaintext
39 lines
7.1 KiB
Plaintext
head 1.1;
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branch 1.1.1;
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access ;
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symbols start:1.1.1.1 Xerox:1.1.1;
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locks ; strict;
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comment @# @;
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1.1
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date 2001.08.12.22.22.22; author freier; state Exp;
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branches 1.1.1.1;
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next ;
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1.1.1.1
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date 2001.08.12.22.22.22; author freier; state Exp;
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branches ;
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next ;
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desc
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@@
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1.1
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log
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@Initial revision
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@
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text
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@{File name: InitDLion.mc
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Description: Mesa Emulator initialization,
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Last Edited by Dennis DEG : 1-Sep-84 22:06:25 Add copyright notice.
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Last Edited by AeF AEF : 13-Sep-83 16:03:33 Add support for 24-bit VA space
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Last Edited by AXD : 5-Aug-83 10:57:41 uPMask ¬ uPMask2 ¬ 1FF8 (was 0FFC)
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Last Edited by AeF AEF : September 22, 1982 5:12 PM Add uTMErRst initialization for MagTape
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Last Edited by AeF AEF : September 22, 1982 5:12 PM Delete uStartScan initialization
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Last Edited by AeF AEF : August 5, 1982 1:49 PM Change IOPage references
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Last Edited by AeF AEF : June 29, 1982 9:11 AM Add LSEP initializations
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Last Edited by AeF AEF : May 18, 1982 10:19 AM Change display registers
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Last Edited by AeF AEF : February 9, 1982 10:48 AM Replace Trident/Shugart conditional assembly initializations with branches based on CPBootDevice (accomodates etherbooting).
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Last Edited by Jim JXF : February 2, 1982 1:22 PM Initialize uE3FF.
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Last Edited by AeF AEF : January 6, 1982 4:01 PM Bug fix - branch to DisplayInit after initializing SAx000 registers
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Last Edited by Jim JXF : December 17, 1981 1:03 PM Use only two registers for initialization.
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Last Edited by J. JF : December 8, 1981 2:07 PM, Added new Trident reg. UF000
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JGS : November 17, 1981 1:24 PM New instruction set
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Last Edited by Jim JXF : November 8, 1981 5:00 PM initialize new display registers for smooth scrolling
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Last Edited by ETN : October 13, 1981 11:20 AM Trident Integration
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Last Edited by Jim JXF : April 1, 1981 2:09 PM: initialize UtbFlags
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Author: JGS ,
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}
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{ Copyright (C) 1981, 1982, 1983 by Xerox Corporation. All rights reserved. }
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Reserve[0F6F]; Reserve[0F78]; Reserve[0F7F,0FFF]; {Kernel}
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SetTask[0];
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{NOTE: we must use only two regisers (dY and dZ) for initialization so that register usage will not conflict with booting. For example, Protected.mc uses three registers to check for Ethernet timeout. We do Display initialization last since the Display microcode counts on two of its registers being initialized, and we use these two registers for all other initialization.}
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IfEqual[Config, 3, SkipTo[SetEtherBoot],];
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IfEqual[Config, 2, SkipTo[SetTrident],];
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OnceOnlyInit: CPBootDevice ¬ 0, c1;
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Noop, c2;
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SkipTo[SkipSetTrident];
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SetTrident!
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OnceOnlyInit: dY ¬ 0C, c1;
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CPBootDevice ¬ dY, c2;
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SkipSetTrident!
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Noop, c3;
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dZ ¬ LShift1 0FF, SE¬1, CANCELBR[$,0F], c1;
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SkipTo[StartInit];
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SetEtherBoot!
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OnceOnlyInit: dZ ¬ LShift1 0FF, SE¬1, CANCELBR[$,0F], c1;
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StartInit!
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dZ ¬ LShift1 dZ, SE¬1, c2;
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u3FF ¬ dZ, dZ ¬ dZ LShift1, SE¬1, c3;
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MCtl ¬ dZ + 1, c1;
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u7FF ¬ dZ, dZ ¬ dZ LShift1, SE¬1, c2;
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dZ ¬ dZ LShift1, SE¬1, c3;
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u1FFF ¬ dZ, dZ ¬ dZ LShift1, SE¬1, c1;
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u3FFF ¬ dZ, c2;
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dZ ¬ 64, c3;
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dZ ¬ dZ LRot8, Refresh, c1;
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UtbFlags ¬ dZ, c2;
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dZ ¬ LShift1 0F, SE¬1, c3;
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dZ ¬ dZ LRot8, ClrIntErr, c1;
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dZ ¬ dZ or 0F8, c2;
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uPMask ¬ dZ, c3;
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uPMask2 ¬ dZ, Refresh, c1;
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dZ ¬ 0E, c2;
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dZ ¬ dZ LRot12, c3;
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uPPMask ¬ dZ, Refresh, c1;
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dZ ¬ RShift1 0, SE ¬ 1, c2;
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u8000 ¬ dZ, c3;
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dY ¬ 0, Refresh, c1;
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dZ ¬ IOPage, c2;
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dZ ¬ dZ LRot8, c3;
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rhdZ ¬ IOPageHigh, c1;
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uIOPage ¬ dZ, c2;
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Noop, c3;
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{clear I/O page, TOS = 0}
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IOPageLoop:
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MAR ¬ [rhdZ, dZ+0], c1;
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MDR ¬ dY{=0}, dZ ¬ dZ + 1, PgCrOvDisp, c2;
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uPCCross ¬ 0, BRANCH[IOPageLoop,$,1], c3;
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EtherInit:
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Refresh, c1;
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dZ ¬ 55, c2;
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dZ ¬ dZ LRot8 or dZ, c3;
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uEPreamble ¬ dZ, Refresh, c1;
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dZ ¬ dZ or 0C0, c2;
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uELastPreamble ¬ dZ, c3;
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dZ ¬ LShift1 0FF, SE ¬ 1 {1FF}, c1;
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dZ ¬ LShift1 dZ, SE ¬ 1 {3FF}, c2;
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uE3FF ¬ dZ, c3;
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MagTapeInit:
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rTWc ¬ CTClrMEr, c1;
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rTWc ¬ rTWc LRot8, c2;
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uTMErRst ¬ rTWc, c3;
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DiskInit:
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Xbus ¬ CPBootDevice, XDisp, c1;
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BRANCH[SAx000Init, TridentInit, 7], c2;
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SAx000 Init:
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Noop, c3;
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{initialize 16 bit const used to clear mem errorflags}
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dZ ¬ CClearMemError, c1;
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dZ ¬ dZ LRot8, c2;
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U0C00 ¬ dZ, c3;
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{form top byte of status mask, bottom byte depends on drive connected}
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dY ¬ CHeadMsk, c1;
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dY ¬ dY LRot8, c2;
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Xbus ¬ KStatus, XwdDisp, c3;
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dZ ¬ CSA1MaxSectTst, BRANCH[SetSA1Const, SetSA4Const,2], c1;
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SetSA4Const:
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{sector test number}
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dZ ¬ CSA4MaxSectTst, c2, at[3,4,SetSA1Const];
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UMaxSectTst ¬ dZ, c3;
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{synchronization word and error mask}
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dZ ¬ dZ xor ~dZ, c1;
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dY ¬ dY or CSA4ErrMsk, GOTO[SetURegs], c2;
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SetSA1Const:
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UMaxSectTst ¬ dZ, c2, at[2,4,SetSA4Const];
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dZ ¬ CAddrMkHi, c3;
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{address mark and error mask}
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dZ ¬ dZ LRot8, c1;
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dY ¬ dY or CSA1ErrMsk, c2;
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SetURegs: dZ ¬ dZ or CAddrMkLo, c3;
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{save sync word or address mark; set status mask}
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USyncAdrMk ¬ dZ, Refresh, c1;
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UStatusMsk ¬ dY, c2;
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GOTO[DisplayInit], c3;
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TridentInit:
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Noop, c3;
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{Initialization of U0C00 -- A 16 bit constant used to clear memory error flags}
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dZ ¬ 0C ,c1;
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dZ ¬ dZ LRot8 ,c2;
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U0C00 ¬ dZ ,c3;
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{Initialization of U0C04 -- A 16 bit constant used to reset Control Tag in the Command register}
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dZ ¬ dZ or 4 ,c1;
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U0C04 ¬ dZ ,c2;
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dZ ¬ 2C ,c3;
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{Initialization of U2C04 -- A 16 bit constant used to set the Head Tag in the Command register}
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dZ ¬ dZ LRot8 ,c1;
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dZ ¬ dZ or 4 ,c2;
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U2C04 ¬ dZ ,c3;
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{Initialize U2C05 register and prepare initializing UCStatMask.}
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dZ ¬ dZ or 1 ,c1;
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U2C05 ¬ dZ ,c2;
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dZ ¬ 4E ,c3;
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{Initialize UCStatMask with 4E06.}
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dZ ¬ dZ LRot8 ,c1;
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dZ ¬ dZ or 6 ,c2;
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UCStatMask ¬ dZ ,c3;
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{Initialization of UF001 -- A 16 bit constant used to turn on "Sequence" for all four drives in the Control register}
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dZ ¬ 0F0 ,c1;
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dZ ¬ dZ LRot8 ,c2;
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UF000 ¬ dZ ,c3;
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{Initialization of UF001 -- A 16 bit constant used to turn on "Sequence" for all four drives in the Control register}
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dZ ¬ 1F ,c1;
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dZ ¬ dZ LRot12 ,c2;
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UF001 ¬ dZ ,c3;
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{Initialize U0400 register}
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dZ ¬ 4 ,c1;
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dZ ¬ dZ LRot8 ,c2;
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U0400 ¬ dZ ,c3;
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{Initialization of U4000 and KCmd register (TestCtl = 1) and USIP with 0.}
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KRegInit: KCmd ¬ dZ ¬ dZ LRot4 ,c1;
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U4000 ¬ dZ ,c2;
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USIP ¬ 0 ,c3;
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{Initialize KCtl with 0F000 .}
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dZ ¬ 0F ,c1;
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KCtl ¬ dZ LRot12 ,c2;
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dZ ¬ 0FF + 1 ,c3;
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{Initialize U0100.}
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EndInit: U0100 ¬ dZ, Refresh ,c1;
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Noop ,c2;
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Noop, ,c3;
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DisplayInit:
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rhdY ¬ IOPageHigh, Refresh, c1;
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dZ ¬ uIOPage, c2;
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Noop, c3;
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Noop, c1;
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dZ ¬ dZ + IOPage.DCSB.cursorMap, c2;
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uInitCurMapAddr ¬ dZ, c3;
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dZ ¬ 88, c1;
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dZ ¬ dZ LRot8, c2;
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dZ ¬ dZ or 22 {8822}, c3;
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uInitBorder ¬ dZ, Refresh, c1;
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dZ ¬ PicLenShifted, c2;
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dY ¬ dZ LRot8, c3;
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uInitCurBufAddr ¬ dY, c1;
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dZ ¬ LRot1 dZ, c2;
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dZ ¬ LRot1 dZ, rhdZ ¬ 0, c3;
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uInitPicLength ¬ dZ {328'x}, Refresh, c1;
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uClockBits ¬ 0, c2;
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Noop, c3;
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ClrDPRq, c1;
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dZ ¬ uPatchCount ¬ 0, c2;
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dY ¬ 7, c3;
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uCopyCount ¬ dY, Refresh, c1;
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uPatchLine ¬ dZ xor ~dZ, c2;
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dY ¬ 3F, c3;
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dY ¬ dY LRot4, c1;
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u3F0 ¬ dY, c2;
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dY ¬ 0FC, c3;
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dY ¬ dY LRot8, c1;
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uNormalFifo ¬ dY, c2;
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LsepInit: dY ¬ 10, c3;
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uDisableLSEP ¬ dY, c1;
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dY ¬ 15, c2;
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uEndBandScan ¬ dY, c3;
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dY ¬ 1B, c1;
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uStartActive ¬ dY, c2;
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dY ¬ 1, GOTO[DoneOnceOnlyInit] c3;
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@
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1.1.1.1
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log
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@first add
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@
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text
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@@
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