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39 lines
20 KiB
Plaintext
39 lines
20 KiB
Plaintext
head 1.1;
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branch 1.1.1;
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access ;
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symbols start:1.1.1.1 Xerox:1.1.1;
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locks ; strict;
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comment @# @;
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1.1
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date 2001.08.12.22.22.28; author freier; state Exp;
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branches 1.1.1.1;
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next ;
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1.1.1.1
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date 2001.08.12.22.22.28; author freier; state Exp;
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branches ;
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next ;
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desc
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@@
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1.1
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log
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@Initial revision
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@
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text
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@{File name: Stack.mc
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Author: R. RXG ,
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Created: 12 April 1979,
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Description: PrincOps version 3.0 microcode for Dandelion,
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(ADD, SUB, DADD, and DSUB based on Wildflower microcode by R. RxL , 18 Oct 1978),
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DEG , 1-Sep-84 19:49:04 add copyright notice.
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AXD , 15-Jun-83 18:31:45 new instruction set
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JGS , February 10, 1982 2:17 PM Restore stack on Divide traps,
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JGS , January 25, 1982 1:55 PM Don't advance PC on NILCKL,
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JGS , Dec 3, 1981 9:02 AM New instruction set,
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Last Edited: Jim JXF , March 26, 1981 3:16 PM: change SuppressTimingWarning to LOOPHOLE[niblTiming],
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Last Edited: RXG , April 8, 1980 5:29 PM,
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}
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{ Copyright (C) 1980, 1981, 1982, 1983 by Xerox Corporation. All rights reserved.}
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{
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REC Recover
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REC2 Recover Two
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DIS Discard
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DIS2 Discard Two
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EXCH Exchange
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DEXCH Double Exchange
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DUP Duplicate
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DDUP Double Duplicate
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BNDCK Bounds Check
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NEG Negate
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INC Increment
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DEC Decrement
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ADDSB Add Signed Byte
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DINC Double Increment
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DBL Double
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DDBL Double Double
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TRPL Triple
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LINT Lengthen Integer (ESC opcode)
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AND And
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IOR Inclusive Or
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XOR Exclusive Or (ESC opcode)
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SHIFTSB Shift Signed Byte
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ROTATE Rotate
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SHIFT Shift
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DAND Double And
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DIOR Double Inclusive Or
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DXOR Double Exclusive Or
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DSHIFT Double Shift
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ADD Add
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SUB Subtract
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DADD Double Add
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DSUB Double Subtract
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ADC Add Double to Cardinal
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ACD Add Cardinal to Double
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MUL Multiply
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UDIV Unsigned Divide (ESC opcode)
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LUDIV Long Unsigned Divide (ESC opcode)
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DCMP Double Compare
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UDCMP Unsigned Double Compare
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}
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{*****************************************************************************
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REC
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*****************************************************************************}
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@@REC: push, c1, opcode[242'b];
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STK ¬ TOS, PC ¬ PC + PC16, IBDisp, push, GOTO[SLa], c2;
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{*****************************************************************************
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REC2
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*****************************************************************************}
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@@REC2: push, c1, opcode[243'b];
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STK ¬ TOS, push, c2;
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TOS ¬ STK, pop, GOTO[@@REC], c3;
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{*****************************************************************************
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DIS
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*****************************************************************************}
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@@DIS: push, c1, opcode[244'b];
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STK ¬ TOS, PC ¬ PC + PC16, IBDisp, pop, GOTO[SLa], c2;
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{*****************************************************************************
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DIS2
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*****************************************************************************}
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@@DIS2: push, c1, opcode[245'b];
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STK ¬ TOS, pop, c2;
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TOS ¬ STK, pop, GOTO[@@DIS], c3;
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{*****************************************************************************
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EXCH
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*****************************************************************************}
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@@EXCH: T ¬ STK, fXpop, fZpop, push, GOTO[LIn], c1, opcode[246'b];
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{*****************************************************************************
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DEXCH
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*****************************************************************************}
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@@DEXCH: Rx ¬ STK, pop, c1, opcode[247'b];
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Q ¬ STK, pop, c2;
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T ¬ STK, fXpop, push, c3;
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DDTail: STK ¬ Rx, push, c1;
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STK ¬ TOS, push, PC ¬ PC + PC16, IBDisp, c2;
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STK ¬ T, TOS ¬ Q, DISPNI[OpTable], c3;
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{*****************************************************************************
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DUP
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*****************************************************************************}
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@@DUP: fXpop, push, c1, opcode[250'b];
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PC ¬ PC+PC16, push, IBDisp, c2;
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STK ¬ TOS, push, fZpop, DISPNI[OpTable], c3;
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{*****************************************************************************
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DDUP
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*****************************************************************************}
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@@DDUP: T ¬ STK, fXpop, fZpop, push, c1, opcode[251'b];
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Rx ¬ T, c2;
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Q ¬ TOS, GOTO[DDTail], c3;
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{*****************************************************************************
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EXDIS
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*****************************************************************************}
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@@EXDIS: pop, GOTO[NegIB], c1, opcode[252'b];
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{*****************************************************************************
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BNDCK
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*****************************************************************************}
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@@BNDCK: TT ¬ STK, fXpop, fZpop, push, c1, opcode[74'b];
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Ybus ¬ TT-TOS, CarryBr, push, c2;
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T ¬ sBoundsTrap, STK ¬ TOS, pop, BRANCH[NotBND, BND], c3;
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NotBND: TOS ¬ TT, pop, GOTO[NegIB], c1;
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BND: GOTO[Trapc2], c1;
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{*****************************************************************************
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NILCKL
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*****************************************************************************}
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@@NILCKL:
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[] ¬ STK or TOS, ZeroBr, fXpop, fZpop, c1, at[6,10,ESC2n];
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T ¬ sPointerTrap, push, BRANCH[NotNIL, NIL], c2;
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NotNIL: GOTO[NxtInstc1], c3;
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NIL: PC ¬ PC - 1, GOTO[BND], c3;
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{*****************************************************************************
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NEG
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*****************************************************************************}
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@@NEG: TOS ¬ -TOS, c1, opcode[253'b];
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NegIB: IBDisp, fXpop, push, c2;
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NegNI: PC ¬ PC+PC16, DISPNI[OpTable], c3;
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{*****************************************************************************
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INC
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*****************************************************************************}
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@@INC: TOS ¬ TOS + 1, GOTO[NegIB], c1, opcode[254'b];
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{*****************************************************************************
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DEC
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*****************************************************************************}
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@@DEC: TOS ¬ TOS - 1, GOTO[NegIB], c1, opcode[255'b];
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{*****************************************************************************
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ADDSB
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*****************************************************************************}
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@@ADDSB: T ¬ ib, XLDisp, c1, opcode[264'b];
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TT ¬ ~0FF xor T, BRANCH[AddSBP, AddSBN, XLowNeg], c2;
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AddSBP: TOS ¬ TOS + T, GOTO[Addpc2], c3;
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AddSBN: TOS ¬ TOS + TT, GOTO[Addpc2], c3;
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Addpc2: PC ¬ PC+PC16, GOTO[NegIB], c1;
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{*****************************************************************************
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DINC
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*****************************************************************************}
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@@DINC: T ¬ STK, fXpop, fZpop, push, c1, opcode[256'b];
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T ¬ T + 1, CarryBr, c2;
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STK ¬ T, BRANCH[DINCa, DINCb, 2], c3;
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DINCa: GOTO[NegIB], c1;
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DINCb: TOS ¬ TOS + 1, GOTO[NegIB], c1;
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{*****************************************************************************
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DBL
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*****************************************************************************}
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@@DBL: TOS ¬ LShift1 TOS, GOTO[NegIB], c1, opcode[257'b];
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{*****************************************************************************
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DDBL
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*****************************************************************************}
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@@DDBL: T ¬ LShift1 STK, SE ¬ 0, XHDisp, c1, opcode[260'b];
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STK ¬ T, fXpop, fZpop, push, BRANCH[DDBLa, DDBLb, 2], c2;
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DDBLa: TOS ¬ TOS LShift1, SE ¬ 0, GOTO[DDBLc], c3;
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DDBLb: TOS ¬ TOS LShift1, SE ¬ 1, GOTO[DDBLc], c3;
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DDBLc: GOTO[NegIB], c1;
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{*****************************************************************************
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TRPL
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*****************************************************************************}
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@@TRPL: T ¬ LShift1 TOS, GOTO[add], c1, opcode[261'b];
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{*****************************************************************************
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LINT
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*****************************************************************************}
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@@LINT: Ybus ¬ TOS, NegBr, fXpop, push, c1, at[8,10,ESC1n];
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push, IBDisp, BRANCH[LINTa, LINTb], c2;
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LINTa: TOS ¬ 0, push, fZpop, DISPNI[OpTable], c3;
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LINTb: TOS ¬ TOS xor ~TOS, push, fZpop, DISPNI[OpTable], c3;
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{*****************************************************************************
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IOR
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*****************************************************************************}
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@@IOR: TOS ¬ STK or TOS, pop, GOTO[NegIB], c1, opcode[263'b];
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{*****************************************************************************
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AND
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*****************************************************************************}
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@@AND: TOS ¬ STK and TOS, pop, GOTO[NegIB], c1, opcode[262'b];
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{*****************************************************************************
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XOR
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*****************************************************************************}
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@@XOR: TOS ¬ STK xor TOS, fXpop, fZpop, GOTO[IBDispOnly], c1, at[2,10,ESC1n];
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{*****************************************************************************
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ROTATE
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*****************************************************************************}
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@@ROTATE:
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T ¬ STK, pop, L2¬L2.Rotate, c1, at[6,10,ESC1n];
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rhT ¬ 0, Ybus ¬ TOS, YDisp, c2;
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TT ¬ T LRot1, fXpop, push, DISP4[CycleMask], c3;
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GOTO[IBDispOnly], c1, at[L2.Rotate,10,MaskRet];
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{*****************************************************************************
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SHIFTSB
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*****************************************************************************}
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{ shift= rotate (shift-1)[12-15] int mask final mask
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000F 15 left 14'd 7FFF 8000
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000E 14 left 13'd 3FFF C000
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: : : : :
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0001 1 left 0 1 FFFE
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0000 none 15'd FFFF FFFF
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FFFF 15 left(1 r) 14'd 7FFF 7FFF
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FFFE 14 left(2 r) 13'd 3FFF 3FFF
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: : : : :
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FFF2 2 left 1 3 3
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FFF1 (-15'd) 1 left(15 r) 0 1 1}
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{At entry to SHIFT, TOS=shift and STK=u. For CycleMask, shift is used to determine the rotation and (shift-1) the mask. FOR SHIFTSB and SHIFT, (shift-1) is placed in RH[T] and used for both shift and mask. Since we are rotating one less, we rotate it one before calling CycleMask. (shift-1) is used to determine the mask since this has the same conventions as the size specifier of a field descriptor. Thus shift=15 implies mask=7FFF, shift=1 implies mask=1, and shift=0 implies a mask of FFFF.
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At the beginning of the SHIFT code, a check is made to determine if the absolute value of shift is greater than 15 (which implies a zero result). If (shift-1) is positive, shifting is canceled if "shift" greater than 15. If (shift-1) is negative, shifting is canceld if (shift-1) is less than -16 (i.e., (shift-1) + 16 doesn't produce a carry).
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Link2 is loaded with the results of the (shift-1) test so that CycleMask returns to either SSBNorm or SSBInv. For values of shift from 15 to 1, i.e. (shift-1) positive, the mask which CycleMask computes should be inverted, so control goes to ShInvRet in this case. If (shift-1) was negative, control returns at ShNormRet and the mask in TT is not inverted.}
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@@SHIFTSB:
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Rx ¬ ib, XRefBr, c1, opcode[174'b];
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T ¬ ~0FF xor Rx, BRANCH[SSBa, SSBb], c2;
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SSBa: rhT ¬ (Rx-1) LRot0, NegBr, LOOPHOLE[niblTiming], GOTO[SSBc], c3;
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SSBb: rhT ¬ (T-1) LRot0, NegBr, LOOPHOLE[niblTiming], GOTO[SSBc], c3;
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SSBc: PC ¬ PC + PC16, L2¬L2.SSBInv, BRANCH[SSBd, SSBe], c1;
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SSBd: T ¬ TOS LRot1, Xbus ¬ rhT, XDisp, GOTO[SSBf], c2;
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SSBe: T ¬ TOS LRot1, Xbus ¬ rhT, XDisp, GOTO[SSBf], c2;
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SSBf: TT ¬ LRot1 T, DISP4[CycleMask], c3;
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{Subroutine CycleMask = 1 click}
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TOS ¬ ~TT and TOS, fXpop, push, GOTO[NegIB], c1, at[L2.SSBInv,10,MaskRet];
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TOS ¬ TOS and TT, fXpop, push, GOTO[NegIB], c1, at[L2.SSBNorm,10,MaskRet];
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{*****************************************************************************
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SHIFT
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*****************************************************************************}
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@@SHIFT: rhT ¬ Q ¬ (TOS-1) LRot0, NegBr, LOOPHOLE[niblTiming], c1, opcode[173'b];
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T ¬ STK LRot1, pop, L2¬L2.SSBInv, BRANCH[Sa, Sb], c2;
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Sa: [] ¬ TOS and ~0F, ZeroBr, GOTO[Sc], c3;
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Sb: [] ¬ Q + 0F + 1, CarryBr, GOTO[Sc], c3;
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Sc: TOS ¬ 0, BRANCH[NegIB, Sd], c1;
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Sd: Xbus ¬ rhT, XDisp, GOTO[SSBf], c2;
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{*****************************************************************************
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DAND
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*****************************************************************************}
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@@DAND: T ¬ STK, pop, c1, at[3,10,ESC1n];
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TOS ¬ TOS and STK, pop, c2;
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T ¬ T and STK, fXpop, fZpop, push, c3;
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DANDa: STK ¬ T, GOTO[IBDispOnly], c1;
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{*****************************************************************************
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DIOR
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*****************************************************************************}
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@@DIOR: T ¬ STK, pop, c1, at[4,10,ESC1n];
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TOS ¬ TOS or STK, pop, c2;
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T ¬ T or STK, fXpop, fZpop, push, GOTO[DANDa], c3;
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{*****************************************************************************
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DXOR
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*****************************************************************************}
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@@DXOR: T ¬ STK, pop, c1, at[5,10,ESC1n];
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TOS ¬ TOS xor STK, pop, c2;
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T ¬ T xor STK, fXpop, fZpop, push, GOTO[DANDa], c3;
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{*****************************************************************************
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DSHIFT
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*****************************************************************************}
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@@DSHIFT:
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Rx ¬ -TOS, NegBr, pop, c1, at[7,10,ESC1n];
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Q ¬ STK, fXpop, fZpop, push, BRANCH[DSa, DSb], c2;
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DSb: T ¬ TOS and 1F, L0¬0, c3;
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Ybus ¬ TOS xor T, NZeroBr, push, c1;
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TT ¬ STK, pop, BRANCH[DSc, DSd], c2;
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DSc: T ¬ T - 1, NegBr, L0Disp, c3;
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STK ¬ Q, DISP2[DSe], c1;
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DSe: TT ¬ DLShift1 TT, Cin ¬ 1, GOTO[DSc], c2, at[0,4,DSe];
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TOS ¬ TT, IBDisp, GOTO[DISPNIonly], c2, at[1,4,DSe];
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TT ¬ DRShift1 TT, Cin ¬ 1, GOTO[DSc], c2, at[2,4,DSe];
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TOS ¬ ~TT, IBDisp, GOTO[DISPNIonly], c2, at[3,4,DSe];
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DSa: T ¬ Rx and 1F, L0 ¬ 2, c3;
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Ybus ¬ Rx xor T, NZeroBr, push, c1;
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TT ¬ ~STK, pop, BRANCH[DSc, DSd], c2;
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DSd: STK ¬ TOS ¬ 0, GOTO[NxtInstc1], c3;
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{*****************************************************************************
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ADD
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*****************************************************************************}
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@@ADD: T ¬ STK, pop, c1, opcode[265'b];
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add: TOS ¬ T + TOS, IBDisp, fXpop, push, GOTO[NegNI], c2;
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{*****************************************************************************
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SUB
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*****************************************************************************}
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@@SUB: T ¬ STK, pop, c1, opcode[266'b];
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TOS ¬ T - TOS, IBDisp, fXpop, push, GOTO[NegNI], c2;
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{*****************************************************************************
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DADD
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*****************************************************************************}
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@@DADD: T ¬ STK {T ¬ b}, pop {point to u}, c1, opcode[267'b];
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Q ¬ STK {Q ¬ u}, pop {point to v}, c2;
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TT ¬ STK {TT ¬ v}, fXpop, fZpop, push, c3;
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DAdd: T ¬ T+TT {t¬v+b}, CarryBr, c1;
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STK ¬ T, PC ¬ PC+PC16, IBDisp, BRANCH[DANC, DAC], c2;
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DANC: TOS ¬ Q+TOS {TOS¬u+a}, DISPNI[OpTable], c3;
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DAC: TOS ¬ Q+TOS+1 {TOS¬u+a+1}, DISPNI[OpTable], c3;
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{*****************************************************************************
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DSUB
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*****************************************************************************}
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@@DSUB: T ¬ STK {T ¬ b}, pop {point to u}, c1, opcode[270'b];
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Q ¬ STK {Q ¬ u}, pop {point to v}, c2;
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TT ¬ STK {TT ¬ v}, fXpop, fZpop, push, {Underflow?} c3;
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T ¬ TT-T {t¬v-b}, CarryBr, c1;
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STK ¬ T, PC ¬ PC+PC16, IBDisp, BRANCH[DSNC, DSC], c2;
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DSNC: TOS ¬ Q-TOS-1 {TOS¬u-a-1}, DISPNI[OpTable], c3;
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DSC: TOS ¬ Q-TOS {TOS¬u-a}, DISPNI[OpTable], c3;
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{*****************************************************************************
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ADC
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*****************************************************************************}
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@@ADC: Q ¬ STK, pop, c1, opcode[271'b];
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TT ¬ STK, fXpop, fZpop, push, c2;
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PC ¬ PC+PC16, c3;
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ADCa: TT ¬ TT + TOS, CarryBr, push, fZpop, {RRIT comes here} c1;
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STK ¬ TT, TOS ¬ 0, IBDisp, BRANCH[DANC, DAC], c2;
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{*****************************************************************************
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ACD
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*****************************************************************************}
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@@ACD: T ¬ STK, pop, c1, opcode[272'b];
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Q ¬ 0, c2;
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TT ¬ STK, fXpop, fZpop, push, GOTO[DAdd], c3;
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{*****************************************************************************
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AL0IB
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*****************************************************************************}
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@@AL0IB: MAR ¬ [rhL, L+0], push, c1, opcode[273'b];
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T ¬ ib, c2;
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TOS ¬ MD, STK ¬ TOS, push, fZpop, c3;
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PC ¬ PC + PC16, GOTO[add], c1;
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{*****************************************************************************
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MUL
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*****************************************************************************}
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{Timing: 18 clicks - click of init + 16*(click of inner loop) + click of cleanup}
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{This code implements a basic add-shift unsigned mulitply. Q holds the multiplicand (s) and TOS the mulitplier (t). TT holds the loop count. T and Q are the concatenated double word result, with the most significant bits being formed in T and the least significant in Q. The DoubleRightShift1 shifts Cout of the current alu computation into bit 0 of the double length result (T,,Q). At the end, Q is pushed onto the stack, and T is left above the stack.}
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@@MUL: Q ¬ STK, fXpop, fZpop, push, c1, opcode[274'b];
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T ¬ 0, push {point at ~}, c2;
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PC ¬ PC+PC16, c3;
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TT ¬ 10, c1;
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MLoop: Ybus ¬ Q and 1, NZeroBr, c2;
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TT ¬ TT - 1, ZeroBr, BRANCH[MP0, MP1], c3;
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MP0: T ¬ DARShift1 (T+0), BRANCH[MLoop, MLDEnd], c1;
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MP1: T ¬ DARShift1 (T + TOS), BRANCH[MLoop, MLDEnd], c1;
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MLDEnd: STK ¬ T, pop, IBDisp, c2;
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TOS ¬ ~Q, pop, DISPNI[OpTable], c3;
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{*****************************************************************************
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UDIV
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*****************************************************************************}
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@@UDIV: T ¬ 0, L0¬0, c1, at[0C,10,ESC1n];
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Q ¬ STK, fXpop, fZpop, push, GOTO[LDiv], c2;
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{*****************************************************************************
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LUDIV
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*****************************************************************************}
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{This code implements a basic subtract-shift unsigned restoring divide. TOS holds the divisor (t) and the concatenation T,,Q holds the double length dividend (long). TT holds the loop count. The final quotient appears in Q and the remainder in T. The DoubleLeftShift1 shifts Cin into bit 17B of the accumulating quotient. At the end, Q is pushed onto the stack, and T is left above the stack.}
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@@LUDIV: T ¬ STK, pop, L0¬2, c1, at[0D,10,ESC1n];
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Q ¬ STK {long.low}, fXpop, fZpop, push, c2;
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LDiv: Ybus ¬ TOS, ZeroBr, c3;
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Ybus ¬ T - TOS, CarryBr, L0Disp, BRANCH[LDivNoZD, LDivZD], c1;
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LDivNoZD:
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TT ¬ sDivCheckTrap, DISP2[LDivOK], c2;
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LDivOK: TT ¬ 10, GOTO[Quot0], c3, at[0,4,LDivOK];
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TT ¬ 10, GOTO[Quot0], c3, at[2,4,LDivOK];
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LDivLoop:
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Ybus ¬ T - TOS, CarryBr, BRANCH[QuotUnk, QuotIs1], c2, at[0,2,LDivEnd];
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QuotUnk:
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TT ¬ TT - 1, ZeroBr, BRANCH[Quot0, Quot1, YOdd], c3, at[0,2,QuotIs1];
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QuotIs1:
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TT ¬ TT - 1, ZeroBr, CANCELBR[Quot1], c3, at[1,2,QuotUnk];
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Quot0: T ¬ DLShift1 T, SE¬0, NegBr, BRANCH[LDivLoop, LDivEnd], c1;
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Quot1: T ¬ DLShift1 (T - TOS), SE¬1, NegBr, BRANCH[LDivLoop, LDivEnd], c1;
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LDivEnd:
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push {point at rem}, BRANCH[RemAdj0, RemAdj1], c2, at[1,2,LDivLoop];
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RemAdj0:
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T ¬ RShift1 T, SE¬0, GOTO[DEnd], c3;
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RemAdj1:
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T ¬ RShift1 T, SE¬1, GOTO[DEnd], c3;
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DEnd: GOTO[MLDEnd], c1;
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LDivZD: TT ¬ sDivZeroTrap, DISP2[LDivOv,1], c2, at[1,2,LDivNoZD];
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LDivOv: T ¬ TT, GOTO[DivTrap], c3, at[1,4,LDivOK];
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T ¬ TT, push, GOTO[DivTrap], c3, at[3,4,LDivOK];
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DivTrap:
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PC ¬ PC - 1, GOTO[Trapc2], c1;
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{*****************************************************************************
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UDCMP
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*****************************************************************************}
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@@UDCMP: T ¬ STK {s}, pop, c1, opcode[276'b];
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TT ¬ STK {x}, pop, c2;
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comp: TT ¬ DARShift1 (TT-TOS) {x-r}, ZeroBr, c3;
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Ybus ¬ TT, NegBr {carry of x-r}, BRANCH[CHighNE, CompLow], c1;
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CHighNE:
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PC ¬ PC+PC16, IBDisp, pop, BRANCH[CompL, CompG], c2;
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CompL: TOS ¬ ~TOS xor TOS, fXpop, push, DISPNI[OpTable], c3;
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CompG: TOS ¬ 1, fXpop, push, DISPNI[OpTable], c3;
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CompLow:
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TT ¬ STK {y}, pop, CANCELBR[$], c2;
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TT ¬ DARShift1 (TT-T) {y-s}, ZeroBr, c3;
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Ybus ¬ TT, NegBr {carry of y-s}, BRANCH[CLowNE, CompE], c1;
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CLowNE: PC ¬ PC+PC16, IBDisp, BRANCH[CompL, CompG], c2;
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CompE: TOS ¬ 0, IBDisp, fXpop, push, CANCELBR[NegNI], c2;
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{*****************************************************************************
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DCMP
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*****************************************************************************}
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@@DCMP: T ¬ STK {s}, pop, c1, opcode[275'b];
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Q ¬ STK {x}, pop, c2;
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TT ¬ u8000, c3;
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TOS ¬ TOS + TT, c1;
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TT ¬ TT + Q, GOTO[comp] c2;
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@
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1.1.1.1
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log
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@first add
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@
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text
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@@
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