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39 lines
13 KiB
Plaintext
39 lines
13 KiB
Plaintext
head 1.1;
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branch 1.1.1;
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access ;
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symbols start:1.1.1.1 Xerox:1.1.1;
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locks ; strict;
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comment @;; @;
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1.1
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date 2001.08.12.22.22.11; author freier; state Exp;
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branches 1.1.1.1;
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next ;
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1.1.1.1
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date 2001.08.12.22.22.11; author freier; state Exp;
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branches ;
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next ;
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desc
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@@
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1.1
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log
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@Initial revision
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@
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text
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@; Copyright (C) 1980 by Xerox Corporation. All rights reserved.
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; Modification History:
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; - Created (June 4, 1980 12:59 PM)
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get "SysDefs.asm" ; system defs (tests defs below)
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get "MOONBootDefs.asm" ; system defs (tests defs below)
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get "MOONBootLinkDefs.asm" ; system defs (tests defs below)
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get "MOONLinkDefs.asm" ; system links
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get "MOONSysDefs.asm" ; system defs
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jmp RTCSetUp
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jmp HOSTSetUp
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jmp MOUSESetUp
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jmp DoCSTest5
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jmp DoCSTest6
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OutCSData:
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db 0,0,0,0,0,0 ; Write control store data (6 bytes)
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Mode:
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LocalTime:
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db 0,0,0,0 ; 32 bits of local time
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Time:
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db 0,0,0,0 ; 32 bits of time read from TOD clock
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Host5:
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ds 1 ; Least significant byte of address
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Host4:
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ds 1 ; host address byte
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Host3:
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ds 1 ; host address byte
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Host2:
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ds 1 ; host address byte
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Host1:
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ds 1 ; host address byte
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Host0:
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ds 1 ; Most significant byte of address
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CheckSumC:
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ds 1 ; Storage for computed checksum
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CheckSumP:
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ds 1 ; Storage for prom checksum
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nCheckSumP:
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ds 1 ; Storage for complemented prom checksum
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PassCount:
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ds 1
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RTCSetUp:
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mvi a,0
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sta ObservedData
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ReadTime:
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out TODClr ; Clear TOD interrupt.
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call WaitTODIntr ; Wait for TOD interrupt
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lxi h,LocalTime
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call ReadTOD ; Read time into LocalTime[0..3], power-fail to PF
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call WaitTODIntr ; Wait for TOD interrupt
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lxi h,Time
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call ReadTOD ; Read time into Time[0..3], power-fail to PF
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lxi h,LocalTime+3
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call IncrTime
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call CheckTODLocal ; Compare the two clocks
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ReadDone:
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jmp ExtLogPError
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; Subroutine: WaitTODIntr.
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; Wait for a TOD interrupt.
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; Clears TOD interrupt before returning.
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TODIntMaskI equ 10H ; Mask for Rev. G and higher IOP
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WaitTODIntr:
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lxi h,DelayVU0
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xchg
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lxi h,DelayVU1
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Delay:
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in MiscInput1 ; ***Rev G and higher IOP
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ani TODIntMaskI ; TOD interrupt?
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jz WaitTODIntr1
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out TODClr ; Clear TOD interrupt.
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ret
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WaitTODIntr1:
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mvi a,0
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dcx d
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cmp e
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jnz Delay
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cmp d
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jnz Delay
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cmp l
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jnz Delay1
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cmp h
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jnz Delay1
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mvi a,7
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sta ObservedData
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jmp ReadDone
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Delay1:
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dcx h
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jmp Delay
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; Subroutine: IncrTime.
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; Increment the 4-byte time quantity.
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; On entry: H,L points to the least-significant byte.
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IncrTime:
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; Increment number in maintenance panel.
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mvi b,3 ; 3 high bytes
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xra a ; Clear carry
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mov a,m ; Get low byte
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adi 1 ; Increment low byte
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mov m,a ; Store
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dcx h ; Point to next byte
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IncrTimeLoop:
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mov a,m ; Get next byte
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aci 0 ; Add carry
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mov m,a ; Store
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dcr b
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rz ; z => no more bytes
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dcx h ; Point to next byte
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jmp IncrTimeLoop
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; Subroutine: CheckTODLocal.
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; Comparet the time in Time vs. LocalTime.
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; Register usage: H,L - pointer to Time
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; D,E - pointer to LocalTime
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CheckTODLocal:
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lxi h,Time
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lxi d,LocalTime
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mvi b,4 ; 4 bytes
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CheckTODLocalLoop:
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ldax d ; Get LocalTime byte
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cmp m ; Compare to Time
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jnz TimeByteMismatch
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inx h ; Point to next bytes
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inx d
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dcr b ; Last byte?
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jnz CheckTODLocalLoop
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ret
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TimeByteMismatch:
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mvi a,7
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sta ObservedData
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ret
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; Subroutine to read the TOD clock and the power-fail indicator.
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; Clock is a 32 bit quantity.
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; In addition there is a bit to indicate whether the power had been disconnected
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; from the TOD clock..
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; Read the 32 bit time into Time (LSB) - Time+3 (MSB), power-fail to PF.
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; On entry: H,L - pointer to data buffer (most sig. byte) for time to be read into.
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ReadTOD:
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mvi a,ReadTimeMode
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out MiscControl1 ; Set TOD clock to Read Mode
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mvi c,4 ; 4 bytes of data
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ReadTODLoop:
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call ReadTODByte ; Read data byte, returned in A
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mov m,a ; Store in Time buffer
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inx h ; Move pointer
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dcr c ; last byte?
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jnz ReadTODLoop
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; Clear ReadTime Mode.
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ReadTODLoop1:
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mvi a,0
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out MiscControl1 ; Set TOD clock to not Read Mode
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ret
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; Subroutine to read a byte of the TOD clock.
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; Assumes the TOD clock is in Read Mode.
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; Bits from clock come in true, and most significant bit first.
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; Register usage: B - time data
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; C - bit counter
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ReadTODByte:
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push b ; Save B,C
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push d ; Save D,E
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mvi b,0 ; Clear B
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mvi c,8 ; 8 bits in byte
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ReadTODByteLoop:
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mov a,b ; Shift left partial byte
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rlc
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mov b,a ; Store back in B
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in MiscInput1 ; Read bit
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ani TODDataMask
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rlc ; Align to bit 7 position
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rlc
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ora b ; OR into data byte
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mov b,a ; Partial back to B
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; Shift TOD clock shift register
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mvi d,TODRead ; Mask for TODRead clock
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call DoMiscClock
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dcr c ; Done all 8 bits?
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jnz ReadTODByteLoop
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; TOD data byte in B. Store in memory.
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mov a,b ; Return in A
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pop d ; Restore D,E
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pop b ; Restore B,C
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ret
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DoMiscClock:
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mvi a,0FFH ; Set all high
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xra d ; Clear clock bit(s)
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out MiscClocks1
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xra d ; Toggle bit again
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out MiscClocks1
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ret
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HOSTSetUp:
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mvi a,0
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sta ObservedData
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mvi a,50
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sta PassCount
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jmp StartRead
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; Initialize the checksum algorithm.
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StartRead:
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lxi h,Host0 ; Point to most significant byte of Host address buffer
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lxi d,8000H+HostAddr ; Point to the HAddr prom
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call GetHAddrByte ; Get byte H0
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mov m,a ; Store in buffer
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dcx h ; Bump pointer
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mov b,a ; Save in B
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call GetHAddrByte ; Get the second byte
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mov m,a ; Store in buffer
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xra b ; Checksum ¬ Rot [H0 xor H1]
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rlc
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sta ChecksumC
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dcx h ; Bump pointer
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mvi c,4 ; Count for 4 subsequent bytes of address
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ReadHAddrLoop:
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call GetHAddrByte ; Get the next byte
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mov m,a ; Store in buffer;
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lda ChecksumC
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xra m ; A ¬ (ChecksumC) xor (next byte)
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rlc ; Rotate checksum
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sta ChecksumC ; Store partial checksum
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dcx h ; Point to next byte in buffer
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dcr c ; Decrement the count
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jnz ReadHAddrLoop ; nz => stil more address bytes
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call GetHAddrByte ; Get the next byte (the prom checksum)
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sta CheckSumP ; Save
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lxi h,CheckSumC ; Point to computed checksum
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xra m ; Compute CheckSumC xor ChecksumP
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jz CheckComplement ; z => The two checksums agree
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BadChecksum:
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mvi a,8 ; Computed checksum disagrees with prom checksum
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sta ObservedData
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jmp ReadDone
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CheckComplement:
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call GetHAddrByte ; Get the next byte (the prom complement checksum)
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sta nCheckSumP ; Save
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cma ; Complement
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xra m ; CheckSumC xor Complement(nChecksumP)
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jz ReadAddressDone ; z => The two checksums agree
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BadChecksumCompl:
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mvi a,8 ;Computed checksum disagrees with prom complemented checksum
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sta ObservedData
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jmp ReadDone
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ReadAddressDone:
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lda PassCount
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dcr a
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sta PassCount
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cpi 0
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jz ReadDone
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jmp StartRead
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MOUSESetUp:
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mvi a,0
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sta ObservedData
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lda KBFlag
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cpi 0
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jnz ExtLogPError
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in MiscInput1 ; ***Rev G and higher IOP
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ani MouseSwMask
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jz ExtLogPError
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mvi a,9
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sta ObservedData
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jmp ExtLogPError
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GetHAddrByte:
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push b ; Save B,C
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ldax d ; Get low nibble of byte
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ani 0FH ; Mask out garbage in high part of byte
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mov b,a ; Save in B
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inx d ; Point to next nibble
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ldax d ; Get high nibble of byte
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ani 0FH ; Mask out garbage in high part of byte
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inx d ; Point to next nibble
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rlc ; Move to high part of byte
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rlc
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rlc
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rlc
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ora b ; Form byte in A
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pop b
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ret
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; Write TPC.
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; On entry:
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; TPC address is in C (3 bits right-justified).
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; TPC data is in DE (12 bits right-justified).
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; Format of TPCHigh (write): TPCAddr[0:2],,TPCData[0:4]'
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; Format of TPCLow (write): don't care,,TPCData[5:11]'
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WriteTPC:
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push b ; Save B,C temporarily
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call ExtLeftAlignTPCAddr ; Left align 3 bits of address in C
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ori 0
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mov a,e ; Move TPC[4] into B for TPCHigh format
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ral ; TPC[4] into carry
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mov a,d ; get high part
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ral ; TPC[4] into B[7]
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cma ; complement for port
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ani 1FH ; Clear High 3 bits
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ora c ; OR in address
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out TPCHigh ; Set address, high data
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mov a,e ; Get low part (C[0] is don't care)
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cma ; complement for port
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out TPCLow ; send low data, Write TPC
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pop b
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ret
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DoCSTest5:
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mvi a,0
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sta OutCSData+0
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sta OutCSData+1
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mvi a,4
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sta OutCSData+2
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mvi a,80H
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sta OutCSData+3
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sta OutCSData+4
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sta OutCSData+5
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jmp CSTest
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DoCSTest6:
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mvi a,0FFH
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sta OutCSData+0
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sta OutCSData+1
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sta OutCSData+2
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sta OutCSData+3
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sta OutCSData+4
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sta OutCSData+5
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jmp CSTest
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; Control Store Test.
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; This test writes control store with varying data, and then reads and checks the data.
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; The type of data written depends on flags in Mode.
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; Constant, Random: Each CS location has the same byte repeated 6 times.
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; Address in location: Each CS location has the its address repeated 3 times.
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; TPC register 6 is used to write/read the control store.
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; Conventions: C contains the TPC address (3 bits right-justified)
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; DE contains the TPC data (12 bits right-justified)
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CSTest:
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mvi a,60H ; Use TPC address 6
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NextTPCAddr:
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sta Task
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lxi d,0 ; start with minimum address
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NextCSWrite:
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call GetNextCSData ; Data stored in OutCSData array
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call WriteTPC ; Write the TPC slot with the control store address
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call WriteCS ; Write data in OutCSData
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inx d ; Increment CSAddress
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mov a,d ; Check for CSAddress greater than 4095
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ani 1
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cnz CheckKeyboard
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mov a,d ; Check for CSAddress greater than 4095
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ani 0F0H ; Check high part
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jz NextCSWrite ; Do next CS address
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; Finished writing control store. Do read/checks.
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lxi d,0 ; start with minimum address
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NextCSRead:
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call GetNextCSData ; Data stored in OutCSData array
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call WriteTPC ; Write the TPC slot with the control store address
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call ExtReadCS ; Read data into InCSData
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call CheckCS ; Check data (breakpoints if error)
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IncCSAddr:
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inx d ; Increment CSAddress
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mov a,d ; Check for CSAddress greater than 4095
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ani 1
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cnz CheckKeyboard
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mov a,d ; Check for CSAddress greater than 4095
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ani 0F0H ; Check high part
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jz NextCSRead ; Do next CS address
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mvi a,70H
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sta Task
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jmp ExtDoInstTest
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CheckKeyboard:
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push d
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push h
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call ExtMonitorKeyIn
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pop h
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pop d
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ret
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; Subroutine to write a control store location.
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WriteCS:
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lda OutCSData+0 ; Get byte
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cma ; [4] Complement for CP LS240
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out CSa ; Write it
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lda OutCSData+1 ; Get byte
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cma ; [4] Complement for CP LS240
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out CSb
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lda OutCSData+2 ; Get byte
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cma ; [4] Complement for CP LS240
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out CSc
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lda OutCSData+3 ; Get byte
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cma ; [4] Complement for CP LS240
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out CSd
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lda OutCSData+4 ; Get byte
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cma ; [4] Complement for CP LS240
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out CSe
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lda OutCSData+5 ; Get byte
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cma ; [4] Complement for CP LS240
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out CSf
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ret
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; Subroutine to generate next CS data byte.
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; Check bits in Mode to determine whether constant, random, or address data.
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; If constant, next data is in Data.
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; If random, then next data is random.
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; If address, next data is CS address.
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; Random number generator simulates an 8-bit feedback shift register with
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; equation x8 (MSB) = x4 xor x3 xor x2 xor x0.
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GetNextCSData:
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push d
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inx d
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mov a,d
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ani 0FH
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mov d,a
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lda OutCSData+3
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ani 0F0H
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ora d
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sta OutCSData+3
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mov a,e
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ani 0F0H
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rrc
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rrc
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rrc
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rrc
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ani 0FH
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mov d,a
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lda OutCSData+4
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ani 0F0H
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ora d
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sta OutCSData+4
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mov a,e
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ani 0FH
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mov d,a
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lda OutCSData+5
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ani 0F0H
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ora d
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sta OutCSData+5
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lda OutCSData+0
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mov e,a
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lda OutCSData+1
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xra e
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mov e,a
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lda OutCSData+5
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xra e
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mov e,a
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lda OutCSData+3
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xra e
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mov e,a
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lda OutCSData+4
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xra e
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mov e,a
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lda OutCSData+2
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ani 7FH
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sta OutCSData+2
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xra e
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sta ExpectedData
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mvi e,8
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Parity:
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lda ExpectedData
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rlc
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sta ExpectedData
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jc SetParity
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Parity1:
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dcr e
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jnz Parity
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pop d
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ret ; RETURN
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SetParity:
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lda OutCSData+2
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xri 80H
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sta OutCSData+2
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jmp Parity1
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; Subroutine to check the data in InCSData with OutCSData.
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; For CP Rev. B, IOP Rev E, we have to check the following:
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; In0 = Out0 (Checks rA, rB)
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; In1 = Out1 (Checks aS, aF, aD)
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; In2 = Out2 (Checks EP, CIn, EnSU, mem, fS)
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; In3 = Out3 (Checks fY, INIA[0:3])
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; In4 = Out4 (Checks fX, INIA[4:7])
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; In5 = Out5 (Checks fZ, INIA[8:11])
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CheckCS:
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push b ; Save B, C
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push d ; Save D, E
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mvi e,0 ;COUNT
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lxi h,OutCSData
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lxi b,InCSData+0
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CheckCS1:
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ldax b
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cmp m
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jz OkCSData
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sta ObservedData
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mov a,m
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sta ExpectedData
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mov a,e
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pop d ; Restore D, E
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xchg ; Move to HL for store
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rlc
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rlc
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rlc
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rlc
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ani 0F0H
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ora h
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mov h,a
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shld ExpectedCSLow
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shld ObservedCSlow
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jmp ExtLogDError
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OkCSData:
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inx h
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inx b
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inr e
|
|
mov a,e
|
|
cpi 6
|
|
jnz CheckCS1
|
|
pop d ; Restore D, E
|
|
pop b ; Restore B, C
|
|
ret
|
|
|
|
|
|
end
|
|
@
|
|
|
|
|
|
1.1.1.1
|
|
log
|
|
@first add
|
|
@
|
|
text
|
|
@@
|