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39 lines
13 KiB
Plaintext
39 lines
13 KiB
Plaintext
head 1.1;
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branch 1.1.1;
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access ;
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symbols start:1.1.1.1 Xerox:1.1.1;
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locks ; strict;
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comment @;; @;
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1.1
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date 2001.08.12.22.22.12; author freier; state Exp;
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branches 1.1.1.1;
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next ;
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1.1.1.1
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date 2001.08.12.22.22.12; author freier; state Exp;
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branches ;
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next ;
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desc
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@@
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1.1
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log
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@Initial revision
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@
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text
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@; Copyright (C) 1980 by Xerox Corporation. All rights reserved.
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; Last modification by
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; Modification History:
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; - Created (June 4, 1980 12:59 PM)
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get "SysDefs.asm" ; system defs (tests defs below)
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get "MOONBootDefs.asm" ; system defs (tests defs below)
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get "MOONLinkDefs.asm" ; system links
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get "MOONSysDefs.asm" ; system defs
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;-----------------------------------------------------------------
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jmp VoiceSetUp
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;---------------------------------------------
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;
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; --------- Definitions ---------
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;
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VCont:
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equ 0C0H ; Voice Control Register I/O Address
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VStatusReg:
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equ 0C0H ; Voice Status Register I/O Address
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EnRst6:
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equ 1DH ; Enable RST 6.5 only
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ClrSpIntrReq:
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equ 0C3H ; Clear Speech Interrupt Request
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ResetVoice:
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equ 0C2H ; Reset Voice Controller
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IntrReg:
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equ 0E9H ; I/O Address of Interrupt Req Reg in IOP
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IntrMask:
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equ 4 ; Restart 6.5 bit in Interrupt Req Reg
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InFifoORMask:
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equ 8H ; Bit in Voice Status Reg
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OutFifoIRMask:
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equ 4H ; Bit in Voice Status Reg
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; { DMA }
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WriteChCtl:
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equ 40H ; Dma Write Channel bit
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ReadChCtl:
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equ 80H ; Dma Read Channel bit
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EnCh2:
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equ 4H ; Dma Mode: En Ch2
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EnCh3:
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equ 8H ; Dma Mode: En Ch3
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TCStop:
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equ 40H ; Dma Mode: Terminal-Count Stop
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SpOutFifo:
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equ 0C1H ; I/O address for Speech-Out Fifo
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SpInFifo:
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equ 0C1H ; I/O address for Speech-In Fifo
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DisableDma:
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equ 0
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DmaCh2EndCountMask:
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equ 4
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DmaCh3EndCountMask:
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equ 8
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; { Voice Uart }
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VUartData equ 0CEH ; I/O address
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VUartCtl equ 0CFH ; I/O address
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VUartStat equ 0CFH ; I/O address
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UartOff equ 0
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TxEnable equ 1H
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RxEnable equ 4H
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IntReset equ 40H
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DefaultCmd equ TxEnable+RxEnable
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VRxRdyMask equ 80H
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VTxRdyMask equ 40H
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; { Voice Control Reg }
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EnSpeechIn:
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equ 80H ; Enable Speech-In
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EnSpeechOut:
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equ 40H ; Enable Speech-Out
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EnFrameSync:
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equ 20H ; Start Frame Sync and TimeSlot1 running
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SelLoopBack:
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equ 10H ; Select internal loopback thru mpa
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BaudRate300:
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equ 0H
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BaudRate600:
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equ 4H
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BaudRate1200:
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equ 8H
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BaudRate2400:
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equ 0CH
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RS232CIntr:
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equ 0H
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SpeechDmaIntr:
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equ 2H
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SpeechFifoIntr:
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equ 3H
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SpByteCount:
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db 0 ; No. of bytes to be sent to/read from Fifo's (common use)
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SpOutData:
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dw FloppyBuf
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SpInData:
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dw FloppyBuf+SectorLen
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SpOutCount:
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db 0
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SpInCount:
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db 0
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DmaModeWord:
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db 0
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DmaStatWord:
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db 0
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EndCountStatus:
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db 0
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Test:
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db 0
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PassCount:
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db 0
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StopOnErr:
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db 0
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Initial:
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db 0
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Type:
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db 0
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Count:
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db 0
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VConWord:
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db 0
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VStatus:
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db 0
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UartStatus:
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db 0
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Expected:
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db 0
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Observed:
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db 0
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VoiceFault:
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db 0
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;
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; MAIN PROGRAM
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; --------- Initialize IOP ---------
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VoiceSetUp:
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LXI SP, UserStkStart
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call ExtTEIIndexAdd ; Returns with TestN * 16 + EIBuffer in h and l
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mov a,m ;
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sta Test
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inx h
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mov a,m ;
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sta PassCount
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inx h
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mov a,m ;
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sta StopOnErr
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inx h
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mov a,m ;
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sta Initial
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inx h
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mov a,m ;
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sta Type
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inx h
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mov a,m ;
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sta Count
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inx h
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mov a,m ;
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sta VConWord
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mvi a,0
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sta VStatus
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sta UartStatus
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sta Expected
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sta Observed
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sta VoiceFault
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TestDecode:
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; Set up Mode inst for UART : Asyn mode, 1 stop bit, no parity, 8 bit length, 16x mvi a,4EH
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out VUartCtl
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lda Test
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cpi 0
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jz Test0
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cpi 1
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jz Test1
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cpi 2
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jz Test2
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cpi 3
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jz Test3
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LogIt:
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LXI SP, UserStkStart
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call ExtTEIIndexAdd ; Returns with TestN * 16 + EIBuffer in h and l
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mvi e,11
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mvi d,0
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dad d
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lda VStatus
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mov m,a ;
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inx h
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lda UartStatus
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mov m,a ;
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inx h
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lda Expected
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mov m,a ;
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inx h
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lda Observed
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mov m,a ;
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inx h
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lda VoiceFault
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mov m,a ;
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cpi 0
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jz LogIt1
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call ExtMonitorKeyIn
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lda StopOnErr
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cpi 0
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jnz VoiceSetUp
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LogIt1:
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call ExtMonitorKeyIn
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lda PassCount
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dcr a
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sta PassCount
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jnz TestDecode
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mvi a,0
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out VCont
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jmp ExtMonitorTestDone
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; Connect loop-back connector to Voice Cable before start testing
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; Test Sections:
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; 0. Write to Voice Control Reg and read from Voice Status Reg
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; 1. Test Voice UART
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; 2. Write and read FIFO's by polling Fifo interrupt
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; 3. Write and read FIFO's by polling DMA End-Count interrupt
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;
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; Test0
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; Write to Voice Control Reg and read from Voice Status Reg
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; The following signals are wrap back : SpeechInActive, SpeechOutActive, Speech/RS232C', Cpu/Dma'
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Test0: lda VConWord
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out VCont
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in VStatusReg
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sta VStatus
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ani 33H ; Mask out bits that are not wrapped back
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sta Observed
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mov e,a
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lda Initial
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sta Expected
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cmp e
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jz LogIt
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mvi a,1
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sta VoiceFault
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jmp LogIt
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Test1:
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; Do an internal reset (by Command Inst) of UART to cause UART waiting for Mode inst
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mvi a,IntReset
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out VUartCtl
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; Set up Mode inst : Asyn mode, 1 stop bit, no parity, 8 bit length, 16x
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mvi a,4EH
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out VUartCtl
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; Set up Command inst : En Transmit, En Receive
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mvi a,DefaultCmd ; DefaultCmd = 5H
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out VUartCtl
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lda VConWord ; Set up internal or external loop back
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out VCont
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lda Count
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sta SpByteCount ; Clear counter
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Lda Initial
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sta Expected
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DoTransfer:
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call SendOneByte
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call CheckObserved
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lda SpByteCount
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dcr a ; increment counter
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sta SpByteCount
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jz LogIt
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call IncExpected
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jmp DoTransfer
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IncExpected:
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lda Type
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cpi 0
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rz
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Lda Expected
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inr a
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sta Expected
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ret
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; Subroutine : SendOneByte
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SendOneByte: nop
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; Transmit Expected
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VTxNotRdy:
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mvi d,2
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mvi e,VTxRdyMask
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call VWait
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lda Expected
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out VUartData
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; To receive data
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VRxNotRdy:
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mvi d,3
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mvi e,VRxRdyMask
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call VWait
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in VUartData
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sta Observed
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; Check for transmission error
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in VUartStat
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sta UartStatus
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ani 78H ; Look for Break detected, FE, OE, PE
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rz
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sta Observed
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mvi a,0
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sta Expected
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mvi a,4
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jmp StError
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VWait:
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push h
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lxi h,2000 ; Constant
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VWaitLoop:
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IN VStatusReg ; Watch Condition of UART
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sta VStatus
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ana e
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JZ VWaitExit
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dcx h
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mov a,l ; Check low
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cpi 0
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jnz VWaitLoop
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mov a,h ; Check high
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cpi 0
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jnz VWaitLoop
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Lda VStatus
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sta Observed
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mov a,e
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sta Expected
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mov a,d
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jmp StError
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VWaitExit:
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pop h
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ret
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StError:
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sta VoiceFault
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jmp LogIt
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; Subroutine : CheckObserved
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; Compare one byte only, Observed vs Expected
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CheckObserved:
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lda Observed
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lxi h,Expected ; Set up pointer to memory
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cmp m
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rz ; If equal, return (return on zero)
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mvi a,5
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sta VoiceFault
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jmp LogIt
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;
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; Test 2
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; Write and read FIFO's by polling Fifo interrupt ( InFifoOR or OutFifoIR ) for each byte
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; Set up VConWord ( = E3 or F3 ),
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; Data read back from Speech-In-Fifo is stored in SpInData
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Test2: lda Initial
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sta Expected
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call PrepareSpOutData
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call ClearSpInData
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call WrRdFifoByPollingFifoIntr
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call CheckFifoData
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jmp logIt
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; Subrountine : WrRdFifoByPollingFifoIntr
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WrRdFifoByPollingFifoIntr:
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lhld SpOutData ; Set up addr pointer for SpOutData in d & e
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xchg
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lhld SpInData ; Set up addr pointer for SpInData in h & l
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lda Count ;
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sta SpOutCount ;
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sta SpInCount ;
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; Reset Voice Controller, then load VCon to enable Speech
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mvi a,0
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out ResetVoice
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lda VConWord ; en SpIn & SpOut, int loop, sel cpu interrupt (E3 or F3)
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out VCont
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CheckIntr:
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In IntrReg
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ani IntrMask
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jnz CheckIntr
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in VStatusReg
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sta VStatus
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CheckInFifoOR:
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; lda VStatus
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ani InFifoORMask
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jnz CheckOutFifoIR ; If InFifo not OR, check OutFifo IR
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lda SpInCount ; Test for enough read
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cpi 0
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jz CheckOutFifoIR
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in SpInFifo
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mov m,a ; Store SpIn at SpInData, pointer in h & l
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inx h ; inc SpInData pointer
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lda SpInCount
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dcr a
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sta SpInCount
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CheckOutFifoIR:
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lda VStatus
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ani OutFifoIRMask
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jnz CheckBothCounts
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lda SpOutCount ; Test for enough write
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cpi 0
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jz CheckBothCounts
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xchg ; Exchange d,e <--> h,l
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mov a,m ; Move data from SpOutData to a, pointer in h & l
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out SpOutFifo
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xchg
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inx d ; inc SpOutData pointer
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lda SpOutCount
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dcr a
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sta SpOutCount
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jmp CheckIntr
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CheckBothCounts:
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lda SpInCount ; Check to see if have done enough write
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cpi 0 ; and read
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jnz CheckIntr
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lda SpOutCount
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cpi 0
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jnz CheckIntr
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WrRdFifoByPollingFifoIntrDone:
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mvi a,0
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out VCont ; Disable Speech
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ret
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;
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; Test 3
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; Write and read Fifo's with DMA
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; Use polling to look for DmaEndCount interrupt
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; Set up VConWord ( = E2 or F2 )
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; Data read back from Speech-In-Fifo is stored in SpInData
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Test3: lda Initial
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sta Expected
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call PrepareSpOutData
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call ClearSpInData
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call WrRdFifoWithDmaEndCtPolled
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call CheckFifoData
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jmp LogIt
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; Subroutine : WrRdFifoWithDmaEndCtPolled
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WrRdFifoWithDmaEndCtPolled:
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mvi a,0
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sta EndCountStatus ; Reset EndCountStatus
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mvi a,DisableDma
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out DmaMode ; Reset F/L flip flop in Dma Controller
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in DmaStatus ; Reset Dma Status Reg in Dma Controller
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mvi a,TCStop+EnCh2+EnCh3
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sta DmaModeWord ; Mode word for enable Ch2 and Ch3
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; Set up Dma starting address and byte-count
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lhld SpInData ; Set up pointer for SpInData in h & l
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call SetUpDmaIn
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lhld SpOutData ; Set up pointer for SpOutData in h & l
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call SetUpDmaOut
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; Reset Voice Controller, then load VCon to enable Speech,
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; then enable DMA
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out ResetVoice
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lda VConWord ; en SpIn & SpOut, int loop or not, sel DMA interrupt (E2 or F2)
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out VCont
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StartDma:
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lda DmaModeWord
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out DmaMode
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PollEndCount:
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In IntrReg
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ani IntrMask
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jnz PollEndCount
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mvi a,DisableDma
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out DmaMode
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out ClrSpIntrReq
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in DmaStatus
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sta DmaStatWord
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ani DmaCh2EndCountMask ; Look for Ch2 End Count
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jz CheckCh3
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lda EndCountStatus
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ori DmaCh2EndCountMask
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sta EndCountStatus
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CheckCh3:
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lda DmaStatWord
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ani DmaCh3EndCountMask ; Look for Ch3 End Count
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jz CheckBothChEnd
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lda EndCountStatus
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ori DmaCh3EndCountMask
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sta EndCountStatus
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CheckBothChEnd:
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lda EndCountStatus
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cpi DmaCh2EndCountMask+DmaCh3EndCountMask
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jz BothChEnded
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ReEnDma:
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lda DmaModeWord
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lxi h,EndCountStatus
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xra m ; ReEnable Ch which is not done
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sta DmaModeWord
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jmp StartDma
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BothChEnded:
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mvi a,0
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out VCont ; Disable Speech
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ret
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; Subroutine : SetUpDmaIn
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SetUpDmaIn:
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mov a,l ; low address byte
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out DmaCh2Addr
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mov a,h ; high address byte
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out DmaCh2Addr
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lda Count
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dcr a ; low count= Count - 1
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out DmaCh2Count
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mvi a,0 ; high count
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ori WriteChCtl ; OR with Dma Ch Write mode
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out DmaCh2Count
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ret
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; Subroutine : SetUpDmaOut
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SetUpDmaOut:
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mov a,l ; low address byte
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out DmaCh3Addr
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mov a,h ; high address byte
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out DmaCh3Addr
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lda Count
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dcr a ;low count= Count - 1
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out DmaCh3Count
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mvi a,0 ; high count
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ori ReadChCtl ; OR with Dma Ch Read mode
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out DmaCh3Count
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ret
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; Subroutine : CheckFifoData
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; Check data received in SpInData vs data sent in SpOutData
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; No. of bytes is specified in reg B
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CheckFifoData:
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lhld SpOutData ; Set up addr pointer for SpOutData in d & e
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xchg ; Exchange d,e <--> h,l
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lhld SpInData ; Set up addr pointer for SpInData in h & l
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lda Count
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sta SpByteCount ; also use SpByteCount as counter
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CheckAgain:
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xchg ; Exchange d,e <--> h,l
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mov a,m ; Move data from SpOutData to a, pointer in h & l
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sta Expected
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xchg ; Let h,l point to SpInData
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cmp m
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jz DataOK
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mov a,m ; Fifo data not compare
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sta Observed
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mvi a,6
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sta VoiceFault
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jmp LogIt
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; See SpInData vs SpOutData, position in buffers is specified in SpByteCount
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DataOK: mov a,m ; Fifo data not compare
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sta Observed
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lda SpByteCount
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dcr a
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sta SpByteCount
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rz
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inx d ; inc SpOutData pointer
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inx h ; inc SpInData pointer
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jmp CheckAgain
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;
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; Subroutine: PrepareSpOutData
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; Set Speech-Out-Data area to data pattern
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PrepareSpOutData:
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lhld SpOutData ; Set up pointer to SpOutData area
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lda Count
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mov e,a
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PrepareNextWord:
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lda Expected
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mov m,a ; Set up Speech-In data
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dcr e
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rz
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inx h
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call IncExpected
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jmp PrepareNextWord
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; Subroutine: ClearSpInData
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; Clear the Speech-In-Data area to 0's
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; No. of bytes is specified in reg B
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ClearSpInData:
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lhld SpInData ; Set up pointer to SpInData area
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mvi c,0 ; Set C = 0
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lda Count
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ClearNextWord:
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mov m,c ; Set up Speech-In data
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dcr a
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rz
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inx h
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jmp ClearNextWord
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END MoonVoice
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@
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1.1.1.1
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log
|
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@first add
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@
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text
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@@
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