mirror of
https://github.com/livingcomputermuseum/UniBone.git
synced 2026-04-28 04:46:19 +00:00
Better integration of CPU20 into UniBone framework
This commit is contained in:
Joerg Hoppe
@@ -27,8 +27,10 @@
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*/
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#include <string.h>
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#include <stdarg.h>
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#include "mailbox.h"
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#include "gpios.hpp" // ARM_DEBUG_PIN*
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#include "unibus.h"
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@@ -36,12 +38,79 @@
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#include "unibusdevice.hpp" // definition of class device_c
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#include "cpu.hpp"
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/* Adapter procs to Angelos CPU are not members of cpu_c calss
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int dbg = 0;
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/*** functions to be used by Angelos CPU emulator ***/
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/* Adapter procs to Angelos CPU are not members of cpu_c class
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and need one global reference.
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*/
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static cpu_c *the_cpu = NULL;
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static cpu_c *unibone_cpu = NULL;
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int dbg = 0;
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// route "trace()" to unibone_cpu->logger
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void unibone_log(unsigned msglevel, const char *srcfilename, unsigned srcline, const char *fmt,
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...) {
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va_list arg_ptr;
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va_start(arg_ptr, fmt);
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//vprintf(fmt, arg_ptr) ;
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//va_end(arg_ptr); va_start(arg_ptr, fmt);
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logger->vlog(unibone_cpu, msglevel, srcfilename, srcline, fmt, arg_ptr);
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va_end(arg_ptr);
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}
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void unibone_logdump(void) {
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// logger->dump(logger->default_filepath);
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logger->dump(); // stdout
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}
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// Result: 1 = OK, 0 = bus timeout
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int unibone_dato(unsigned addr, unsigned data) {
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uint16_t wordbuffer = (uint16_t) data;
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dbg = 1;
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unibusadapter->cpu_DATA_transfer(unibone_cpu->data_transfer_request, UNIBUS_CONTROL_DATO,
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addr, &wordbuffer);
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dbg = 0;
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return unibone_cpu->data_transfer_request.success;
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}
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int unibone_datob(unsigned addr, unsigned data) {
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uint16_t wordbuffer = (uint16_t) data;
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// TODO DATOB als 1 byte-DMA !
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dbg = 1;
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unibusadapter->cpu_DATA_transfer(unibone_cpu->data_transfer_request, UNIBUS_CONTROL_DATOB,
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addr, &wordbuffer);
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dbg = 0;
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return unibone_cpu->data_transfer_request.success;
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}
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int unibone_dati(unsigned addr, unsigned *data) {
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uint16_t wordbuffer;
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dbg = 1;
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unibusadapter->cpu_DATA_transfer(unibone_cpu->data_transfer_request, UNIBUS_CONTROL_DATI,
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addr, &wordbuffer);
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*data = wordbuffer;
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dbg = 0;
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// printf("DATI; ba=%o, data=%o\n", addr, *data) ;
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//if (!unibone_cpu->data_transfer_request.success)
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// ARM_DEBUG_PIN0(1) ;
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return unibone_cpu->data_transfer_request.success;
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}
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// CPU has changed the arbitration level, just forward
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// if this is called as result of INTR fector PC and PSW fetch,
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// mailbox->arbitrator.cpu_priority_level was CPU_PRIORITY_LEVEL_FETCHING
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// In that case, PRU is allowed now to grant BGs again.
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void unibone_prioritylevelchange(uint8_t level) {
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mailbox->arbitrator.cpu_priority_level = level;
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}
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// CPU executes RESET opcode -> pulses INIT line
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void unibone_bus_init(unsigned pulsewidth_ms) {
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unibus->init(pulsewidth_ms);
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}
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cpu_c::cpu_c() :
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unibuscpu_c() // super class constructor
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@@ -67,12 +136,13 @@ cpu_c::cpu_c() :
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memset(&ka11, 0, sizeof(ka11));
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ka11.bus = &bus;
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assert(the_cpu == NULL); // only one possible
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the_cpu = this; // Singleton
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// link to global instance ptr
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assert(unibone_cpu == NULL);// only one possible
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unibone_cpu = this; // Singleton
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}
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cpu_c::~cpu_c() {
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the_cpu = NULL;
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unibone_cpu = NULL;
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}
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bool cpu_c::on_param_changed(parameter_c *param) {
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@@ -90,42 +160,47 @@ bool cpu_c::on_param_changed(parameter_c *param) {
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void cpu_c::worker(unsigned instance) {
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UNUSED(instance); // only one
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timeout_c timeout;
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bool nxm;
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unsigned pc = 0;
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unsigned dr = 0760102;
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// bool nxm;
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// unsigned pc = 0;
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//unsigned dr = 0760102;
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unsigned opcode = 0;
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(void) opcode;
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power_event = power_event_none;
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// run with lowest priority, but without wait()
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// => get all remainingn CPU power
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// worker_init_realtime_priority(none_rt);
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//worker_init_realtime_priority(device_rt);
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while (!workers_terminate) {
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// run full speed!
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// speed control is diffiuclt, force to use more ARM cycles
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timeout.wait_us(1);
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for (int i = 0; i < 10; i++) {
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// timeout.wait_ms(10);
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if (runmode.value != (ka11.state != 0))
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ka11.state = runmode.value;
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ka11_condstep(&ka11);
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if (runmode.value != (ka11.state != 0)) {
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runmode.value = ka11.state != 0;
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printf("CPU HALT at %06o.\n", ka11.r[7]);
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}
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if (runmode.value != (ka11.state != 0))
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ka11.state = runmode.value;
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ka11_condstep(&ka11);
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if (runmode.value != (ka11.state != 0)) {
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runmode.value = ka11.state != 0;
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printf("CPU HALT at %06o.\n", ka11.r[7]) ;
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}
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// serialize asynchronous power events
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if (runmode.value) {
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// don't call power traps if HALTed. Also not on CONT.
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if (power_event == power_event_down)
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ka11_pwrdown(&the_cpu->ka11);
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// serialize asynchronous power events
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if (runmode.value) {
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// don't call power traps if HALTed. Also not on CONT.
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if (power_event == power_event_down)
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ka11_pwrdown(&unibone_cpu->ka11);
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// stop stop some time after power down
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else if (power_event == power_event_up)
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ka11_pwrup(&the_cpu->ka11);
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power_event = power_event_none; // processed
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}
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else if (power_event == power_event_up)
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ka11_pwrup(&unibone_cpu->ka11);
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power_event = power_event_none; // processed
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}
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if (init.value) {
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// user wants CPU reset
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ka11_reset(&ka11);
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init.value = 0;
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if (init.value) {
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// user wants CPU reset
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ka11_reset(&ka11);
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init.value = 0;
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}
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}
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#if 0
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@@ -175,55 +250,6 @@ void cpu_c::on_interrupt(uint16_t vector) {
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// push PC to stack
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// PC := *vector
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// PSW := *(vector+2)
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ka11_setintr(&the_cpu->ka11, vector);
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}
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extern "C" {
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// functions to be used by Angelos CPU emulator
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// Result: 1 = OK, 0 = bus timeout
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int unibone_dato(unsigned addr, unsigned data) {
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uint16_t wordbuffer = (uint16_t) data;
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dbg = 1;
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unibusadapter->cpu_DATA_transfer(the_cpu->data_transfer_request, UNIBUS_CONTROL_DATO, addr,
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&wordbuffer);
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dbg = 0;
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return the_cpu->data_transfer_request.success;
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}
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int unibone_datob(unsigned addr, unsigned data) {
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uint16_t wordbuffer = (uint16_t) data;
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// TODO DATOB als 1 byte-DMA !
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dbg = 1;
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unibusadapter->cpu_DATA_transfer(the_cpu->data_transfer_request, UNIBUS_CONTROL_DATOB, addr,
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&wordbuffer);
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dbg = 0;
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return the_cpu->data_transfer_request.success;
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}
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int unibone_dati(unsigned addr, unsigned *data) {
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uint16_t wordbuffer;
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dbg = 1;
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unibusadapter->cpu_DATA_transfer(the_cpu->data_transfer_request, UNIBUS_CONTROL_DATI, addr,
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&wordbuffer);
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*data = wordbuffer;
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dbg = 0;
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// printf("DATI; ba=%o, data=%o\n", addr, *data) ;
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return the_cpu->data_transfer_request.success;
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}
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// CPU has changed the arbitration level, just forward
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// if this is called as result of INTR fector PC and PSW fetch,
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// mailbox->arbitrator.cpu_priority_level was CPU_PRIORITY_LEVEL_FETCHING
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// In that case, PRU is allowed now to grant BGs again.
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void unibone_prioritylevelchange(uint8_t level) {
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mailbox->arbitrator.cpu_priority_level = level;
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}
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// CPU executes RESET opcode -> pulses INIT line
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void unibone_bus_init(unsigned pulsewidth_ms) {
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unibus->init(pulsewidth_ms);
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}
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ka11_setintr(&unibone_cpu->ka11, vector);
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}
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