github.com/livingcomputermuseum.UniBone
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4 Commits

Author SHA1 Message Date
Joerg Hoppe
f314317e2a DMA/INTR arbitration rework, emulated CPU20 with DMA&INTR, runs XXDP 2019-10-04 12:45:26 +02:00
Joerg Hoppe
b9d28d73c4 Start MSCP test, KW11 without "line monitor bit clear" 2019-09-19 12:58:38 +02:00
Joerg Hoppe
92714c1ebe Test "MultiArb": parallel INTR and DMA of DL11,RL11,RK11. 
Also MSCP IOX.
 2019-09-02 15:46:54 +02:00
Joerg Hoppe
cc42d60409 type in dir name 2019-09-02 15:37:29 +02:00