14 Commits

Author	SHA1	Message	Date
Joerg Hoppe	f314317e2a	DMA/INTR arbitration rework, emulated CPU20 with DMA&INTR, runs XXDP	2019-10-04 12:45:26 +02:00
Joerg Hoppe	47bf827c52	typo	2019-09-19 14:06:06 +02:00
Joerg Hoppe	e46b26b497	DL11 / KW11 ZDLD and RSX11 OK	2019-09-19 10:56:43 +02:00
Joerg Hoppe	f13b35bc08	KW11 LKS line monitor bit can only be cleared	2019-08-31 17:29:48 +02:00
Joerg Hoppe	3d1d9d3cf6	ACLO/DCLO/INIT moved from PRU to ARM ... INTR/DMA request params linked to device params on change	2019-08-19 13:12:42 +02:00
Joerg Hoppe	5ba6142b52	cleanup	2019-08-10 12:10:44 +02:00
Joerg Hoppe	39caffd6e6	Emulated DL11: stream interface parallel to RS232. ... demo: "dl11 rcv" and "dl11 wait" script extension cleanup	2019-08-10 10:19:05 +02:00
Joerg Hoppe	974aeed8eb	Big summer rework: ... Interrupt and DMA system now handles multiple levels and multiple devices in parallel Interrupt Register changes synced with INTR transaction DL11 and KW11 clock pass the ZDLDI0 diagnostic. Devices can now be enabled and disabled individually.	2019-08-02 16:45:54 +02:00
Joerg Hoppe	e23b2cf4d3	Dl11w rcv intr	2019-06-26 07:48:31 +02:00
Joerg Hoppe	01efdee04a	DL11W interrupt tests&fixes	2019-06-25 16:47:17 +02:00
Joerg Hoppe	81c3295e31	DL11 cleanup&fixes	2019-06-24 17:25:20 +02:00
Joerg Hoppe	28ab69050c	break enable, maintenance loopback	2019-06-24 14:51:18 +02:00
Joerg Hoppe	b749ce5897	SLU compiles, minimal function	2019-06-24 12:03:47 +02:00
Joerg Hoppe	4062386b97	Multiple parallel instances of device::worker() possible	2019-06-23 12:00:13 +02:00