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974aeed8eb
Interrupt and DMA system now handles multiple levels and multiple devices in parallel Interrupt Register changes synced with INTR transaction DL11 and KW11 clock pass the ZDLDI0 diagnostic. Devices can now be enabled and disabled individually.
102 lines
3.3 KiB
C++
102 lines
3.3 KiB
C++
/* iopageregister.cpp: handle ARM-PRU shared struct with device register descriptors
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Copyright (c) 2018, Joerg Hoppe
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j_hoppe@t-online.de, www.retrocmp.com
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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JOERG HOPPE BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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12-nov-2018 JH entered beta phase
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*/
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#define _IOPAGEREGISTER_CPP_
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#include <stdio.h>
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#include <string.h>
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#include "pru.hpp"
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//#include "pru1_config.h"
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#include "iopageregister.h"
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// Device register struct shared between PRU and ARM.
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// Place section with register struct at begin of 8K PRU_DMEM_1_0.
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volatile iopageregisters_t *deviceregisters;
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int iopageregisters_connect(void) {
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void *pru_shared_dataram;
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// get pointer to RAM
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if (prussdrv_map_prumem(PRU_DEVICEREGISTER_RAM_ID, &pru_shared_dataram)) {
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fprintf(stderr, "prussdrv_map_prumem() failed\n");
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return -1;
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}
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// prussdrv_map_prumem( PRU_MAILBOX_RAM_ID, &pru_shared_dataram) ;
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// point to struct inside RAM
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deviceregisters = (iopageregisters_t *) ((uint8_t *) pru_shared_dataram
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+ PRU_DEVICEREGISTER_RAM_OFFSET);
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// now ARM and PRU can access the device register descriptors
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return 0;
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}
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// initialize register tables to "empty"
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void iopageregisters_init() {
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unsigned i;
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uint32_t addr;
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// clear the pagetable: no address emulated, only IO page marked
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for (i = 0; i < PAGE_COUNT; i++)
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deviceregisters->pagetable[i] = PAGE_IGNORE;
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// mark IO pages
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for (addr = 0760000; addr < 01000000; addr += PAGE_SIZE)
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deviceregisters->pagetable[addr / PAGE_SIZE] = PAGE_IO;
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// clear the iopage addr map: no register assigned
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memset((void *) deviceregisters->iopage_register_handles, 0,
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sizeof(deviceregisters->iopage_register_handles));
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}
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void iopageregisters_print_tables(void) {
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unsigned i, n;
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uint32_t addr;
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printf("Primary page table:");
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for (i = 0; i < PAGE_COUNT; i++) {
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if ((i % 4) == 0) // 4 in a row
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printf("\n");
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printf("[%2d]@%06o = %d ", i, i * PAGE_SIZE, (int) deviceregisters->pagetable[i]);
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}
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printf("\n");
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printf("Secondary IO page register table:");
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n = 0; // counts valid registers
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for (addr = 0760000; addr < 0100000; addr += 2) {
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uint8_t reghandle;
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i = (addr - 0760000) / 2; // register handle
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reghandle = deviceregisters->iopage_register_handles[i];
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if (reghandle != 0) {
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if ((n % 4) == 0) // 4 in a row
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printf("\n");
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printf("[%3d]@%06o = 0x%02x ", i, addr, (unsigned) reghandle);
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n++;
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}
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}
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if (n == 0)
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printf(" no registers defined.");
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printf("\n");
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}
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