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mirror of https://github.com/livingcomputermuseum/cpus-pdp8.git synced 2026-01-12 00:12:44 +00:00
This commit is contained in:
brad 2010-10-26 11:18:34 +00:00
parent e2df0883bd
commit 67880416ac

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synth/s3board.ucf Normal file
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# s3board
NET "sysclk" TNM_NET = "CLK";
TIMESPEC "TS_CLK" = PERIOD "CLK" 20 ns HIGH 50 %;
OFFSET = IN 10 ns BEFORE "sysclk";
OFFSET = OUT 20 ns AFTER "sysclk";
NET "rs232_txd" LOC = "R13";
NET "rs232_rxd" LOC = "T13";
NET "button<0>" LOC = "M13";
NET "button<1>" LOC = "M14";
NET "button<2>" LOC = "L13";
NET "button<3>" LOC = "L14";
NET "led<0>" LOC = "K12";
NET "led<1>" LOC = "P14";
NET "led<2>" LOC = "L12";
NET "led<3>" LOC = "N14";
NET "led<4>" LOC = "P13";
NET "led<5>" LOC = "N12";
NET "led<6>" LOC = "P12";
NET "led<7>" LOC = "P11";
NET "sysclk" LOC = "T9";
#NET "ps2_clk" LOC = "M16";
#NET "ps2_data" LOC = "M15";
#NET "vga_red" LOC = "R12";
#NET "vga_blu" LOC = "R11";
#NET "vga_grn" LOC = "T12";
#NET "vga_hsync" LOC = "R9";
#NET "vga_vsync" LOC = "T10";
NET "sevenseg<7>" LOC = "E14";
NET "sevenseg<6>" LOC = "G13";
NET "sevenseg<5>" LOC = "N15";
NET "sevenseg<4>" LOC = "P15";
NET "sevenseg<3>" LOC = "R16";
NET "sevenseg<2>" LOC = "F13";
NET "sevenseg<1>" LOC = "N16";
NET "sevenseg<0>" LOC = "P16";
NET "sevenseg_an<3>" LOC = "E13";
NET "sevenseg_an<2>" LOC = "F14";
NET "sevenseg_an<1>" LOC = "G14";
NET "sevenseg_an<0>" LOC = "d14";
NET "slideswitch<0>" LOC = "F12";
NET "slideswitch<1>" LOC = "G12";
NET "slideswitch<2>" LOC = "H14";
NET "slideswitch<3>" LOC = "H13";
NET "slideswitch<4>" LOC = "J14";
NET "slideswitch<5>" LOC = "J13";
NET "slideswitch<6>" LOC = "K14";
NET "slideswitch<7>" LOC = "K13";
NET "sram_a<17>" LOC="L3";
NET "sram_a<16>" LOC="K5";
NET "sram_a<15>" LOC="K3";
NET "sram_a<14>" LOC="J3";
NET "sram_a<13>" LOC="J4";
NET "sram_a<12>" LOC="H4";
NET "sram_a<11>" LOC="H3";
NET "sram_a<10>" LOC="G5";
NET "sram_a<9>" LOC="E4";
NET "sram_a<8>" LOC="E3";
NET "sram_a<7>" LOC="F4";
NET "sram_a<6>" LOC="F3";
NET "sram_a<5>" LOC="G4";
NET "sram_a<4>" LOC="L4";
NET "sram_a<3>" LOC="M3";
NET "sram_a<2>" LOC="M4";
NET "sram_a<1>" LOC="N3";
NET "sram_a<0>" LOC="L5";
NET "sram_oe_n" LOC="K4";
NET "sram_we_n" LOC="G3";
NET "sram1_io<15>" LOC="R1";
NET "sram1_io<14>" LOC="P1";
NET "sram1_io<13>" LOC="L2";
NET "sram1_io<12>" LOC="J2";
NET "sram1_io<11>" LOC="H1";
NET "sram1_io<10>" LOC="F2";
NET "sram1_io<9>" LOC="P8";
NET "sram1_io<8>" LOC="D3";
NET "sram1_io<7>" LOC="B1";
NET "sram1_io<6>" LOC="C1";
NET "sram1_io<5>" LOC="C2";
NET "sram1_io<4>" LOC="R5";
NET "sram1_io<3>" LOC="T5";
NET "sram1_io<2>" LOC="R6";
NET "sram1_io<1>" LOC="T8";
NET "sram1_io<0>" LOC="N7";
NET "sram1_ce_n" LOC="P7";
NET "sram1_ub_n" LOC="T4";
NET "sram1_lb_n" LOC="P6";
NET "sram_a<17>" FAST;
NET "sram_a<16>" FAST;
NET "sram_a<15>" FAST;
NET "sram_a<14>" FAST;
NET "sram_a<13>" FAST;
NET "sram_a<12>" FAST;
NET "sram_a<11>" FAST;
NET "sram_a<10>" FAST;
NET "sram_a<9>" FAST;
NET "sram_a<8>" FAST;
NET "sram_a<7>" FAST;
NET "sram_a<6>" FAST;
NET "sram_a<5>" FAST;
NET "sram_a<4>" FAST;
NET "sram_a<3>" FAST;
NET "sram_a<2>" FAST;
NET "sram_a<1>" FAST;
NET "sram_a<0>" FAST;
NET "sram_oe_n" FAST;
NET "sram_we_n" FAST;
NET "sram1_io<15>" FAST;
NET "sram1_io<14>" FAST;
NET "sram1_io<13>" FAST;
NET "sram1_io<12>" FAST;
NET "sram1_io<11>" FAST;
NET "sram1_io<10>" FAST;
NET "sram1_io<9>" FAST;
NET "sram1_io<8>" FAST;
NET "sram1_io<7>" FAST;
NET "sram1_io<6>" FAST;
NET "sram1_io<5>" FAST;
NET "sram1_io<4>" FAST;
NET "sram1_io<3>" FAST;
NET "sram1_io<2>" FAST;
NET "sram1_io<1>" FAST;
NET "sram1_io<0>" FAST;
NET "sram1_ce_n" FAST;
NET "sram1_ub_n" FAST;
NET "sram1_lb_n" FAST;
NET "sram2_io<15>" LOC="N1";
NET "sram2_io<14>" LOC="M1";
NET "sram2_io<13>" LOC="K2";
NET "sram2_io<12>" LOC="C3";
NET "sram2_io<11>" LOC="F5";
NET "sram2_io<10>" LOC="G1";
NET "sram2_io<9>" LOC="E2";
NET "sram2_io<8>" LOC="D2";
NET "sram2_io<7>" LOC="D1";
NET "sram2_io<6>" LOC="E1";
NET "sram2_io<5>" LOC="G2";
NET "sram2_io<4>" LOC="J1";
NET "sram2_io<3>" LOC="K1";
NET "sram2_io<2>" LOC="M2";
NET "sram2_io<1>" LOC="N2";
NET "sram2_io<0>" LOC="P2";
NET "sram2_ce_n" LOC="N5";
NET "sram2_ub_n" LOC="R4";
NET "sram2_lb_n" LOC="P5";
NET "ide_data_bus<15>" LOC="A5";
NET "ide_data_bus<14>" LOC="A4";
NET "ide_data_bus<13>" LOC="A3";
NET "ide_data_bus<12>" LOC="C9";
NET "ide_data_bus<11>" LOC="C8";
NET "ide_data_bus<10>" LOC="C7";
NET "ide_data_bus<9>" LOC="C6";
NET "ide_data_bus<8>" LOC="C5";
NET "ide_data_bus<7>" LOC="D5";
NET "ide_data_bus<6>" LOC="D6";
NET "ide_data_bus<5>" LOC="E7";
NET "ide_data_bus<4>" LOC="D7";
NET "ide_data_bus<3>" LOC="D8";
NET "ide_data_bus<2>" LOC="D10";
NET "ide_data_bus<1>" LOC="B4";
NET "ide_data_bus<0>" LOC="B5";
NET "ide_diow" LOC="A8";
NET "ide_dior" LOC="B10";
NET "ide_cs<0>" LOC="A9";
NET "ide_cs<1>" LOC="A10";
NET "ide_da<0>" LOC="B12";
NET "ide_da<1>" LOC="B13";
NET "ide_da<2>" LOC="B14";
NET "ide_data_bus<15>" IOSTANDARD=LVTTL;
NET "ide_data_bus<14>" IOSTANDARD=LVTTL;
NET "ide_data_bus<13>" IOSTANDARD=LVTTL;
NET "ide_data_bus<12>" IOSTANDARD=LVTTL;
NET "ide_data_bus<11>" IOSTANDARD=LVTTL;
NET "ide_data_bus<10>" IOSTANDARD=LVTTL;
NET "ide_data_bus<9>" IOSTANDARD=LVTTL;
NET "ide_data_bus<8>" IOSTANDARD=LVTTL;
NET "ide_data_bus<7>" IOSTANDARD=LVTTL;
NET "ide_data_bus<6>" IOSTANDARD=LVTTL;
NET "ide_data_bus<5>" IOSTANDARD=LVTTL;
NET "ide_data_bus<4>" IOSTANDARD=LVTTL;
NET "ide_data_bus<3>" IOSTANDARD=LVTTL;
NET "ide_data_bus<2>" IOSTANDARD=LVTTL;
NET "ide_data_bus<1>" IOSTANDARD=LVTTL;
NET "ide_data_bus<0>" IOSTANDARD=LVTTL;
NET "ide_dior" IOSTANDARD=LVTTL;
NET "ide_diow" IOSTANDARD=LVTTL;
NET "ide_da<2>" IOSTANDARD=LVTTL;
NET "ide_da<1>" IOSTANDARD=LVTTL;
NET "ide_da<0>" IOSTANDARD=LVTTL;
NET "ide_cs<1>" IOSTANDARD=LVTTL;
NET "ide_cs<0>" IOSTANDARD=LVTTL;
INST "ide_data_bus<0>" DRIVE=24;
INST "ide_data_bus<1>" DRIVE=24;
INST "ide_data_bus<2>" DRIVE=24;
INST "ide_data_bus<3>" DRIVE=24;
INST "ide_data_bus<4>" DRIVE=24;
INST "ide_data_bus<5>" DRIVE=24;
INST "ide_data_bus<6>" DRIVE=24;
INST "ide_data_bus<7>" DRIVE=24;