mirror of
https://github.com/livingcomputermuseum/sImlac.git
synced 2026-01-11 23:53:24 +00:00
Fixes for disassembly of uncached instructions; enhancements of display instruction disassembly. More refactoring of display processor code.
This commit is contained in:
Josh Dersch
parent
fcf0c96b6c
commit
4c65f894be
@ -210,7 +210,7 @@ namespace imlac
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public abstract void InvalidateCache(ushort address);
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public abstract string Disassemble(ushort address, DisplayProcessorMode mode);
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public abstract string Disassemble(ushort address, DisplayProcessorMode mode, out int length);
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public abstract void Clock();
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@ -291,10 +291,11 @@ namespace imlac
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protected abstract class DisplayInstructionBase
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{
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public DisplayInstructionBase(ushort word, DisplayProcessorMode mode)
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public DisplayInstructionBase(ushort word, ushort address, DisplayProcessorMode mode)
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{
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_usageMode = mode;
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_word = word;
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_address = address;
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Decode();
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}
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@ -324,17 +325,182 @@ namespace imlac
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/// </summary>
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/// <param name="mode"></param>
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/// <returns></returns>
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public abstract string Disassemble(DisplayProcessorMode mode);
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public abstract string Disassemble(DisplayProcessorMode mode, Memory mem, out int length);
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/// <summary>
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/// Implemented to provide decoding of this instruction word.
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/// </summary>
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protected abstract void Decode();
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protected string DisassembleIncrement()
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{
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return DisassembleIncrementHalf(ImmediateHalf.First) + " | " + DisassembleIncrementHalf(ImmediateHalf.Second);
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}
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private string DisassembleIncrementHalf(ImmediateHalf half)
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{
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string ret = string.Empty;
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int halfWord = half == ImmediateHalf.First ? (_word & 0xff00) >> 8 : (_word & 0xff);
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// translate the half word to vector movements or escapes
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// special case for "Enter Immediate mode" halfword (030) in first half.
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if (half == ImmediateHalf.First && halfWord == 0x30)
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{
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ret += "E";
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}
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else if ((halfWord & 0x80) == 0)
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{
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if ((halfWord & 0x10) != 0)
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{
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ret += "IX ";
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}
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if ((halfWord & 0x08) != 0)
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{
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ret += "ZX ";
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}
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if (half == ImmediateHalf.Second &&
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(halfWord & 0x04) != 0)
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{
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ret += "E PPM ";
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}
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if ((halfWord & 0x02) != 0)
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{
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ret += "IY ";
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}
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if ((halfWord & 0x01) != 0)
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{
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ret += "ZY ";
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}
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if ((halfWord & 0x40) != 0)
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{
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if ((halfWord & 0x20) != 0)
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{
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// escape and return
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ret += "F RJM";
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}
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else
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{
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// Escape
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ret += "F";
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}
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}
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}
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else
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{
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int xSign = ((halfWord & 0x20) == 0) ? 1 : -1;
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int xMag = (int)(((halfWord & 0x18) >> 3));
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int ySign = (int)(((halfWord & 0x04) == 0) ? 1 : -1);
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int yMag = (int)((halfWord & 0x03));
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ret += String.Format("{0},{1} {2}", xMag * xSign, yMag * ySign, (halfWord & 0x40) == 0 ? "OFF" : "ON");
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}
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return ret;
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}
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protected string DisassembleProcessor(Memory mem, out int length)
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{
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length = 1;
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string ret = String.Empty;
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if (_opcode == DisplayOpcode.DOPR)
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{
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string[] codes = { "INV0 ", "INV1 ", "INV2 ", "INV3 ", "DDSP ", "DRJM ", "DDYM ", "DDXM ", "DIYM ", "DIXM ", "DHVC ", "DHLT " };
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for (int i = 4; i < 11; i++)
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{
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if ((_data & (0x01) << i) != 0)
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{
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if (!string.IsNullOrEmpty(ret))
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{
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ret += ",";
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}
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ret += codes[i];
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}
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}
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// display halt if bit 4 is unset
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if ((_data & 0x800) == 0)
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{
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ret += " DHLT ";
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}
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// F/C ops:
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int f = (_data & 0xc) >> 2;
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int c = _data & 0x3;
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switch (f)
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{
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case 0x0:
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// nothing
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if (c == 1)
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{
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ret += String.Format("DADR");
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}
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break;
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case 0x1:
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ret += String.Format("DSTS {0}", c);
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break;
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case 0x2:
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ret += String.Format("DSTB {0}", c);
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break;
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case 0x3:
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ret += String.Format("DLPN {0}", c);
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break;
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}
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}
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else
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{
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switch (_opcode)
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{
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case DisplayOpcode.DEIM:
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ret = String.Format("DEIM | {0} {1}",
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DisassembleIncrementHalf(ImmediateHalf.Second),
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(_word & 0xff00) == 0x3800 ? "Enter PPM" : String.Empty);
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break;
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case DisplayOpcode.DLXA:
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ret = String.Format("DLXA {0} ({1})", Helpers.ToOctal(_data), _data);
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break;
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case DisplayOpcode.DLYA:
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ret = String.Format("DLXA {0} ({1})", Helpers.ToOctal(_data), _data);
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break;
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case DisplayOpcode.DJMS:
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ret = String.Format("DJMS {0}", Helpers.ToOctal(_data));
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break;
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case DisplayOpcode.DJMP:
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ret = String.Format("DJMP {0}", Helpers.ToOctal(_data));
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break;
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default:
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ret = DisassembleExtended(mem, out length);
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break;
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}
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}
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return ret;
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}
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protected abstract string DisassembleExtended(Memory mem, out int length);
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protected DisplayOpcode _opcode;
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protected ushort _data;
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protected DisplayProcessorMode _usageMode;
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protected ushort _word;
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protected ushort _address;
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}
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}
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@ -53,7 +53,7 @@ namespace imlac
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_instructionCache[address & Memory.SizeMask] = null;
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}
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public override string Disassemble(ushort address, DisplayProcessorMode mode)
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public override string Disassemble(ushort address, DisplayProcessorMode mode, out int length)
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{
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//
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// Return a precached instruction if we have it due to previous execution
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@ -62,11 +62,11 @@ namespace imlac
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//
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if (_instructionCache[address & Memory.SizeMask] != null)
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{
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return _instructionCache[address & Memory.SizeMask].Disassemble(mode);
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return _instructionCache[address & Memory.SizeMask].Disassemble(mode, _mem, out length);
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}
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else
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{
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return new PDS1DisplayInstruction((ushort)(address & Memory.SizeMask), mode).Disassemble(mode);
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return new PDS1DisplayInstruction(_mem.Fetch(address), address, mode).Disassemble(mode, _mem, out length);
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}
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}
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@ -545,7 +545,7 @@ namespace imlac
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{
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if (_instructionCache[address & Memory.SizeMask] == null)
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{
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_instructionCache[address & Memory.SizeMask] = new PDS1DisplayInstruction(_mem.Fetch(address), mode);
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_instructionCache[address & Memory.SizeMask] = new PDS1DisplayInstruction(_mem.Fetch(address), address, mode);
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}
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return _instructionCache[address & Memory.SizeMask];
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@ -568,11 +568,11 @@ namespace imlac
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/// </summary>
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private class PDS1DisplayInstruction : DisplayInstructionBase
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{
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public PDS1DisplayInstruction(ushort word, DisplayProcessorMode mode) : base (word, mode)
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public PDS1DisplayInstruction(ushort word, ushort address, DisplayProcessorMode mode) : base (word, address, mode)
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{
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}
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public override string Disassemble(DisplayProcessorMode mode)
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public override string Disassemble(DisplayProcessorMode mode, Memory mem, out int length)
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{
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if (mode == DisplayProcessorMode.Indeterminate)
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{
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@ -582,12 +582,14 @@ namespace imlac
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switch (mode)
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{
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case DisplayProcessorMode.Increment:
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length = 1;
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return DisassembleIncrement();
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case DisplayProcessorMode.Processor:
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return DisassembleProcessor();
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return DisassembleProcessor(mem, out length);
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case DisplayProcessorMode.Indeterminate:
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length = 1;
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return "Indeterminate";
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default:
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@ -712,132 +714,75 @@ namespace imlac
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}
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private string DisassembleIncrement()
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{
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return DisassembleIncrementHalf(ImmediateHalf.First) + " | " + DisassembleIncrementHalf(ImmediateHalf.Second);
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}
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private string DisassembleIncrementHalf(ImmediateHalf half)
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{
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string ret = string.Empty;
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int halfWord = half == ImmediateHalf.First ? (_word & 0xff00) >> 8 : (_word & 0xff);
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// translate the half word to vector movements or escapes
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// special case for "Enter Immediate mode" halfword (030) in first half.
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if (half == ImmediateHalf.First && halfWord == 0x30)
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{
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ret += "E";
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}
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else if ((halfWord & 0x80) == 0)
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{
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if ((halfWord & 0x10) != 0)
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{
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ret += "IX ";
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}
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if ((halfWord & 0x08) != 0)
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{
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ret += "ZX ";
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}
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if ((halfWord & 0x02) != 0)
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{
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ret += "IY ";
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}
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if ((halfWord & 0x01) != 0)
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{
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ret += "ZY ";
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}
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if ((halfWord & 0x40) != 0)
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{
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if ((halfWord & 0x20) != 0)
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{
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// escape and return
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ret += "F RJM";
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}
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else
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{
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// Escape
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ret += "F";
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}
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}
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}
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else
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{
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int xSign = ((halfWord & 0x20) == 0) ? 1 : -1;
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int xMag = (int)(((halfWord & 0x18) >> 3));
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int ySign = (int)(((halfWord & 0x04) == 0) ? 1 : -1);
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int yMag = (int)((halfWord & 0x03));
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ret += String.Format("{0},{1} {2}", xMag * xSign, yMag * ySign, (halfWord & 0x40) == 0 ? "OFF" : "ON");
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}
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return ret;
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}
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private void DecodeImmediate()
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{
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// TODO: eventually actually precache movement calculations.
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}
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private string DisassembleProcessor()
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protected override string DisassembleExtended(Memory mem, out int length)
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{
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string ret = String.Empty;
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if (_opcode == DisplayOpcode.DOPR)
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{
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string[] codes = { "INV0 ", "INV1 ", "INV2 ", "INV3 ", "DDSP ", "DRJM ", "DDYM ", "DDXM ", "DIYM ", "DIXM ", "DHVC ", "DHLT " };
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for (int i = 4; i < 12; i++)
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{
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if ((_data & (0x01) << i) != 0)
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{
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if (!string.IsNullOrEmpty(ret))
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{
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ret += ",";
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}
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ret += codes[i];
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}
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}
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// F/C ops:
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int f = (_data & 0xc) >> 2;
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int c = _data & 0x3;
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switch (f)
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{
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case 0x0:
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// nothing
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if (c == 1)
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{
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ret += String.Format("DADR");
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}
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break;
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case 0x1:
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ret += String.Format("DSTS {0}", c);
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break;
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case 0x2:
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ret += String.Format("DSTB {0}", c);
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break;
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case 0x3:
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ret += String.Format("DLPN {0}", c);
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break;
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}
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}
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else
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switch (_opcode)
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{
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// keep things simple -- should add special support for extended instructions at some point...
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ret = String.Format("{0} {1} ", _opcode, Helpers.ToOctal(_data));
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case DisplayOpcode.DLVH:
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length = 3;
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ret = DecodeLongVector(mem);
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break;
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default:
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length = 1;
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// Handle as yet not-special-cased opcodes
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ret = String.Format("{0} {1}", _opcode, Helpers.ToOctal(_data));
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break;
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}
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return ret;
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}
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private string DecodeLongVector(Memory mem)
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{
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//
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// A Long Vector instruction is 3 words long:
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// Word 0: upper 4 bits indicate the opcode (4), lower 12 specify N-M
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// Word 1: upper 3 bits specify beam options (dotted, solid, etc) and the lower 12 specify the larger increment "M"
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// Word 2: upper 3 bits specify signs, lower 12 specify the smaller increment "N"
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// M is the larger absolute value between dX and dY
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// N is the smaller.
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//
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// TODO: Would make sense to precache this during decoding, would require
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// modifications to cache invalidation logic.
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ushort word1 = mem.Fetch((ushort)(_address + 1));
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ushort word2 = mem.Fetch((ushort)(_address + 2));
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uint M = (uint)(word1 & 0x3ff);
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uint N = (uint)(word2 & 0x3ff);
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bool beamOn = (word1 & 0x2000) != 0;
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bool dotted = (word1 & 0x4000) != 0;
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int dySign = (word2 & 0x2000) != 0 ? -1 : 1;
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int dxSign = (word2 & 0x4000) != 0 ? -1 : 1;
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bool dyGreater = (word2 & 0x1000) != 0;
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uint dx = 0;
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uint dy = 0;
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if (dyGreater)
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{
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dy = M;
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dx = N;
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}
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else
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{
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dx = M;
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dy = N;
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}
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return String.Format("DLVH ({0},{1}) {2} {3}",
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dx * dxSign, dy * dySign,
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beamOn ? "ON" : "OFF",
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dotted ? "DOTTED" : String.Empty);
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}
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}
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}
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}
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@ -59,7 +59,7 @@ namespace imlac
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_instructionCache[address & Memory.SizeMask] = null;
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}
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public override string Disassemble(ushort address, DisplayProcessorMode mode)
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public override string Disassemble(ushort address, DisplayProcessorMode mode, out int length)
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{
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//
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// Return a precached instruction if we have it due to previous execution
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@ -68,11 +68,11 @@ namespace imlac
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//
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if (_instructionCache[address & Memory.SizeMask] != null)
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{
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return _instructionCache[address & Memory.SizeMask].Disassemble(mode);
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return _instructionCache[address & Memory.SizeMask].Disassemble(mode, _mem, out length);
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}
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else
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{
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return new PDS4DisplayInstruction((ushort)(address & Memory.SizeMask), mode).Disassemble(mode);
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return new PDS4DisplayInstruction(_mem.Fetch(address), address, mode).Disassemble(mode, _mem, out length);
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}
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}
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@ -678,7 +678,7 @@ namespace imlac
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{
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if (_instructionCache[address & Memory.SizeMask] == null)
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{
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_instructionCache[address & Memory.SizeMask] = new PDS4DisplayInstruction(_mem.Fetch(address), mode);
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_instructionCache[address & Memory.SizeMask] = new PDS4DisplayInstruction(_mem.Fetch(address), address, mode);
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}
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return _instructionCache[address & Memory.SizeMask];
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@ -716,11 +716,11 @@ namespace imlac
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/// </summary>
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private class PDS4DisplayInstruction : DisplayInstructionBase
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{
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public PDS4DisplayInstruction(ushort word, DisplayProcessorMode mode) : base (word, mode)
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public PDS4DisplayInstruction(ushort word, ushort address, DisplayProcessorMode mode) : base (word, address, mode)
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{
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}
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public override string Disassemble(DisplayProcessorMode mode)
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public override string Disassemble(DisplayProcessorMode mode, Memory mem, out int length)
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{
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if (mode == DisplayProcessorMode.Indeterminate)
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{
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@ -730,12 +730,14 @@ namespace imlac
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switch (mode)
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{
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case DisplayProcessorMode.Increment:
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length = 1;
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return DisassembleIncrement();
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case DisplayProcessorMode.Processor:
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return DisassembleProcessor();
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return DisassembleProcessor(mem, out length);
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case DisplayProcessorMode.Indeterminate:
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length = 1;
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return "Indeterminate";
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|
||||
default:
|
||||
@ -909,132 +911,90 @@ namespace imlac
|
||||
}
|
||||
}
|
||||
|
||||
private string DisassembleIncrement()
|
||||
{
|
||||
return DisassembleIncrementHalf(ImmediateHalf.First) + " | " + DisassembleIncrementHalf(ImmediateHalf.Second);
|
||||
}
|
||||
|
||||
private string DisassembleIncrementHalf(ImmediateHalf half)
|
||||
{
|
||||
string ret = string.Empty;
|
||||
int halfWord = half == ImmediateHalf.First ? (_word & 0xff00) >> 8 : (_word & 0xff);
|
||||
|
||||
// translate the half word to vector movements or escapes
|
||||
// special case for "Enter Immediate mode" halfword (030) in first half.
|
||||
if (half == ImmediateHalf.First && halfWord == 0x30)
|
||||
{
|
||||
ret += "E";
|
||||
}
|
||||
else if ((halfWord & 0x80) == 0)
|
||||
{
|
||||
if ((halfWord & 0x10) != 0)
|
||||
{
|
||||
ret += "IX ";
|
||||
}
|
||||
|
||||
if ((halfWord & 0x08) != 0)
|
||||
{
|
||||
ret += "ZX ";
|
||||
}
|
||||
|
||||
if ((halfWord & 0x02) != 0)
|
||||
{
|
||||
ret += "IY ";
|
||||
}
|
||||
|
||||
if ((halfWord & 0x01) != 0)
|
||||
{
|
||||
ret += "ZY ";
|
||||
}
|
||||
|
||||
if ((halfWord & 0x40) != 0)
|
||||
{
|
||||
if ((halfWord & 0x20) != 0)
|
||||
{
|
||||
// escape and return
|
||||
ret += "F RJM";
|
||||
}
|
||||
else
|
||||
{
|
||||
// Escape
|
||||
ret += "F";
|
||||
}
|
||||
}
|
||||
}
|
||||
else
|
||||
{
|
||||
int xSign = ((halfWord & 0x20) == 0) ? 1 : -1;
|
||||
int xMag = (int)(((halfWord & 0x18) >> 3));
|
||||
|
||||
int ySign = (int)(((halfWord & 0x04) == 0) ? 1 : -1);
|
||||
int yMag = (int)((halfWord & 0x03));
|
||||
|
||||
ret += String.Format("{0},{1} {2}", xMag * xSign, yMag * ySign, (halfWord & 0x40) == 0 ? "OFF" : "ON");
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
private void DecodeImmediate()
|
||||
{
|
||||
// TODO: eventually actually precache movement calculations.
|
||||
}
|
||||
|
||||
private string DisassembleProcessor()
|
||||
protected override string DisassembleExtended(Memory mem, out int length)
|
||||
{
|
||||
string ret = String.Empty;
|
||||
if (_opcode == DisplayOpcode.DOPR)
|
||||
{
|
||||
string[] codes = { "INV0 ", "INV1 ", "INV2 ", "INV3 ", "DDSP ", "DRJM ", "DDYM ", "DDXM ", "DIYM ", "DIXM ", "DHVC ", "DHLT " };
|
||||
|
||||
for (int i = 4; i < 12; i++)
|
||||
{
|
||||
if ((_data & (0x01) << i) != 0)
|
||||
{
|
||||
if (!string.IsNullOrEmpty(ret))
|
||||
{
|
||||
ret += ",";
|
||||
}
|
||||
|
||||
ret += codes[i];
|
||||
}
|
||||
}
|
||||
|
||||
// F/C ops:
|
||||
int f = (_data & 0xc) >> 2;
|
||||
int c = _data & 0x3;
|
||||
|
||||
switch (f)
|
||||
{
|
||||
case 0x0:
|
||||
// nothing
|
||||
if (c == 1)
|
||||
{
|
||||
ret += String.Format("DADR");
|
||||
}
|
||||
break;
|
||||
|
||||
case 0x1:
|
||||
ret += String.Format("DSTS {0}", c);
|
||||
break;
|
||||
|
||||
case 0x2:
|
||||
ret += String.Format("DSTB {0}", c);
|
||||
break;
|
||||
|
||||
case 0x3:
|
||||
ret += String.Format("DLPN {0}", c);
|
||||
break;
|
||||
}
|
||||
}
|
||||
else
|
||||
switch (_opcode)
|
||||
{
|
||||
// keep things simple -- should add special support for extended instructions at some point...
|
||||
ret = String.Format("{0} {1} ", _opcode, Helpers.ToOctal(_data));
|
||||
case DisplayOpcode.DLVH:
|
||||
length = 2;
|
||||
ret = DecodeLongVector(mem);
|
||||
break;
|
||||
|
||||
default:
|
||||
length = 1;
|
||||
// Handle as yet not-special-cased opcodes
|
||||
ret = String.Format("{0} {1}", _opcode, Helpers.ToOctal(_data));
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
private string DecodeLongVector(Memory mem)
|
||||
{
|
||||
//
|
||||
// A Long Vector instruction is 3 words long:
|
||||
// Word 0: upper 4 bits indicate the opcode (4), lower 12 specify N-M
|
||||
// Word 1: upper 3 bits specify beam options (dotted, solid, etc) and the lower 12 specify the larger increment "M"
|
||||
// Word 2: upper 3 bits specify signs, lower 12 specify the smaller increment "N"
|
||||
// M is the larger absolute value between dX and dY
|
||||
// N is the smaller.
|
||||
//
|
||||
// TODO: As with the PDS-1 variant, would make sense to precache this during decoding, would require
|
||||
// modifications to cache invalidation logic.
|
||||
ushort word1 = mem.Fetch((ushort)(_address + 1));
|
||||
|
||||
// Not documented, but from empirical evidence from PDS-4 games
|
||||
// (pong, crash) the magnitude is scaled by 2 (i.e. specified LSBN is bit 1 of X and Y AC's)
|
||||
uint M = (uint)(_word & 0x3ff) << 1;
|
||||
uint N = (uint)(word1 & 0x3ff) << 1;
|
||||
|
||||
bool ret = (word1 & 0x8000) != 0;
|
||||
bool dotted = (word1 & 0x4000) != 0;
|
||||
bool dashed = (word1 & 0x2000) != 0;
|
||||
bool beamOn = (word1 & 0x1000) != 0;
|
||||
bool dyGreater = (word1 & 0x0800) != 0;
|
||||
|
||||
int mSign = (_word & 0x0400) != 0 ? -1 : 1;
|
||||
int nSign = (word1 & 0x0400) != 0 ? -1 : 1;
|
||||
|
||||
uint dx = 0;
|
||||
uint dy = 0;
|
||||
|
||||
int dxSign = 0;
|
||||
int dySign = 0;
|
||||
|
||||
if (dyGreater)
|
||||
{
|
||||
dy = M;
|
||||
dx = N;
|
||||
|
||||
dySign = mSign;
|
||||
dxSign = nSign;
|
||||
}
|
||||
else
|
||||
{
|
||||
dx = M;
|
||||
dy = N;
|
||||
dxSign = mSign;
|
||||
dySign = nSign;
|
||||
}
|
||||
|
||||
return String.Format("DLVH ({0},{1}) {2}{3}{4}{5}",
|
||||
dx * dxSign,
|
||||
dy * dySign,
|
||||
beamOn ? "ON " : "OFF ",
|
||||
dotted ? "DOTTED " : String.Empty,
|
||||
dashed ? "DASHED " : String.Empty,
|
||||
ret ? "RET " : String.Empty);
|
||||
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -667,28 +667,31 @@ namespace imlac
|
||||
}
|
||||
|
||||
ushort endAddress = (ushort)Math.Min(Memory.Size, startAddress + length);
|
||||
|
||||
for (ushort address = startAddress; address < endAddress; address++)
|
||||
ushort address = startAddress;
|
||||
while (address < endAddress)
|
||||
{
|
||||
string disassembly = string.Empty;
|
||||
|
||||
int size = 0;
|
||||
try
|
||||
{
|
||||
switch (mode)
|
||||
{
|
||||
case DisassemblyMode.Processor:
|
||||
size = 1;
|
||||
disassembly = Processor.Disassemble(address);
|
||||
break;
|
||||
|
||||
case DisassemblyMode.DisplayAuto:
|
||||
disassembly = DisplayProcessor.Disassemble(address, DisplayProcessorMode.Indeterminate);
|
||||
disassembly = DisplayProcessor.Disassemble(address, DisplayProcessorMode.Indeterminate, out size);
|
||||
break;
|
||||
|
||||
case DisassemblyMode.DisplayProcessor:
|
||||
disassembly = DisplayProcessor.Disassemble(address, DisplayProcessorMode.Processor);
|
||||
disassembly = DisplayProcessor.Disassemble(address, DisplayProcessorMode.Processor, out size);
|
||||
break;
|
||||
|
||||
case DisassemblyMode.DisplayIncrement:
|
||||
disassembly = DisplayProcessor.Disassemble(address, DisplayProcessorMode.Increment);
|
||||
disassembly = DisplayProcessor.Disassemble(address, DisplayProcessorMode.Increment, out size);
|
||||
break;
|
||||
}
|
||||
}
|
||||
@ -696,9 +699,12 @@ namespace imlac
|
||||
{
|
||||
// this can happen if the data is not a valid instruction
|
||||
disassembly = "<invalid instruction>";
|
||||
size = 1;
|
||||
}
|
||||
|
||||
Console.WriteLine("{0}\\{1} {2}", Helpers.ToOctal(address), Helpers.ToOctal(Memory.Fetch(address)), disassembly);
|
||||
|
||||
address += (ushort)size;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user