From 80baf7a9adefd4168efbd91ef7c73a40d33fbeef Mon Sep 17 00:00:00 2001
From: Andrew Kay <git@ajk.me>
Date: Wed, 8 Jul 2020 16:10:03 -0500
Subject: [PATCH] Consistency

---
 interface2/tests/coax_rx_bit_timer_tb.v | 9 ++++++---
 interface2/tests/coax_rx_tb.v           | 9 ++++++---
 2 files changed, 12 insertions(+), 6 deletions(-)

diff --git a/interface2/tests/coax_rx_bit_timer_tb.v b/interface2/tests/coax_rx_bit_timer_tb.v
index a06c84a..2fe21f4 100644
--- a/interface2/tests/coax_rx_bit_timer_tb.v
+++ b/interface2/tests/coax_rx_bit_timer_tb.v
@@ -3,8 +3,10 @@
 module coax_rx_bit_timer_tb;
     reg clk = 0;
 
-    initial begin
-        forever begin
+    initial
+    begin
+        forever
+        begin
             #1 clk <= ~clk;
         end
     end
@@ -24,7 +26,8 @@ module coax_rx_bit_timer_tb;
         .synchronized(synchronized)
     );
 
-    initial begin
+    initial
+    begin
         $dumpfile("coax_rx_bit_timer_tb.vcd");
         $dumpvars(0, coax_rx_bit_timer_tb);
 
diff --git a/interface2/tests/coax_rx_tb.v b/interface2/tests/coax_rx_tb.v
index 370c083..5e07c96 100644
--- a/interface2/tests/coax_rx_tb.v
+++ b/interface2/tests/coax_rx_tb.v
@@ -5,8 +5,10 @@
 module coax_rx_tb;
     reg clk = 0;
 
-    initial begin
-        forever begin
+    initial
+    begin
+        forever
+        begin
             #1 clk <= ~clk;
         end
     end
@@ -24,7 +26,8 @@ module coax_rx_tb;
         .read(read)
     );
 
-    initial begin
+    initial
+    begin
         $dumpfile("coax_rx_tb.vcd");
         $dumpvars(0, coax_rx_tb);