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https://github.com/lowobservable/coax.git
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76 lines
2.0 KiB
Verilog
76 lines
2.0 KiB
Verilog
// Copyright (c) 2020, Andrew Kay
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice appear in all copies.
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//
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// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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`default_nettype none
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module dual_clock_spi_device (
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input clk_slow,
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input clk_fast,
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input spi_sck,
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input spi_cs_n,
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input spi_sdi,
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output spi_sdo,
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output reg [7:0] rx_data,
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output reg rx_strobe,
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input [7:0] tx_data,
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input tx_strobe
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);
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wire [7:0] rx_data_fast;
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wire rx_strobe_fast;
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reg [7:0] tx_data_fast;
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wire tx_strobe_fast;
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spi_device spi (
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.clk(clk_fast),
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.spi_sck(spi_sck),
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.spi_cs_n(spi_cs_n),
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.spi_sdi(spi_sdi),
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.spi_sdo(spi_sdo),
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.rx_data(rx_data_fast),
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.rx_strobe(rx_strobe_fast),
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.tx_data(tx_data_fast),
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.tx_strobe(tx_strobe_fast)
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);
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wire rx_strobe_slow;
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strobe_cdc rx_strobe_cdc (
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.clk_in(clk_fast),
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.strobe_in(rx_strobe_fast),
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.clk_out(clk_slow),
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.strobe_out(rx_strobe_slow)
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);
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strobe_cdc tx_strobe_cdc (
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.clk_in(clk_slow),
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.strobe_in(tx_strobe),
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.clk_out(clk_fast),
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.strobe_out(tx_strobe_fast)
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);
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always @(posedge clk_slow)
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begin
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if (tx_strobe)
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tx_data_fast <= tx_data;
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rx_strobe <= 0;
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if (rx_strobe_slow)
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begin
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rx_data <= rx_data_fast;
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rx_strobe <= 1;
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end
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end
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endmodule
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