diff --git a/README.md b/README.md index af2f34f..fb31862 100644 --- a/README.md +++ b/README.md @@ -45,7 +45,7 @@ Lastly for completeness, I also uploaded the ROM dump of the real ZX-81, which y On 5 juli 2022 I discovered that KiCad had changed back to the logic family of some libraries for wich I had changed the original logic family from LS logic to HC logic. I intended that all logic would be HC logic, just like in my ZX84+35 initial clone. But this bug in KiCad may cause problems because HC logic and LS logic are incompatible. So the first thing I did was updating the BOM, also to see if there actually were HC replacements for the LS logic I had used by mistake. Luckily all the HC logic I needed was available in DIP. Next up will be revision 1.8 of the schematic, which will also get a clock inverter using a spare half of a flipflop. This might be necessary to solve a timing error that can occur with EPROM's that are too slow to put pixel data into the shift register, which results in all black character squares (due to the databus pullups that pull the databus high when nothing is driving it). Then I will correct the component placement diagram which also shows some wrong logic families. My last remark is that although theoretically the ZX81+38 should not work with mixed logic, it seems that in practice it still seems to work as I have reports that it does! I finished building up my own copy with mixed logic so soon I can check this for myself. Also note that I no longer recommend using sockets with machined pins, use dual wipe sockets instead. This is reflected in the BOM. Lastly perhaps this clone will not work with original N-MOS Z80 chips, its recommended to use modern (C-MOS) versions, such as the Z84C0008PEG. -26 July 2022, updated the BOM for ZX81+38 revision 1.8 added reichelt order codes (I have orderer the missing HC logic chips from here, as farnell is no loger an option for me) +26 July 2022, updated the BOM for ZX81+38 revision 1.8 added reichelt order codes (I have ordered my own missing HC logic chips from here, as farnell is no loger an option for me) Added a new component placement drawing that corrects the wrongly mixed logic family's and adds some extra info, use this drawing for revision 1.8 -Addded rev 1.8 Schematic (.PDF in black and white) for other (.PNG older or color schematics) see my Revspace pages +Addded rev 1.8 Schematic (.PDF in black and white) for other (.PNG older or color schematics) see my Revspace pages at www.revspace.nl/projects. Uploaded PCB production files gerber and drill files, (I checked them with a gerber viewer, they should be okay)