From 0c4152b6a5846ad759be67991e4841ff874a37ff Mon Sep 17 00:00:00 2001
From: Mikael Pettersson <mikpelinux@gmail.com>
Date: Sat, 25 Jul 2020 17:33:58 +0200
Subject: [PATCH] sim: sim_boolean: handle ORCM, add unit test

---
 erlang/apps/sim/src/sim_boolean.erl        | 17 +++++++++++++++++
 erlang/apps/sim/src/sim_core.erl           |  1 +
 erlang/apps/sim/test/sim_boolean_tests.erl | 14 ++++++++++++++
 3 files changed, 32 insertions(+)

diff --git a/erlang/apps/sim/src/sim_boolean.erl b/erlang/apps/sim/src/sim_boolean.erl
index 056daac..ea79b04 100644
--- a/erlang/apps/sim/src/sim_boolean.erl
+++ b/erlang/apps/sim/src/sim_boolean.erl
@@ -52,6 +52,7 @@
         , handle_ORCAB/4
         , handle_ORCAI/4
         , handle_ORCAM/4
+        , handle_ORCM/4
         , handle_SETCA/4
         , handle_SETCAB/4
         , handle_SETCAM/4
@@ -649,6 +650,22 @@ handle_SETCMB(Core, Mem, IR, EA) ->
                           fun(Core1, Mem1) -> handle_SETCMB(Core1, Mem1, IR, EA) end)
   end.
 
+%% ORCM - Inclusive Or Complement or Memory with AC
+
+-spec handle_ORCM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_ORCM(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      CA = sim_core:get_ac(Core, AC),
+      Word = (CA bor bnot CE) band ((1 bsl 36) - 1),
+      sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> handle_ORCM(Core1, Mem1, IR, EA) end)
+  end.
+
 %% Miscellaneous ===============================================================
 
 ea_address(#ea{section = Section, offset = Offset}) ->
diff --git a/erlang/apps/sim/src/sim_core.erl b/erlang/apps/sim/src/sim_core.erl
index 34fd0a0..898e3b3 100644
--- a/erlang/apps/sim/src/sim_core.erl
+++ b/erlang/apps/sim/src/sim_core.erl
@@ -305,6 +305,7 @@ dispatch(Core, Mem, IR, EA) ->
     8#461 -> sim_boolean:handle_SETCMI(Core, Mem, IR, EA);
     8#462 -> sim_boolean:handle_SETCMM(Core, Mem, IR, EA);
     8#463 -> sim_boolean:handle_SETCMB(Core, Mem, IR, EA);
+    8#464 -> sim_boolean:handle_ORCM(Core, Mem, IR, EA);
     _ ->
       PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
       {Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
diff --git a/erlang/apps/sim/test/sim_boolean_tests.erl b/erlang/apps/sim/test/sim_boolean_tests.erl
index b21d316..8b99b25 100644
--- a/erlang/apps/sim/test/sim_boolean_tests.erl
+++ b/erlang/apps/sim/test/sim_boolean_tests.erl
@@ -96,6 +96,7 @@
 -define(OP_SETCMI, 8#461).
 -define(OP_SETCMM, 8#462).
 -define(OP_SETCMB, 8#463).
+-define(OP_ORCM, 8#464).
 
 %% 2.4 Boolean Functions =======================================================
 
@@ -719,6 +720,19 @@ setcmb_test() ->
          , {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 8#070707)} % AC1 = -1,,070707
          ]).
 
+%% ORCM - Inclusive Or Complement or Memory with AC
+
+orcm_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#707070)} % 1,,100/ MOVEI 1,707070
+    , {1, 8#101, ?INSN(?OP_ORCM, 1, 0, 0, 8#200)}     % 1,,101/ ORCM 1,200
+    , {1, 8#102, ?INSN_INVALID}                       % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(0, 8#707070)}                % 1,,200/ 0,,707070
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, -1)} % AC1 = -1,,-1
+         ]).
+
 %% Common code to run short sequences ==========================================
 
 expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->