From 60bda89259d0e03bc4b50f08bc046af7c0626829 Mon Sep 17 00:00:00 2001
From: Mikael Pettersson <mikpelinux@gmail.com>
Date: Fri, 24 Jul 2020 19:57:59 +0200
Subject: [PATCH] sim: sim_boolean: handle ANDCB, add unit test

---
 erlang/apps/sim/src/sim_boolean.erl        | 17 +++++++++++++++++
 erlang/apps/sim/src/sim_core.erl           |  1 +
 erlang/apps/sim/test/sim_boolean_tests.erl | 14 ++++++++++++++
 3 files changed, 32 insertions(+)

diff --git a/erlang/apps/sim/src/sim_boolean.erl b/erlang/apps/sim/src/sim_boolean.erl
index 8c583ff..8dd1d14 100644
--- a/erlang/apps/sim/src/sim_boolean.erl
+++ b/erlang/apps/sim/src/sim_boolean.erl
@@ -30,6 +30,7 @@
         , handle_ANDCAB/4
         , handle_ANDCAI/4
         , handle_ANDCAM/4
+        , handle_ANDCB/4
         , handle_ANDCM/4
         , handle_ANDCMB/4
         , handle_ANDCMI/4
@@ -401,6 +402,22 @@ handle_IORB(Core, Mem, IR, EA) ->
                           fun(Core1, Mem1) -> handle_IORB(Core1, Mem1, IR, EA) end)
   end.
 
+%% ANDCB - And Complements of Both
+
+-spec handle_ANDCB(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_ANDCB(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      CA = sim_core:get_ac(Core, AC),
+      Word = ((bnot CE) band (bnot CA)) band ((1 bsl 36) - 1),
+      sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> handle_ANDCA(Core1, Mem1, IR, EA) end)
+  end.
+
 %% Miscellaneous ===============================================================
 
 ea_address(#ea{section = Section, offset = Offset}) ->
diff --git a/erlang/apps/sim/src/sim_core.erl b/erlang/apps/sim/src/sim_core.erl
index 1e89d13..fcf3e61 100644
--- a/erlang/apps/sim/src/sim_core.erl
+++ b/erlang/apps/sim/src/sim_core.erl
@@ -285,6 +285,7 @@ dispatch(Core, Mem, IR, EA) ->
     8#435 -> sim_boolean:handle_IORI(Core, Mem, IR, EA);
     8#436 -> sim_boolean:handle_IORM(Core, Mem, IR, EA);
     8#437 -> sim_boolean:handle_IORB(Core, Mem, IR, EA);
+    8#440 -> sim_boolean:handle_ANDCB(Core, Mem, IR, EA);
     _ ->
       PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
       {Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
diff --git a/erlang/apps/sim/test/sim_boolean_tests.erl b/erlang/apps/sim/test/sim_boolean_tests.erl
index 2898d1c..7bd4363 100644
--- a/erlang/apps/sim/test/sim_boolean_tests.erl
+++ b/erlang/apps/sim/test/sim_boolean_tests.erl
@@ -76,6 +76,7 @@
 -define(OP_IORI, 8#435).
 -define(OP_IORM, 8#436).
 -define(OP_IORB, 8#437).
+-define(OP_ANDCB, 8#440).
 
 %% 2.4 Boolean Functions =======================================================
 
@@ -474,6 +475,19 @@ iorb_test() ->
          , {#ea{section = 1, offset = 1, islocal = false}, 8#777777} % AC1 = 0,,-1
          ]).
 
+%% ANDCB - And Complements of Both
+
+andcb_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 8#707070)} % 1,,100/ MOVEI 1,707070
+    , {1, 8#101, ?INSN(?OP_ANDCB, 1, 0, 0, 8#200)}    % 1,,101/ ANDCB 1,200
+    , {1, 8#102, ?INSN_INVALID}                       % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(0, 8#070707)}                % 1,,200/ 0,,070707
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 0)} % AC1 = -1,,0
+         ]).
+
 %% Common code to run short sequences ==========================================
 
 expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->