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sim: sim_core: add instruction fetch, effective address calculation, and code to start a freshly loaded program
This commit is contained in:
Mikael Pettersson
parent
5e138be489
commit
8631bc5c2a
@ -1,7 +1,7 @@
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%%% -*- erlang-indent-level: 2 -*-
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%%%
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%%% simulator for pdp10-elf
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%%% Copyright (C) 2020 Mikael Pettersson
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%%% Copyright (C) 2018-2020 Mikael Pettersson
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%%%
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%%% This file is part of pdp10-tools.
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%%%
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@ -38,12 +38,241 @@
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Argc :: word(),
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Argv :: word(),
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Envp :: word()) -> ok | {error, {module(), term()}}.
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run(_Mem, _PC, _SP, _Argc, _Argv, _Envp) -> ok. % FIXME
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run(Mem, PC, SP, Argc, Argv, Envp) ->
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PCSection = (PC bsr 18) band ((1 bsl 12) - 1),
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PCOffset = PC band ((1 bsl 18) - 1),
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ACS0 = list_to_tuple(lists:duplicate(16, 0)),
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ACS1 = do_set_ac(ACS0, 1, Argc),
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ACS2 = do_set_ac(ACS1, 2, Argv),
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ACS3 = do_set_ac(ACS2, 3, Envp),
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ACS = do_set_ac(ACS3, ?AC_SP, SP),
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Flags = (1 bsl ?PDP10_PF_USER),
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Core = #core{ pc_section = PCSection
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, pc_offset = PCOffset
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, acs = ACS
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, flags = Flags
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},
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{_Core, _Mem, Result} = run(Core, Mem),
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Result.
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%% The instruction fetch, effective address calculation, and dispatch process,
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%% is a tail-recursive state machine, in order to support correct handling of
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%% faults (especially page faults) that may occur at various points, without
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%% creating recursion in the simulator.
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-spec run(#core{}, sim_mem:mem()) -> {#core{}, sim_mem:mem(), ok | {error, {module(), term()}}}.
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run(Core, Mem) ->
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insn_fetch(Core, Mem).
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%% Instruction Fetch and Effective Address Calculation =========================
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%% c.f. Toad-1 Architecture Manual, page 41, Figure 1.11
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%% Instruction Fetch. This always uses local addressing.
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insn_fetch(Core, Mem) ->
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PCOffset = Core#core.pc_offset,
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case PCOffset =< 8#17 of
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true ->
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MB = get_ac(Core, PCOffset),
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insn_fetch2(Core, Mem, MB);
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false ->
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Address = (Core#core.pc_section bsl 18) bor PCOffset,
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case sim_mem:read_word(Mem, Address) of
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{ok, MB} -> insn_fetch2(Core, Mem, MB);
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{error, Reason} -> page_fault(Core, Mem, Address, read, Reason, fun insn_fetch/2)
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end
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end.
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insn_fetch2(Core, Mem, MB) ->
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IR = bits36(MB, 0, 12), % IR := MB_<0:12>
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ESection = Core#core.pc_section, % E_<6:17> := PC_<6:17>
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calculate_ea(Core, Mem, IR, MB, ESection).
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calculate_ea(Core, Mem, IR, MB, ESection) ->
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local_format_address_word(Core, Mem, IR, MB, ESection).
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local_format_address_word(Core, Mem, IR, MB, ESection) ->
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Y = bits36(MB, 18, 35), % Y_<18:35> := MB_<18:35>
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X = bits36(MB, 14, 17), % X := MB_<14:17>
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I = bit36(MB, 13), % I := MB_<13>
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%% Indexed Address? Test X field.
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case X of
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0 ->
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%% X field =:= 0. No Indexing.
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EOffset = Y, % E_<18:35> := Y_<18:35>
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indirect_addressing(Core, Mem, IR, I, ESection, EOffset, _IsLocal = true);
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_ ->
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%% X field =/= 0. Indexing.
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CX = get_ac(Core, X), % C(X) hoisted from following blocks
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%% Test Section Number in E_<6:17>.
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case ESection of
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0 ->
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local_index(Core, Mem, IR, I, ESection, CX, Y);
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_ ->
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%% Section =/= 0.
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%% Test C(X). Global Index when (C(X)_<0> =:= 0) and (C(X)_<6:17> =/= 0).
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case bit36(CX, 0) =:= 0 andalso bits36(CX, 6, 17) =/= 0 of
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true ->
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global_index(Core, Mem, IR, I, CX, Y);
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false ->
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local_index(Core, Mem, IR, I, ESection, CX, Y)
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end
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end
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end.
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local_index(Core, Mem, IR, I, ESection, CX, Y) ->
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EOffset = bits36low18(CX + Y), % E_<18:35> := C(X)_<18:35> + Y_<18:35>
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indirect_addressing(Core, Mem, IR, I, ESection, EOffset, _IsLocal = true).
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global_index(Core, Mem, IR, I, CX, Y) ->
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Y1 = sext18(Y), % Y_<6:17> =:= 7777 * Y_<18>
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E = CX + Y1, % E_<6:35> := C(X)_<6:35> + Y_<6:35>
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ESection = bits36(E, 6, 17),
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EOffset = bits36(E, 18, 35),
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indirect_addressing(Core, Mem, IR, I, ESection, EOffset, _IsLocal = false).
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indirect_addressing(Core, Mem, IR, I, ESection, EOffset, IsLocal) ->
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%% Test I bit.
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case I of
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0 ->
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%% I =:= 0. Done!
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%% E is the Effective Address.
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%% IsLocal signals if E is a global address or if it is a local address
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%% in the last section from which an address word was fetched. This
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%% matters for instructions that use E and E+1, and also to determine
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%% if an address denotes an accumulator or a memory location.
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dispatch(Core, Mem, IR, #ea{section = ESection, offset = EOffset, islocal = IsLocal});
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_ ->
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%% I =:= 1.
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fetch_indirect_word(Core, Mem, IR, ESection, EOffset, IsLocal)
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end.
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fetch_indirect_word(Core, Mem, IR, ESection, EOffset, IsLocal) ->
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%% Fetch the Indirect Word.
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case c(Core, Mem, ESection, EOffset, IsLocal) of
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{ok, MB} ->
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%% Non-zero section? Test E_<6:17>.
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case ESection of
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0 ->
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local_format_address_word(Core, Mem, IR, MB, ESection);
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_ ->
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%% Section =/= 0.
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%% Decode Indirect Word MB_<0:1>.
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case bits36(MB, 0, 1) of
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0 ->
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global_indirect_word(Core, Mem, IR, MB, _I = 0);
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1 ->
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global_indirect_word(Core, Mem, IR, MB, _I = 1);
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2 ->
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%% Local Indirect
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local_format_address_word(Core, Mem, IR, MB, ESection);
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3 ->
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E = (ESection bsl 18) bor EOffset,
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page_fault(Core, Mem, E, read, indirect_word,
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fun(Core1, Mem1) ->
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fetch_indirect_word(Core1, Mem1, IR, ESection, EOffset, IsLocal)
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end)
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end
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end;
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{error, Reason} ->
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E = (ESection bsl 18) bor EOffset,
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page_fault(Core, Mem, E, read, Reason,
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fun(Core1, Mem1) ->
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fetch_indirect_word(Core1, Mem1, IR, ESection, EOffset, IsLocal)
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end)
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end.
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global_indirect_word(Core, Mem, IR, MB, I) ->
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Y = bits36(MB, 6, 35), % Y:= MB_<6,35>
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X = bits36(MB, 2, 5), % X := MB_<2:5>
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%% Indexed Address? Test X field.
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case X of
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0 ->
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E = Y, % E_<6:35> := Y_<6:35>
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ESection1 = bits36(E, 6, 17),
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EOffset1 = bits36(E, 18, 35),
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indirect_addressing(Core, Mem, IR, I, ESection1, EOffset1, _IsLocal = false);
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_ ->
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%% X =/= 0.
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CX = get_ac(Core, X),
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E = CX + Y, % E_<6:35> := C(X)_<6:35> + Y_<6:35>
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ESection1 = bits36(E, 6, 17),
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EOffset1 = bits36(E, 18, 35),
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indirect_addressing(Core, Mem, IR, I, ESection1, EOffset1, _IsLocal = false)
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end.
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%% Instruction Dispatch ========================================================
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-spec dispatch(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), ok | {error, {module(), term()}}}.
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dispatch(Core, Mem, IR, EA) ->
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PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
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{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}. % FIXME
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%% Page Fault Handling =========================================================
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-spec page_fault(#core{}, sim_mem:mem(), word(), atom(), term(), fun())
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-> {#core{}, sim_mem:mem(), ok | {error, {module(), term()}}}.
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page_fault(Core, Mem, Address, Op, Reason, Cont) ->
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%% This should trap to supervisor mode, but for now we treat all faults as fatal.
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PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
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{Core, Mem, {error, {?MODULE, {page_fault, Address, PC, Op, Reason, Cont}}}}.
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%% Miscellaneous ===============================================================
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%% bits36(X, LEFT, RIGHT)
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%%
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%% Extracts bits LEFT through RIGHT (inclusive) from a 36-bit number X.
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%% Bit 0 is most significant, and 35 least significant.
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%% Requires 0 =< LEFT =< RIGHT =< 35.
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-spec bits36(word(), 0..35, 0..35) -> word().
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bits36(X, LEFT, RIGHT) ->
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true = 0 =< LEFT andalso LEFT =< RIGHT andalso RIGHT =< 35,
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(X bsr (35 - RIGHT)) band ((1 bsl (1 + RIGHT - LEFT)) - 1).
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%% bits36low18(X)
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%%
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%% Extract the right 18 bits from a 36-bit number X.
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-spec bits36low18(word()) -> word().
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bits36low18(X) -> bits36(X, 18, 35).
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%% bit36(X, BIT)
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%%
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%% Extract bit BIT from a 36-bit number X.
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%% Bit 0 is most significant, and 35 least significant.
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%% Requires 0 =< BIT =< 35.
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-spec bit36(word(), 0..35) -> word().
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bit36(X, BIT) -> bits36(X, BIT, BIT).
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%% Sign-extend a uint18_t() to the full width of its representation type.
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-spec sext18(uint18_t()) -> integer().
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sext18(X) ->
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UInt18Sbit = 1 bsl (18 - 1),
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UInt18Max = (1 bsl 18) - 1,
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((X band UInt18Max) bxor UInt18Sbit) - UInt18Sbit.
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-spec c(#core{}, sim_mem:mem(), Section :: uint12_t(), Offset :: uint18_t(), IsLocal :: boolean())
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-> {ok, word()} | {error, {sim_mem:prot(), sim_mem:what()} | false}.
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c(Core, Mem, Section, Offset, IsLocal) ->
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case Offset =< 8#17 andalso (IsLocal orelse Section =< 1) of
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true -> {ok, get_ac(Core, Offset)};
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false ->
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Address = (Section bsl 18) bor Offset,
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sim_mem:read_word(Mem, Address)
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end.
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-spec get_ac(#core{}, 0..8#17) -> word().
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get_ac(Core, Nr) -> element(Nr + 1, Core#core.acs).
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do_set_ac(ACS, Nr, Val) -> setelement(Nr + 1, ACS, Val).
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%% Error Formatting ============================================================
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-spec format_error(term()) -> io_lib:chars().
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format_error(Reason) ->
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case Reason of
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_ -> [] % FIXME
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{dispatch, PC, IR, EA} ->
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io_lib:format("DISPATCH: PC=~.8b IR=~.8b EA=~p NYI", [PC, IR, EA]);
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{page_fault, Address, PC, Op, Reason, Cont} ->
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io_lib:format("PAGE FAULT: ADDR=~.8b PC=~.8b OP=~p RSN=~p CONT=~p",
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[Address, PC, Op, Reason, Cont])
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end.
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