diff --git a/erlang/apps/sim/src/sim_core.erl b/erlang/apps/sim/src/sim_core.erl
index c8a0b9b..37c3b8d 100644
--- a/erlang/apps/sim/src/sim_core.erl
+++ b/erlang/apps/sim/src/sim_core.erl
@@ -353,6 +353,10 @@ dispatch(Core, Mem, IR, EA) ->
     8#541 -> sim_halfword:handle_HRRI(Core, Mem, IR, EA);
     8#542 -> sim_halfword:handle_HRRM(Core, Mem, IR, EA);
     8#543 -> sim_halfword:handle_HRRS(Core, Mem, IR, EA);
+    8#544 -> sim_halfword:handle_HLR(Core, Mem, IR, EA);
+    8#545 -> sim_halfword:handle_HLRI(Core, Mem, IR, EA);
+    8#546 -> sim_halfword:handle_HLRM(Core, Mem, IR, EA);
+    8#547 -> sim_halfword:handle_HLRS(Core, Mem, IR, EA);
     8#550 -> sim_halfword:handle_HRRZ(Core, Mem, IR, EA);
     8#551 -> sim_moves:handle_MOVEI(Core, Mem, IR, EA); % HRRZI = MOVEI
     8#552 -> sim_halfword:handle_HRRZM(Core, Mem, IR, EA);
diff --git a/erlang/apps/sim/src/sim_halfword.erl b/erlang/apps/sim/src/sim_halfword.erl
index 5d076f1..2c5c0ad 100644
--- a/erlang/apps/sim/src/sim_halfword.erl
+++ b/erlang/apps/sim/src/sim_halfword.erl
@@ -38,6 +38,10 @@
         , handle_HLLZ/4
         , handle_HLLZM/4
         , handle_HLLZS/4
+        , handle_HLR/4
+        , handle_HLRI/4
+        , handle_HLRM/4
+        , handle_HLRS/4
         , handle_HRL/4
         , handle_HRLE/4
         , handle_HRLEI/4
@@ -594,6 +598,57 @@ handle_HRRES(Core, Mem, IR, EA) ->
                           fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
   end.
 
+%% HLR - Half Word Left to Right
+
+-spec handle_HLR(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_HLR(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      CA = sim_core:get_ac(Core, AC),
+      Word = set_right(CA, get_left(CE)),
+      sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
+  end.
+
+-spec handle_HLRI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_HLRI(Core, Mem, IR, _EA) ->
+  AC = IR band 8#17,
+  CA = sim_core:get_ac(Core, AC),
+  Word = set_right(CA, 0),
+  sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
+
+-spec handle_HLRM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_HLRM(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      CA = sim_core:get_ac(Core, AC),
+      Word = set_right(CE, get_left(CA)),
+      handle_writeback(Core, Mem, EA, Word);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
+  end.
+
+-spec handle_HLRS(#core{}, sim_mem:mem(), IR :: word(), #ea{})
+      -> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
+handle_HLRS(Core, Mem, IR, EA) ->
+  case sim_core:c(Core, Mem, EA) of
+    {ok, CE} ->
+      AC = IR band 8#17,
+      Word = set_right(CE, get_left(CE)),
+      handle_writeback(Core, Mem, AC, EA, Word);
+    {error, Reason} ->
+      sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
+                          fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
+  end.
+
 %% Miscellaneous ===============================================================
 
 handle_writeback(Core, Mem, EA, Word) ->
diff --git a/erlang/apps/sim/test/sim_halfword_tests.erl b/erlang/apps/sim/test/sim_halfword_tests.erl
index 49b7437..9e7439c 100644
--- a/erlang/apps/sim/test/sim_halfword_tests.erl
+++ b/erlang/apps/sim/test/sim_halfword_tests.erl
@@ -81,6 +81,10 @@
 -define(OP_HRRI,  8#541).
 -define(OP_HRRM,  8#542).
 -define(OP_HRRS,  8#543).
+-define(OP_HLR,   8#544).
+-define(OP_HLRI,  8#545).
+-define(OP_HLRM,  8#546).
+-define(OP_HLRS,  8#547).
 -define(OP_HRRZ,  8#550).
 -define(OP_HRRZI, 8#551).
 -define(OP_HRRZM, 8#552).
@@ -813,6 +817,64 @@ hrres_no_ac_test() ->
          , {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
          ]).
 
+%% HLR - Half Word Left to Right
+
+hlr_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVSI, 1, 0, 0, 1)}     % 1,,100/ MOVSI 1,1
+    , {1, 8#101, ?INSN(?OP_HLR, 1, 0, 0, 8#200)}   % 1,,101/ HLR 1,200
+    , {1, 8#102, ?INSN_INVALID}                    % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(1, 0)}                    % 1,,200/ 0,,1
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, 1)} % AC1 = 1,,1
+         ]).
+
+hlri_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)}     % 0,,100/ MOVEI 1,1
+    , {1, 8#101, ?INSN(?OP_HLRI, 1, 0, 0, 1)}      % 0,,101/ HLRI 1,1
+    , {1, 8#102, ?INSN_INVALID}                    % 0,,102/ <invalid>
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(0, 0)} % AC1 = 0,,0
+         ]).
+
+hlrm_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVSI, 1, 0, 0, 1)}     % 1,,100/ MOVSI 1,1
+    , {1, 8#101, ?INSN(?OP_HLRM, 1, 0, 0, 8#200)}  % 1,,101/ HLRM 1,200
+    , {1, 8#102, ?INSN_INVALID}                    % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(1, 0)}                    % 1,,200/ 1,,0
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 1)} % C(1,200) = 1,,1
+         ]).
+
+hlrs_ac_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVSI, 1, 0, 0, 1)}     % 1,,100/ MOVSI 1,1
+    , {1, 8#101, ?INSN(?OP_HLRS, 1, 0, 0, 8#200)}  % 1,,101/ HLRS 1,200
+    , {1, 8#102, ?INSN_INVALID}                    % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(1, 0)}                    % 1,,200/ 1,,0
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 1)} % C(1,,200) = 1,,1
+         , {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(1, 1)} % AC1 = 1,,1
+         ]).
+
+hlrs_no_ac_test() ->
+  Prog =
+    [ {1, 8#100, ?INSN(?OP_MOVSI, 0, 0, 0, 1)}     % 1,,100/ MOVSI 0,1
+    , {1, 8#101, ?INSN(?OP_HLRS, 0, 0, 0, 8#200)}  % 1,,101/ HLRS 0,200
+    , {1, 8#102, ?INSN_INVALID}                    % 1,,102/ <invalid>
+    , {1, 8#200, ?COMMA2(1, 0)}                    % 1,,200/ 1,,0
+    ],
+  expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
+         [ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 1)} % C(1,,200) = 1,,1
+         , {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(1, 0)} % AC0 = 1,,0
+         ]).
+
 %% Common code to run short sequences ==========================================
 
 expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->