sim: sim_arithmetic: handle SKIP{,L,E,LE,A,GE,N,G}, add unit tests

This commit is contained in:
Mikael Pettersson
2020-08-03 01:43:42 +02:00
parent 1f2c56260f
commit bf5cc893cf
3 changed files with 265 additions and 0 deletions

View File

@@ -47,6 +47,14 @@
, handle_JUMPL/4
, handle_JUMPLE/4
, handle_JUMPN/4
, handle_SKIP/4
, handle_SKIPA/4
, handle_SKIPE/4
, handle_SKIPG/4
, handle_SKIPGE/4
, handle_SKIPL/4
, handle_SKIPLE/4
, handle_SKIPN/4
]).
-include("sim_core.hrl").
@@ -290,6 +298,96 @@ handle_JUMPG(Core, Mem, IR, EA) ->
CA = sim_core:get_ac(Core, AC),
jump_if_G(Core, Mem, CA, EA).
%% SKIP - Skip if Memory Condition Satisfied
-spec handle_SKIP(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIP(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
sim_core:next_pc(set_non_zero_ac(Core, IR, CE), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPL(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPL(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
skip_if_L(set_non_zero_ac(Core, IR, CE), Mem, sext36(CE), 0);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPE(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPE(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
skip_if_E(set_non_zero_ac(Core, IR, CE), Mem, CE, 0);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPLE(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPLE(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
skip_if_LE(set_non_zero_ac(Core, IR, CE), Mem, sext36(CE), 0);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPA(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPA(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
sim_core:skip(set_non_zero_ac(Core, IR, CE), Mem);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPGE(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPGE(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
skip_if_LE(set_non_zero_ac(Core, IR, CE), Mem, 0, sext36(CE)); % C(E) >= 0 -> 0 =< C(E)
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPN(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPN(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
skip_if_N(set_non_zero_ac(Core, IR, CE), Mem, CE, 0);
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
-spec handle_SKIPG(#core{}, sim_mem:mem(), IR :: word(), #ea{})
-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
handle_SKIPG(Core, Mem, IR, EA) ->
case sim_core:c(Core, Mem, EA) of
{ok, CE} ->
skip_if_L(set_non_zero_ac(Core, IR, CE), Mem, 0, sext36(CE)); % C(E) > 0 -> 0 < C(E)
{error, Reason} ->
sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
end.
%% Miscellaneous ===============================================================
jump_if_E(Core, Mem, X, EA) ->
@@ -362,5 +460,11 @@ sext36(X) ->
UInt36Max = (1 bsl 36) - 1,
((X band UInt36Max) bxor UInt36Sbit) - UInt36Sbit.
set_non_zero_ac(Core, IR, Word) ->
case IR band 8#17 of
0 -> Core;
AC -> sim_core:set_ac(Core, AC, Word)
end.
ea_address(#ea{section = Section, offset = Offset}) ->
(Section bsl 18) bor Offset.

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@@ -312,6 +312,14 @@ dispatch(Core, Mem, IR, EA) ->
8#325 -> sim_arithmetic:handle_JUMPGE(Core, Mem, IR, EA);
8#326 -> sim_arithmetic:handle_JUMPN(Core, Mem, IR, EA);
8#327 -> sim_arithmetic:handle_JUMPG(Core, Mem, IR, EA);
8#330 -> sim_arithmetic:handle_SKIP(Core, Mem, IR, EA);
8#331 -> sim_arithmetic:handle_SKIPL(Core, Mem, IR, EA);
8#332 -> sim_arithmetic:handle_SKIPE(Core, Mem, IR, EA);
8#333 -> sim_arithmetic:handle_SKIPLE(Core, Mem, IR, EA);
8#334 -> sim_arithmetic:handle_SKIPA(Core, Mem, IR, EA);
8#335 -> sim_arithmetic:handle_SKIPGE(Core, Mem, IR, EA);
8#336 -> sim_arithmetic:handle_SKIPN(Core, Mem, IR, EA);
8#337 -> sim_arithmetic:handle_SKIPG(Core, Mem, IR, EA);
8#400 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA);
8#401 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % SETZI = SETZ
8#402 -> sim_boolean:handle_SETZM(Core, Mem, IR, EA);